Add an opportunistic page cache to the xnandpsu driver since it does not
implement partial page reads and common filesystem access patterns
perform multiple reads from the same page. This has been seen to provide
a 10x speedup to read speeds and a 2x speedup on first initialization
when used with JFFS2.
This fixes a logic inversion that was preventing creation of a Bad Block
Table (BBT) from scratch on devices that lack one. This was discovered
during upstream integration testing. The BBT management layer in this
driver is not designed to be easily testable other than on real hardware.
Expose functions to directly manipulate the bad block table (BBT). These
functions are necessary to correct possible BBT corruption caused by
bugs in the BBT management layer.
The XNandPsu_EraseBlock function takes a target device and a block
offset for erasure. Ensure the block offset is within the size of the
target device.
When marking the trailing blocks on a device as reserved for Bad Block
Table usage, ensure that the correct blocks are marked. This resolves an
off-by-one error that was marking one block too low and leaving the last
block in the device unmarked.
The Bad Block Table is a per-device catalog of the dispositions of each
block in the device. Only read enough data to determine the dispositions
of blocks for the device being read.
The xnandpsu driver includes functionality to map back and forth between
the flash-based BBT and the memory-based BBT with the values in each
being a bitwise inversion of each other. This resolves several bugs in
this process and simplifies the inversion from operating on the block
representation to operating on the entire BBT entry (4 blocks, 2 bits
per block, one byte total).
Bugs resolved in XNandPsu_ConvertBbt():
* The calculation of memory BBT entry offset was off by a factor of 4
* The entry offset into the flash BBT has been removed since each flash
BBT directly describes the flash space it is contained within and has
no reference to other devices in the chip
Bugs resolved in XNandPsu_WriteBbt():
* The BBT length calculated was reduced to NumTargetBlocks from
NumBlocks since only the relevant portion of the in-memory BBT should
be written to the flash-based BBT space
* An offset was applied to values retrieved from the in-memory BBT so
that only the relevant portion was converted and written to the
flash-based BBT
The xnandpsu driver conditionally tries to wrap page index to NAND chip
size causing an off-by-one error where the first page of the second chip
is not wrapped correctly. This removes the conditional so that page
index is always wrapped.
On configurations where multiple NAND chips are in use, the erasure
loop in XNandPsu_Erase() can reset the loop counter variable once it
gets to blocks in the second chip causing an infinite loop overwriting
parts of the first chip. This change ensures that the loop counter is
not accidentally reset.
When a buffer is modified by both hardware components such as DMA and by
software components, the buffer cache state must be kept in sync so that
data is not accidentally thrown away during future invalidations.
When polling hardware registers in high performance situations, don't
rely on usleep or other standard sleep functions since they will
necessarily rely on kernel ticks to be woken up. This can easily cause
an immense reduction in throughput.
The changes here ensure correct cache maintenance around DMA operations.
One cache flush was missing and two cache invalidations occurred before
the corresponding read that would make them necessary.
The address of the nandpsu peripheral is specific to the ZynqMP SoC and
not relevant to other devices that might have one or more instances of
this peripheral.
This adds Xilinx's driver for the Xilinx NAND controller embedded in the
ZynqMP SoC. Within that device alone, it is possible to access this
peripheral from MicroBlaze, ARMv7, and ARMv8 cores. This has been added
to the hardware ZynqMP BSPs since QEMU does not support emulation of
this peripheral. This driver supports polled operation only. The
imported files are and should be able to remain unmodified. Import
information is kept in bsps/shared/dev/nand/VERSION.
