Commit Graph

5 Commits

Author SHA1 Message Date
Kinsey Moore
68b0db358c bsps/aarch64: Remove erroneous cache feature
The AArch64 cache implementation does not define
rtems_cache_disable_data(), but declares that it does via
CPU_CACHE_SUPPORT_PROVIDES_DISABLE_DATA. The existing implementation of
_CPU_cache_disable_data() is sufficient to enable this functionality
without the erroneous cache feature flag.

Closes #4569
2021-12-12 12:04:02 -06:00
Kinsey Moore
8810e08371 bsps/aarch64: Advertise cache function support
Ensure that cache functions are flagged as usable by the generic cache
implementation code.
2021-05-27 14:09:00 -05:00
Kinsey Moore
12ec459f4a bsps/aarch64: Align MVAs consistently
This fixes a bug where addresses were not being aligned correctly.
Addresses used in cache functions are now aligned consistently using
RTEMS_ALIGN_DOWN.
2021-05-27 14:09:00 -05:00
Kinsey Moore
25ca2ec4cb bsps/aarch64: Break out system registers
Break out system register definitions and accessors so that they're
usable by other parts of RTEMS.
2021-05-27 14:09:00 -05:00
Kinsey Moore
db68ea1b9b bsps: Add Cortex-A53 LP64 basic BSP
This adds an AArch64 basic BSP based on Qemu's Cortex-A53 emulation with
interrupt support using GICv3 and clock support using the ARM GPT.
2020-10-05 16:11:40 -05:00