rtems

RTOS/rtems

Fork 0

forked from Imagelibrary/rtems

Commit Graph

Author	SHA1	Message	Date
Sebastian Huber	bbc87a471d	bsps/aarch64: Simplify SMP support Remove copy and paste from the arm SMP support. The shared aarch64 implementation of rtems_cache_enable_data() does not enable a particular cache, it just enables the C bit in the SCTLR_EL1. This is already done in aarch64_mmu_enable(). There is no need to wait for secondary processors in _CPU_SMP_Start_processor().	2024-09-29 23:13:32 +00:00
Kinsey Moore	3647725832	bsps/shared: Add PSCI SMP startup support This adds the SMP function that supports spinup of additional CPU cores using the ARM standard PSCI inteface. This interface is provided by QEMU as well as ARM Trusted Firmware running in monitor mode (EL3) on ARMv7 and AArch64 CPUs. This supports activation va SMC or HVC instructions depending on BSP configuration.	2021-09-21 08:58:31 -05:00

Author

SHA1

Message

Date

Sebastian Huber

bbc87a471d

bsps/aarch64: Simplify SMP support

Remove copy and paste from the arm SMP support.  The shared aarch64
implementation of rtems_cache_enable_data() does not enable a particular
cache, it just enables the C bit in the SCTLR_EL1.  This is already done
in aarch64_mmu_enable().  There is no need to wait for secondary
processors in _CPU_SMP_Start_processor().

2024-09-29 23:13:32 +00:00

Kinsey Moore

3647725832

bsps/shared: Add PSCI SMP startup support

This adds the SMP function that supports spinup of additional CPU cores
using the ARM standard PSCI inteface. This interface is provided by QEMU
as well as ARM Trusted Firmware running in monitor mode (EL3) on ARMv7 and
AArch64 CPUs. This supports activation va SMC or HVC instructions
depending on BSP configuration.

2021-09-21 08:58:31 -05:00

2 Commits