Done:
arm
bfin
epiphany
i386
lm32
m32c
mips
moxie
nios2
or1k
powerpc
riscv
sh
sparc
sparc64
v850
To do:
m68k
Differences noted:
+ endfile was sometimes before startfile
+ endfile sometimes was hard-coded and did not have -qrtems version
+ Should -e XXX (e.g. entry point) be in linkcmds?
+ Should -u XXX (e.g. undefined symbols) be in linkcmds?
+ Typos: Odd spacing, "old_endfiles" typo, and *(old_endfiles) (not %)
+ nios2: Referenced crtnn.o not crtn.o (error)
Need to revisit:
+ m32c, moxie, sparc64 includes !nostdlib which is not used elsewhere
+ sh has -EL/-EB mapping. Why needed?
+ sparc64 didn't include crti.o/crtn.o but it is part of toolset
+ v850 uses something like this for link and end_file:
"%{qrtems: %(old_link)}"
This means that these are unnecessary. Try this on all.
+ mips uses old_link all the time also.
+ arm/tms750 adds -EB.
+ powerpc: Why do we have rtems_crt* and not use something from GCC?
Updates #3520.
Since the <tm27.h> is highly BSP-dependent and used only by the tm27
test program we must provide this header file for each BSP. Without the
preinstall build target each header file must have a unique source
header file.
Update #3254.
Add BSP_VERBOSE_FATAL_EXTENSION to RTEMS_BSP_CLEANUP_OPTIONS to
optionally print the RTEMS version, the fatal source and the fatal code
in the shared bsp_fatal_extension().
Close#3248.
Remove BSP-specific defaults for RTEMS_BSP_CLEANUP_OPTIONS to simplify
the BSP configuration and documentation. Change defaults to:
BSP_PRESS_KEY_FOR_RESET=0
BSP_RESET_BOARD_AT_EXIT=1
BSP_PRINT_EXCEPTION_CONTEXT=1
Due to a new rtems_panic() implementation, it is possible to replace the
PowerPC-specific BSP_panic() with rtems_panic(). Remove BSP_panic()
implementations.
Close#3245.
Add device spin-lock around internal data structures. Since the driver
provides a low-level C API accessing the descriptors the application
still needs to implement part of the SMP synchonization needed between
Interrupt handler and tasks.
Close#2355.
Use the boot time to initialize the state. Use the state, the current
CPU counter and a very simple pseudo random number generator for
getentropy(). At least, this enables to pass the test "GETENTROPY 1" on
ERC32.
Update #3239.
If necessary, the BSP can now have it's clock and SDRAM initialization
in the SRAM instead of the SDRAM. This allows to change the clock
frequency during the startup of an SDRAM application.
SMP safe by spin-lock protection and semaphore. On spin-lock per SpW/AMBA
port to allow multiple parallel register operations per port. A common
semaphore for general SpW router configuration such as routing table.
Move to a C API instead of using the I/O Manager. The SpW router driver
does not perform any I/O only management of the router.
Update #2355.
* Use #ifdefs for 32/64 bit code
* Use unsigned long which is 32-bit on riscv32 and 64-bit on riscv64 (register size)
* Move the code to a new shared riscv folder to be shared between riscv32 and riscv64
* Rename RTEMS_CPU extracted from command line to shared riscv target s/riscv*/riscv
Update #3109
