With the addition of dynamically registered libchip serial devices,
there is the need to be able to use printk() before the console driver
has initialized the indirect pointer table. This lets printk() support
routines call pass a control structure directly without a lookup through
the uninitialized indirect one.
PR 2015/bsps
Since the configuration struct is always present one can let
DATA initialize it to reduce footprint, at the same time it
is made weak to let the user able to configure the SHM driver
without editing the driver code.
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
This PR was about a warning for no previous prototype for
rtems_interrupt_level_attribute. This method exists (like
a few others) to have real bodies for Classic API services
implemented as macros. These macros are not available from
anything but C and C++. The most explicit use was in the Ada
binding but these would be needed from assembly language
or any other non-C based language.
On top of needing a prototype, the methods were misnamed.
They were related to modes. This renames them, moves the
file, fixes test code, etc.
* console/console.c: char_ready() was never returning true so console
never processed input data
* console/console.c: added printk() support to default device
* include/bsp.h: Added #define for MOT_162BUG_VEC_ADDRESS
* startup/bspclean.c: Modified to use MOT_162BUG_VEC_ADDRESS
* startup/bspstart.c: Modified to use MOT_162BUG_VEC_ADDRESS
* make/custom/mvme162.cfg: Modified to use "RTEMS_CPU_MODEL=68lc040"
and "CPU_CFLAGS = -mcpu=68040 -msoft-float" so BSP will always
work with all board variations.
* README: Added notes on user required configuration changes and
information about board models and variants
* README.models: New file that contains a detailed list of MVME162
models and variants.
Signed-off-by: Vic Hoover <victor.hoover.ctr@navy.mil>
* console/console.c: char_ready() was never returning true so console
never processed input data
* console/console.c: added printk() support to default device
* include/bsp.h: Added #define for MOT_162BUG_VEC_ADDRESS
* startup/bspclean.c: Modified to use MOT_162BUG_VEC_ADDRESS
* startup/bspstart.c: Modified to use MOT_162BUG_VEC_ADDRESS
* make/custom/mvme162.cfg: Modified to use "RTEMS_CPU_MODEL=68lc040"
and "CPU_CFLAGS = -mcpu=68040 -msoft-float" so BSP will always
work with all board variations.
* README: Added notes on user required configuration changes and
information about board models and variants
* README.models: New file that contains a detailed list of MVME162
models and variants.
Signed-off-by: Vic Hoover <victor.hoover.ctr@navy.mil>
GRETH driver updated, 10-15% performance improvements for GBIT MAC,
unnecessary RX interrupts not taken which under heavy load saves approx.
1500 interrupts/s, one task removed saving about 5kb memory and 1 bug
solved.
BUG: RX interrupt was enabled before the RX-daemon was created which could
result in a faulty call to rtems_event_send.
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
Deadlock may arise when the EDCL bug link is used to tunnel
console output over Ethernet, when Ethernet is down one should
avoid using console (only during debugging of LEON targets)
Author: Marko Isomaki <marko@gaisler.com>
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
PR 2010/bsps
The previous code only checked if d-cache snooping was implemented,
however snooping may be available but not enabled which may lead
to driver bugs.
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
PR 2009/bsps
All LEON3/4 systems have a CPU-id, if on a single-CPU system the
ID is always zero. On a multicore system it ranges from 0 to 15.
The CPU index should always by updated even in a non-MP RTEMS OS
since the CPU running RTEMS may not always be CPU0. For example
when RTEMS runs on CPU1 and Linux on CPU0 in a mixed ASMP system.
The old code executed within the IRQ controller initialization code
makes no sense since the ASR register is a CPU register, it has
nothing to do with AMBA initialization either.
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
The SHM code always wakes one CPU more that configured, however
this has never been a problem since RTEMS will be running on all CPUs
or only two cores were available.
PR 2006/bsps
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
