PR 2015/bsps
Since the configuration struct is always present one can let
DATA initialize it to reduce footprint, at the same time it
is made weak to let the user able to configure the SHM driver
without editing the driver code.
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
* console/console.c: char_ready() was never returning true so console
never processed input data
* console/console.c: added printk() support to default device
* include/bsp.h: Added #define for MOT_162BUG_VEC_ADDRESS
* startup/bspclean.c: Modified to use MOT_162BUG_VEC_ADDRESS
* startup/bspstart.c: Modified to use MOT_162BUG_VEC_ADDRESS
* make/custom/mvme162.cfg: Modified to use "RTEMS_CPU_MODEL=68lc040"
and "CPU_CFLAGS = -mcpu=68040 -msoft-float" so BSP will always
work with all board variations.
* README: Added notes on user required configuration changes and
information about board models and variants
* README.models: New file that contains a detailed list of MVME162
models and variants.
Signed-off-by: Vic Hoover <victor.hoover.ctr@navy.mil>
GRETH driver updated, 10-15% performance improvements for GBIT MAC,
unnecessary RX interrupts not taken which under heavy load saves approx.
1500 interrupts/s, one task removed saving about 5kb memory and 1 bug
solved.
BUG: RX interrupt was enabled before the RX-daemon was created which could
result in a faulty call to rtems_event_send.
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
Deadlock may arise when the EDCL bug link is used to tunnel
console output over Ethernet, when Ethernet is down one should
avoid using console (only during debugging of LEON targets)
Author: Marko Isomaki <marko@gaisler.com>
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
PR 2010/bsps
The previous code only checked if d-cache snooping was implemented,
however snooping may be available but not enabled which may lead
to driver bugs.
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
2009/bsps
All LEON3/4 systems have a CPU-id, if on a single-CPU system the
ID is always zero. On a multicore system it ranges from 0 to 15.
The CPU index should always by updated even in a non-MP RTEMS OS
since the CPU running RTEMS may not always be CPU0. For example
when RTEMS runs on CPU1 and Linux on CPU0 in a mixed ASMP system.
The old code executed within the IRQ controller initialization code
makes no sense since the ASR register is a CPU register, it has
nothing to do with AMBA initialization either.
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
The SHM code always wakes one CPU more that configured, however
this has never been a problem since RTEMS will be running on all CPUs
or only two cores were available.
PR 2006/bsps
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
* irq/irq.c: Removed printk() before the interrupt initialization
because it somehow destroys the interrupt context.
* make/custom/nds.cfg: Enable Thumb interwork.
* startup/bspstart.c: Set default exception handler.
PR 1832/libcpu
* at91rm9200/irq/irq.c: he bsp_interrupt_dispatch routine does not
determine the correct interrupt source number. According to the
datasheet, the reading of the interrupt vector register (AIC_IVR)
notifies the hardware that the OS is taken care of the interrupt.
Only after AIC_IVR have been read can the correct source number be
read from the interrupt status register (AIC_ISR).
PR 1786/bsps
* Makefile.am: Add support for Altivec.
* startup/bspstart.c, Makefile.am: Use shared/startup/zerobss.c instead.
* make/custom/mvme5500.cfg: Change CPU_CFLAGS to
"-mcpu=7450 -mtune=7450 -Dmpc7455"
* irq/BSP_irq.c, pci/detect_host_bridge.c, pci.c, pcifinddevice.c:
Remove warnings.
* vme/VMEConfig.h, include/bsp.h: use VME shared IRQ handlers.
* network/if_100MHz/GT64260eth.c: Recycle the Rx mbuf if there
is any Rx error.
PR 1781/bsps
* console/console-io.c: The UART RX and TX are different ISR
now. So the array containing the registeration changes. The
change is due to change in the libcup uart function.
PR 1781/bsps
* ChangeLog, Makefile.am, README, bsp_specs, configure.ac,
preinstall.am, times, console/console.c, include/bsp.h,
include/cplb.h, include/tm27.h, make/custom/TLL6527M.cfg,
startup/bspstart.c, startup/linkcmds: New files.
Initial port for the TLL6527Mboard that contains blackfin 52X
range of processors. Used eZKit533 as a reference for building
the port.
PR 1781/bsps
* bf52x/include: Added additional MMR.
* bf52x/interrupt: The BF52X processors have a different
System interrupt controller than present in the 53X range of
processors. The 52X have 8 interrupt assignment registers. The
implementation uses tables to increase predictability.
* serial/uart.?: Added DMA based and interrupt based transfer
support. The uart code used a single ISR for TX and RX and tried
to identify and multiplex inside the ISR. In the new code the
type of interrupt is identified by the central ISR dispatcher
bf52x/interrupt or interrupt/. This simplifies the UART ISR.
PR 1768/bsps
* shared/irq/irq_asm.S: The nbench benchmark highlighted the fact that
we do not perform a cld before calling C code in the ISR. This was
historically not a problem but gcc 4.3 changed the behavior. From
http://gcc.gnu.org/gcc-4.3/changes.html
PR 1738/bsps
* clock/clock.c, include/bsp.h, network/network.c: system clock driver
programs the PIT w/o assuming the CPU clock frequency being a power
of two.
PR 1748/bsps
* clock/ckinit.c, include/leon.h: When the clock tick generates an
interrupt WHILE we have interrupts disabled doing a get TOD or
uptime, the get nanoseconds handler was returning a bogusly large
number.
PR 1748/bsps
* clock/ckinit.c: When the clock tick generates an interrupt WHILE we
have interrupts disabled doing a get TOD or uptime, the get
nanoseconds handler was returning a bogusly large number.
