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cc825d0322ecdf67d3254da97b37d69fe7b6519c
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6 Commits

Author SHA1 Message Date
Sebastian Huber
2d07ce6d21 config: Add CONFIGURE_DIRTY_MEMORY 
Replace the BSP_DIRTY_MEMORY BSP option with a CONFIGURE_DIRTY_MEMORY
configuration option.

Update #3843.
 2020-02-06 15:19:36 +01:00
Sebastian Huber
eea21eaca1 bsps: Rework work area initialization 
The work area initialization was done by the BSP through
bsp_work_area_initialize(). This approach predated the system
initialization through the system initialization linker set. The
workspace and C program heap were unconditionally initialized.  The aim
is to support RTEMS application configurations which do not need the
workspace and C program heap.  In these configurations, the workspace
and C prgram heap should not get initialized.

Change all bsp_work_area_initialize() to implement _Memory_Get()
instead.  Move the dirty memory, sbrk(), per-CPU data, workspace, and
malloc() heap initialization into separate system initialization steps.
This makes it also easier to test the individual initialization steps.

This change adds a dependency to _Heap_Extend() to all BSPs.  This
dependency will be removed in a follow up change.

Update #3838.
 2020-02-04 06:06:41 +01:00
Sebastian Huber
c331bdc777 record: Allow tracing of ISR disable/enable 
Directly use the CPU port API in boot_card() to allow tracing of the
higher level interrupt disable/enable routines, e.g.
_ISR_Local_disable() and _ISR_Local_enable().  Currently, there is no
configuration option to enable this.  Below is a patch.  It may be used
to investigate some nasty low level bugs in the system.

Update #3665.

diff --git a/cpukit/include/rtems/score/isrlevel.h b/cpukit/include/rtems/score/isrlevel.h
index c42451d010..46d361ddc2 100644
--- a/cpukit/include/rtems/score/isrlevel.h
+++ b/cpukit/include/rtems/score/isrlevel.h
@@ -40,6 +40,10 @@ extern "C" {
  */
 typedef uint32_t   ISR_Level;

+uint32_t rtems_record_interrupt_disable( void );
+
+void rtems_record_interrupt_enable( uint32_t level );
+
 /**
  *  @brief Disables interrupts on this processor.
  *
@@ -56,8 +60,7 @@ typedef uint32_t   ISR_Level;
  */
 #define _ISR_Local_disable( _level ) \
   do { \
-    _CPU_ISR_Disable( _level ); \
-    RTEMS_COMPILER_MEMORY_BARRIER(); \
+    _level = rtems_record_interrupt_disable(); \
   } while (0)

 /**
@@ -72,10 +75,7 @@ typedef uint32_t   ISR_Level;
  *  _ISR_Local_disable().
  */
 #define _ISR_Local_enable( _level ) \
-  do { \
-    RTEMS_COMPILER_MEMORY_BARRIER(); \
-    _CPU_ISR_Enable( _level ); \
-  } while (0)
+  rtems_record_interrupt_enable( _level )

 /**
  *  @brief Temporarily enables interrupts on this processor.
@@ -98,9 +98,8 @@ typedef uint32_t   ISR_Level;
  */
 #define _ISR_Local_flash( _level ) \
   do { \
-    RTEMS_COMPILER_MEMORY_BARRIER(); \
-    _CPU_ISR_Flash( _level ); \
-    RTEMS_COMPILER_MEMORY_BARRIER(); \
+    rtems_record_interrupt_enable( _level ); \
+    _level = rtems_record_interrupt_disable(); \
   } while (0)

 /
 2019-09-06 08:09:34 +02:00
Sebastian Huber
212663bede bsps: Adjust architecture Doxygen groups 
- Use CamelCase as it is not used in our C code.  Enables simple search and
   replace.

 - Prefix with "RTEMS" to aid deployment and integration.  It aids
   searching and sorting.

Update #3706.
 2019-03-04 07:51:38 +01:00
Sebastian Huber
c4ccf26cb7 bsps: Convert all bsp_predriver_hook() 
Use RTEMS_SYSINIT_ITEM() instead.

Update #2408.
 2018-04-20 09:49:36 +02:00
Sebastian Huber
c5fe44319e bsps: Move bootcard.c to bsps 
This patch is a part of the BSP source reorganization.

Update #3285.
 2018-04-12 07:09:12 +02:00