Make sure there is no spurious empty line between the gcov info and the
*** END OF GCOV INFO BASE64 ***
line. This helps to recalculate the hash correctly at the consumer
side.
This adds a pthread that runs the test as well to increase test
coverage. The original test would have passed if all threads returned
the address of the Init task's errno since no additional threads or
tasks were checked.
Stacked mode doubles the number of sectors and device size while
parallel mode doubles the sector size and the device size. Make sure
that this is accounted for in the device size accessor.
When the switch to waf occurred, the SMP support in i386 was left out
causing it to accumulate a minor amount of cruft. This enables SMP for
the i386 BSPs that support it and updates them for the API drift that
has occurred since the change.
`tms570_sci_interrupt_handler()` is called when an RX interrupt fires. It checks
in the register `FLR`, the `RXRDY` bit (Receiver ready flag - indicate that the
SCIRD contains new data). If it is set, it calls
`tms570_sci_read_received_chars()`.
`tms570_sci_read_received_chars()` checks the register `RD` against 0. If it is
non zero, it returns 1 to indicate that one byte was read.
In the old behavior, if it is zero, the function returns 0 to indicate that no
data was read.
The new behavior is to not silently drop 0x00 bytes. Ignoring 0x00 bytes is fine
when working with printable text (which, I assume, is how this driver was
tested), but as soon as the UART is used in non canonical (raw) mode, with
potentially 0x00 bytes, these bytes will be silently dropped, causing issues in
the data/protocol layer above.
Update #4982.
This enables the VME support for the MVME2500. Note that the PCIe
support from libbsd is used. So you need the related libbsd patches for
this to work.
If the drivers in libbsd are not enabled, the linker should not pick up
anything from this patch.
Add a function that allows to set the polarity (active-low / negative
edge triggered or active-high / positive edge triggered) and sense
(level or edge sensitive) of the external interrupts.
This alters the API for rtems_cache_coherent_add_area to allow reporting
of failures that can occur during the process of adding a new area to
the coherent cache heap.
