Sebastian Huber
c388c3d19e
bsps/arm: Add missing GICv3 distributor registers
2024-10-08 00:30:54 +02:00
Sebastian Huber
bd9f5c1eb0
Revert "build: Fix "set-value-enabled-by""
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This reverts commit a616d26d6d .
The change was accidentally submitted and relates to a different branch.
2024-10-05 19:31:02 +00:00
Christian Mauderer
98f2ae3449
bsps/arm/beagle: Remove README.md and old script
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The information from the README.md have been merged into the
documentation.
The necessary tools for the sdcard.sh are quite tricky to build. All
necessary information to create an SD image are in the documentation
already. So the script isn't necessary any more.
Update #5088
2024-10-05 19:29:15 +00:00
alessandronardin
d604ec899d
posix/aio_misc.c: Added comment explaining coverity false positive.
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Added comment in rtems_aio_handle() explaining why the Coverity
issue 1592927 is a false positive.
2024-10-05 19:28:27 +00:00
Kinsey Moore
85ccfe24bf
bsps/aarch64/mmu: Align dynamically mapped blocks
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Dynamically mapped blocks must be aligned to the MMU page size just like
startup-configured blocks. This was not being enforced and could cause a
hang with bad input.
2024-10-04 13:25:42 +00:00
Sebastian Huber
a616d26d6d
build: Fix "set-value-enabled-by"
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Fix Python error:
File "wscript", line 1096, in _set_value_enabled_by
if _is_enabled(conf.env.ENABLE, value_enabled_by["enabled-by"]):
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
TypeError: _is_enabled() missing 1 required positional argument: 'enabled_by'
2024-10-04 03:01:16 +02:00
Chris Johns
ea475e8719
waf: Update waf to version 2.1.2
2024-10-03 17:59:30 +00:00
Chris Johns
43e201e210
git: Remove auto* files from git ignore
2024-10-03 18:37:05 +10:00
Kinsey Moore
a9055cbf10
cpukit/aarch64: Fix spelling
2024-10-03 03:02:54 +00:00
Kinsey Moore
f80cee565b
spec/libtests: Exclude Thumb-only BSPs from building dl13
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This test requires ARM instruction support and causes build failures on
Thumb-only BSPs.
2024-10-03 02:03:09 +00:00
Sebastian Huber
410436b800
arm/xilinx-zynqmp-rpu: Use UART 0 by default
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This simplifies the setup for sequential test runs of the APU and RPU
BSPs.
2024-10-02 05:36:00 +02:00
Sebastian Huber
9624b31408
arm/xilinx-zynqmp-rpu: Implement bsp_reset()
2024-10-02 05:36:00 +02:00
Sebastian Huber
95649a0aca
arm/xilinx-zynqmp-rpu: Add section for the OCM
2024-10-02 05:36:00 +02:00
Sebastian Huber
75062c2dbf
arm/xilinx-zynqmp-rpu: Simplify MPU configuration
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Use the PMSAv7 support from <rtems/score/armv7-pmsa.h> instead of the
one from the Xilinx support.
2024-10-02 05:36:00 +02:00
Sebastian Huber
dddbdf4d9a
arm/xilinx-zynqmp-rpu: Add split mode BSP variants
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Rename xilinx_zynqmp_rpu BSP variant to zynqmp_rpu_lock_step to
emphasize that this BSP is for the lock-step mode RPU configuration.
Add BSP variants zynqmp_rpu_split_0 and zynqmp_rpu_split_1 for the split
mode RPU configuration for core 0 and 1 respectively.
2024-10-02 05:35:47 +02:00
Sebastian Huber
5f1a9d3346
arm/xilinx-zynqmp-rpu: Simplify startup
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There is no need to copy sections since the linker command file has no separate
runtime and load regions for the sections.
2024-10-02 05:24:30 +02:00
Sebastian Huber
1b2ebe1516
arm/xilinx-zynqmp-rpu: Remove superfluous defines
2024-10-02 05:24:30 +02:00
Sebastian Huber
08f27b35aa
arm/xilinx-zynqmp-rpu: Remove superfluous option
2024-10-02 05:24:30 +02:00
Sebastian Huber
a78d31de7f
arm/xilinx-zynqmp-rpu: Fix file header and copyrights
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Remove copyright from DornerWorks since the files contain not contributions
from this company. Fix the copyright years of the embedded brains
contributions.
2024-10-02 05:24:30 +02:00
Sebastian Huber
c91b26ef76
arm/xilinx-zynqmp-rpu: Add cache manager support
2024-10-02 05:24:30 +02:00
Sebastian Huber
4515a7b593
arm/xilinx-zynqmp-rpu: Remove superfluous object
2024-10-02 05:24:30 +02:00
Sebastian Huber
7d9914b90e
arm/xilinx-zynqmp-rpu: Use -O2
2024-10-02 05:24:30 +02:00
Sebastian Huber
c4a5dfeb5d
arm/xilinx-zynqmp-rpu: Include standard header
2024-10-02 05:24:30 +02:00
Sebastian Huber
ddef4ed1b0
dev/irq: Conditionally enable GIC get/set group
2024-10-02 05:24:30 +02:00
Sebastian Huber
a947bba9df
dev/irq: Add BSP_IRQ_HAVE_GET_SET_AFFINITY
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Allow BSPs to provide the interrupt get/set affinity implementation even for
non-SMP configurations.
2024-10-02 05:24:30 +02:00
Sebastian Huber
2c2f9a1451
dev/irq: Add BSP_ARM_GIC_MULTI_PROCESSOR_SECONDARY
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Add support for the BSP_ARM_GIC_MULTI_PROCESSOR_SECONDARY build option
for the GICv2 support. This option is useful for multiprocessor systems
without SMP support.
2024-10-02 05:24:30 +02:00
Sebastian Huber
54c64352d5
bsps/arm: Add files to Doxygen group
2024-10-02 05:24:30 +02:00
Sebastian Huber
8c497f2693
bsps/shared/xil: Add files to Doxygen group
2024-10-02 05:24:30 +02:00
Sebastian Huber
559d90bb10
arm: Improve CPU_Exception_frame
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Add a registers member to allow an indexed access to the registers.
2024-10-02 05:24:30 +02:00
Sebastian Huber
11b772c867
arm: Add support for PMSAv7
2024-10-02 05:24:30 +02:00
Sebastian Huber
9a5f00965b
arm: Install missing header files
2024-10-02 05:24:30 +02:00
Sebastian Huber
5cc08c8f4c
build: Add "set-value-enabled-by" build option action
2024-10-02 05:24:30 +02:00
Sebastian Huber
344526b3e4
build: Add "comment" build option action
2024-10-02 05:24:30 +02:00
Sebastian Huber
4ca49fc200
score: Remove _Per_CPU_State_wait_for_non_initial_state()
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This function is unused.
2024-09-29 23:13:32 +00:00
Sebastian Huber
e2be5ac899
bsps/arm: Allow parallel start of processors
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Do not wait in the individual _CPU_SMP_Start_processor() for the
secondary processor. Wait for all of them in
_CPU_SMP_Finalize_initialization() before the L2 cache is enabled.
2024-09-29 23:13:32 +00:00
Sebastian Huber
276d2efb37
bsp/raspberrypi: Simplify SMP support
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There is no need to wait for the secondary processor in
_CPU_SMP_Start_processor() since _CPU_SMP_Finalize_initialization() does
nothing.
The caller of _CPU_SMP_Start_processor() ensures that we do not start
the current processor.
2024-09-29 23:13:32 +00:00
Sebastian Huber
bbc87a471d
bsps/aarch64: Simplify SMP support
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Remove copy and paste from the arm SMP support. The shared aarch64
implementation of rtems_cache_enable_data() does not enable a particular
cache, it just enables the C bit in the SCTLR_EL1. This is already done
in aarch64_mmu_enable(). There is no need to wait for secondary
processors in _CPU_SMP_Start_processor().
2024-09-29 23:13:32 +00:00
Sebastian Huber
b0a688e69c
bsps: Simplify _CPU_SMP_Finalize_initialization()
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The processor count is always positive.
2024-09-29 23:13:32 +00:00
Sebastian Huber
d8822514e7
score: Add _SMP_Wait_for_ready_to_start_multitasking()
2024-09-29 23:13:32 +00:00
Sebastian Huber
296d7150f0
score: Set boot CPU properties before others
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This allows other CPUs to figure out the boot CPU.
2024-09-29 23:13:32 +00:00
Sebastian Huber
7bd4725942
score: Use _Per_CPU_Get()
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The _Per_CPU_Get() may be more efficient if
_CPU_Get_current_per_CPU_control() is available.
2024-09-29 23:13:32 +00:00
Alex White
38bafce42d
Add aarch64 cpukit paravirtualization support
2024-09-27 20:01:34 +00:00
alessandronardin
653dbdcdbf
posix/aio_misc.c: Added returns on error path in rtems_aio_init()
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Coverity CID 1619695
Added returns on error path in rtems_aio_init().
Without them the code could access uninitialized memory.
Closes #5132 .
2024-09-26 19:09:35 +02:00
alessandronardin
617808b979
posix/aio_misc.c/aio_init(): lock before accessing data
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Coverity CID 1592924
added lock before accessing data.
Closes #5129 .
2024-09-25 17:48:11 +00:00
alessandronardin
de196e0586
posix/aio_misc.c: changed malloc call into calloc
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Coverity CID 1512510
Changed a call to malloc() into a call to calloc()
to avoid access to uninitialized memory.
Closes #5131 .
2024-09-25 17:47:28 +00:00
Kinsey Moore
9eb23924e8
testsuites/sptree01: Fix missing prototype warning
2024-09-25 11:55:40 +00:00
Kinsey Moore
81930e2638
testsuites: Add dl13 test for Thumb to ARM transitions
2024-09-24 20:57:56 -05:00
Kinsey Moore
8f8d0c806b
cpukit/libdl/arm: Add support for trailing Thumb to ARM calls
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This expands the size of an ARM trampoline from 8 bytes to 10 bytes to
support THM_JUMP24 tail calls that require a BX instruction to change
modes.
2024-09-24 19:57:08 -05:00
Kinsey Moore
701e8b2d63
cpukit/libdl/arm: Obey instruction encoding requirements for Thumb BLX
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Calls from Thumb code into ARM code require the use of a BLX instruction
and an optional offset prefix instruction. The BLX instruction encoding
requires that the least significant bit be 0 in all cases while the BL
instruction for Thumb-to-Thumb calls includes that bit as part of the
offset. This ensures that bit 0 of the BLX is set to 0 as required by
the instruction encoding specification.
2024-09-24 19:57:08 -05:00
Gedare Bloom
7cda579524
spec/build: make minimum sample norun
2024-09-24 14:53:02 -06:00