On other targets, the rtems_cache_flush_entire_data() also performs a
clean and invalidate.
This is a workaround for "Answer 68874 - Zynq UltraScale+ MPSoC, APU -
An Eviction Might Overtake A Cache Clean Operation".
Let the caller provide the translation table base and the used page
tables to ease testing.
Simplify the error handling by using early returns.
Return RTEMS_TOO_MANY instead of RTEMS_NO_MEMORY if the page tables are
all used.
There is no need to wait on secondary processors for the GIC distributor
enable since the BSPs for real targets start the secondary processors
in _CPU_SMP_Start_processor().
Whether a floating-point implementation supports trapping of
floating-point exceptions is implementation defined. At least Qemu,
Cortex-A53, and Cortex-A72 do not support them.
In SMP configurations, check that we run on a configured processor. If not,
then there is not much that can be done since we do not have a stack available
for this processor. Just loop forever in this case. Do this in assemlby to
ensure that no stack memory is used.
Make the support for starting in EL2/EL3 customizable. A boot loader or
the Arm Trusted Firmware should start RTEMS in non-secure EL1 mode.
In start.S, use local labels.
For the aarch64/xilinx-zynqmp the support for starting in EL2/EL3 is
disabled by default. For the Qemu xlnx-zcu102 machine, the default is
to start in non-secure EL1 mode. This can be controlled by options, for
example "-machine xlnx-zcu102,secure=on,virtualization=on".
The information from the README.md have been merged into the
documentation.
The necessary tools for the sdcard.sh are quite tricky to build. All
necessary information to create an SD image are in the documentation
already. So the script isn't necessary any more.
Update #5088
Dynamically mapped blocks must be aligned to the MMU page size just like
startup-configured blocks. This was not being enforced and could cause a
hang with bad input.
Rename xilinx_zynqmp_rpu BSP variant to zynqmp_rpu_lock_step to
emphasize that this BSP is for the lock-step mode RPU configuration.
Add BSP variants zynqmp_rpu_split_0 and zynqmp_rpu_split_1 for the split
mode RPU configuration for core 0 and 1 respectively.
Remove copyright from DornerWorks since the files contain not contributions
from this company. Fix the copyright years of the embedded brains
contributions.
