Commit Graph

781 Commits

Author SHA1 Message Date
Chris Johns
bc8ffae115 bsp/xilinx-zynq: Add devcfg and slcr drivers
The devfg driver loads the PL with a bitfile image. The driver can also
support scrubbing.

These drivers are from Patrick Gauvin <pggauvin at gmail.com> and a thread
on the devel list: https://lists.rtems.org/pipermail/devel/2017-May/017705.html
2024-10-30 23:04:42 +00:00
Kinsey Moore
95d904b036 spec: Apply CLOCK_DRIVER_USE_ONLY_BOOT_PROCESSOR where expected
The general optclkbootcpu option is targeted at all ARM QEMU BSPs, but
is not actually linked in to the build tree. This links it in as
expected and removes a redundant and stale copy in the realview PBX BSP.
2024-10-30 18:56:36 +00:00
Kinsey Moore
1bba349478 bsps: Remove imported Xilinx headers
This removes the headers imported from the embeddedsw repository in
favor of a much thinner shim. This also removes the complicated build
system configuration necessary to support use of these headers. The
primary reason for removal is that certain external Xilinx libraries
also require use of these headers and this causes version mismatches and
header conflicts that can be avoided.
2024-10-28 19:23:49 +00:00
Utkarsh Verma
d17116d310 aarch64/raspberrypi: improve UART
- Add support for four new ports, UART2-UART5.
- Add build options to allow console device configuration.
- Segregate device-specific definitions from the device family files. X macros
  are used to maintain a single source of truth and have the configuration
  done at compile-time
- Add raspberrypi_uart_init() to make it convenient for users to install uart
  devices

Close #5130

Co-authored-by: Ning Yang <yangn0@qq.com>
2024-10-28 15:12:21 +00:00
Kinsey Moore
ee34dd12f4 spec/aarch64: Rename Versal BPSs to be in line with ZynqMP 2024-10-28 08:21:36 +00:00
Purva Yeshi
eaaeebedda riscv/beaglevfire: Rename 'bvf' to 'beaglevfire' 2024-10-25 21:23:23 +00:00
Francescodario Cuzzocrea
9d45cf1b44 riscv: add bsp for beagle v fire
Signed-off-by: Francescodario Cuzzocrea <bosconovic@gmail.com>
2024-10-25 21:23:23 +00:00
Gedare Bloom
0d15487401 riscv/niosv: use default values that compile 2024-10-25 13:49:36 +00:00
Kevin Kirspel
e9957cd8e3 riscv/niosv: Adding a new NIOS V BSP to RISC-V 2024-10-25 13:49:36 +00:00
Kinsey Moore
907ded868d spec/bsps/aarch64/zynqmp: Complete the transition to consistent naming
These references were missed in the last renaming patch causing the
ILP32 BSP to fail to build.

Closes #5119
2024-10-20 21:10:49 -05:00
Sebastian Huber
e7ee376803 aarch64/zynqmp: Fix build due to BSP renaming
Update #5119.
2024-10-20 09:55:19 +02:00
Kinsey Moore
a34bc70dc5 spec/bsps/aarch64/zynqmp: Remove overly specific BSP and rename generic BSP
Updates #5119
2024-10-20 02:50:22 +00:00
Kinsey Moore
b8bd1a1ce3 spec/bsps/aarch64: Update BSP naming to be more consice
This removes the xilinx and lp64 identifiers from the ZynqMP BSPs and
updates those names throughout the build system. The xilinx identifier
is being removed because it is implied by zynqmp and lp64 is being
removed because it is the default for AArch64.

This also renames grp_zu3eg.yml to grp_hardware.yml to more accurately
reflect its purpose.

Updates #5119
2024-10-19 02:21:49 +00:00
Kinsey Moore
e6cadcf0cc spec/bsps: Clean up stale references to minimum.exe in test configurations
Now that minimum.exe is minimum.norun.exe, the tester will not attempt
to run this sample test and will therefore not categorize it as a
failure since it includes no output. BSP-level test configurations for
this test can now be removed since those configurations only existed to
prevent it from being run.
2024-10-19 02:21:09 +00:00
Kinsey Moore
3562f1d028 spec/bsps/arm: Remove the mercury-specific BSP
This BSP has been superceded by the generic BSPs supporting lockstep and
each of the cores in split mode.

Updates #5119
2024-10-17 21:33:51 -05:00
Sebastian Huber
bb2cd445e1 bsps/aarch64: Add AARCH64_MMU_PHYSICAL_ADDRESS_RANGE_BITS
This avoids dead code in the MMU setup.
2024-10-11 01:27:48 +02:00
Sebastian Huber
4b1e80dff5 bsps/aarch64: Improve MMU mapping
Produce only one fatal error.  Fix potential integer overflow errors.
2024-10-11 01:27:48 +02:00
Sebastian Huber
8c4cc767b5 aarch64/xilinx-zynqmp: Move MMU config table 2024-10-11 01:27:48 +02:00
Sebastian Huber
cfd885850a bsps/aarch64: Use fatal error for data cache disable
On the Cortex-A cores, at least the L1 data cache is required to provide
support for atomic operations.

Update #5050.
2024-10-11 01:27:48 +02:00
Sebastian Huber
f43042cd06 bsps: Move <bsp/linker-symbols.h> to shared
Move architecture-independent items to a shared <bsp/linker-symbols.h>.
Allow architectures to customize it through <bsp/linker-symbols-arch.h>.
2024-10-11 01:27:48 +02:00
Sebastian Huber
1524b5f923 aarch64/xilinx-zynqmp: Move get I2C clocks
Not all applications use I2C.
2024-10-11 01:27:48 +02:00
Sebastian Huber
8db6a45009 bsps: Assembly implementation for PSCI bsp_reset()
Avoid issues with potential dead code after the secure monitor or
hypervisor call.
2024-10-11 01:27:48 +02:00
Sebastian Huber
2b36492366 aarch64: Move exception frame support
The exception frame handling support is optional.
2024-10-11 01:27:48 +02:00
Sebastian Huber
8d6e8f153c aarch64: Split exception support
Resuming a non-interrupt exception is optional.
2024-10-11 01:27:48 +02:00
Sebastian Huber
07217e3f5c bsps/aarch64: Customize EL2/EL3 start support
Make the support for starting in EL2/EL3 customizable.  A boot loader or
the Arm Trusted Firmware should start RTEMS in non-secure EL1 mode.

In start.S, use local labels.

For the aarch64/xilinx-zynqmp the support for starting in EL2/EL3 is
disabled by default.  For the Qemu xlnx-zcu102 machine, the default is
to start in non-secure EL1 mode.  This can be controlled by options, for
example "-machine xlnx-zcu102,secure=on,virtualization=on".
2024-10-11 01:27:44 +02:00
Kinsey Moore
f80cee565b spec/libtests: Exclude Thumb-only BSPs from building dl13
This test requires ARM instruction support and causes build failures on
Thumb-only BSPs.
2024-10-03 02:03:09 +00:00
Sebastian Huber
410436b800 arm/xilinx-zynqmp-rpu: Use UART 0 by default
This simplifies the setup for sequential test runs of the APU and RPU
BSPs.
2024-10-02 05:36:00 +02:00
Sebastian Huber
95649a0aca arm/xilinx-zynqmp-rpu: Add section for the OCM 2024-10-02 05:36:00 +02:00
Sebastian Huber
75062c2dbf arm/xilinx-zynqmp-rpu: Simplify MPU configuration
Use the PMSAv7 support from <rtems/score/armv7-pmsa.h> instead of the
one from the Xilinx support.
2024-10-02 05:36:00 +02:00
Sebastian Huber
dddbdf4d9a arm/xilinx-zynqmp-rpu: Add split mode BSP variants
Rename xilinx_zynqmp_rpu BSP variant to zynqmp_rpu_lock_step to
emphasize that this BSP is for the lock-step mode RPU configuration.
Add BSP variants zynqmp_rpu_split_0 and zynqmp_rpu_split_1 for the split
mode RPU configuration for core 0 and 1 respectively.
2024-10-02 05:35:47 +02:00
Sebastian Huber
08f27b35aa arm/xilinx-zynqmp-rpu: Remove superfluous option 2024-10-02 05:24:30 +02:00
Sebastian Huber
c91b26ef76 arm/xilinx-zynqmp-rpu: Add cache manager support 2024-10-02 05:24:30 +02:00
Sebastian Huber
4515a7b593 arm/xilinx-zynqmp-rpu: Remove superfluous object 2024-10-02 05:24:30 +02:00
Sebastian Huber
7d9914b90e arm/xilinx-zynqmp-rpu: Use -O2 2024-10-02 05:24:30 +02:00
Sebastian Huber
11b772c867 arm: Add support for PMSAv7 2024-10-02 05:24:30 +02:00
Sebastian Huber
9a5f00965b arm: Install missing header files 2024-10-02 05:24:30 +02:00
Sebastian Huber
4ca49fc200 score: Remove _Per_CPU_State_wait_for_non_initial_state()
This function is unused.
2024-09-29 23:13:32 +00:00
Alex White
38bafce42d Add aarch64 cpukit paravirtualization support 2024-09-27 20:01:34 +00:00
Kinsey Moore
81930e2638 testsuites: Add dl13 test for Thumb to ARM transitions 2024-09-24 20:57:56 -05:00
Gedare Bloom
7cda579524 spec/build: make minimum sample norun 2024-09-24 14:53:02 -06:00
Sebastian Huber
6003ea9d94 aarch64: Add _AArch64_Get_current_processor_for_system_start()
This allows BSPs to customize how the current processor index is
determined during system start.

Update #5064.
2024-09-20 06:17:09 +02:00
Kinsey Moore
3ec16d5f9d spec/aarch64: Add missing symbols to ILP32 linker script 2024-09-20 04:10:11 +00:00
Ning Yang
1b5cd007e7 spec: Refactor arm-pl011 build options
Close #5026
2024-09-19 05:42:16 +00:00
Sebastian Huber
6482c5cc56 bsps/arm: Fix BSP_START_VECTOR_RESERVED_SLOT
The option value is a string.
2024-09-19 04:57:35 +02:00
Utkarsh Verma
0f42153959 dev/serial: Refactor the pl011 driver
- Refactor the pl011 driver to be extensible.
- Add IRQ support and baudrate configuration support for pl011 driver.
- Modify related BSP.
- Add doxygen comments for arm-pl011.

Close #5026

Co-authored-by: Ning Yang <yangn0@qq.com>
2024-09-18 19:30:21 +00:00
Sebastian Huber
d304a817db dev/serial: Move zynq_uart_input_clock()
This allows to wrap this function using the linker.
2024-09-17 01:53:58 +00:00
alessandronardin
31c91be2ea posix/aio: updated documentation after changes to lio_listio()
updated the doxygen comment in aio.h
updated the description in spec/build/cpukit/optposix.yml
2024-09-13 21:30:02 +00:00
Joel Sherrill
9d6f171039 bsps/i386/include/bsp/irq.h is pc386 specific
The IRQ list in this file are specific to PC hardware and should be
part of the BSP. Further, there are paravirtualized environments which
do not follow the PC hardware IRQ list. Moving this avoids collisions.
2024-09-12 04:58:14 +00:00
Joel Sherrill
3aa1f1faee poll.h and sys/poll.h were in both RTEMS and Newlib
Remove the copies in RTEMS. Most POSIX headers are in Newlib.

CLoses #5126
2024-09-12 04:57:43 +00:00
Kinsey Moore
6dee307542 bsps/stm32h7: Add SPI support
This adds support for the 6 SPI interfaces on the STM32H7 series chips
with an initial example for the stm32h750b discovery kit development
board. Configuration is similar to existing peripherals. Chip select
lines are software-controlled since the SPI peripheral only supports a
single hardware-controlled chip select line. This implementation does
not use interrupts.
2024-09-06 01:15:21 +00:00