Commit Graph

34892 Commits

Author SHA1 Message Date
Joel Sherrill
2a1449c517 score/src/[t-z]*.c: Change license to BSD-2
Updates #3053.
2022-02-28 10:28:04 -06:00
Joel Sherrill
4a0e418024 score/src/[n-s]*.c: Change license to BSD-2
Updates #3053.
2022-02-28 10:28:04 -06:00
Joel Sherrill
ab02824417 score/src/[a-m]*.c: Change license to BSD-2
Updates #3053.
2022-02-28 10:28:04 -06:00
Sebastian Huber
a286d28695 powerpc: Use .machine any for some inline asm 2022-02-26 07:40:17 +01:00
Sebastian Huber
faaffbd913 riscv: Use zicsr architecture extension
This is required for ISA 2.0 support, see chapter

"Zicsr", Control and Status Register (CSR) Instructions, Version 2.0

in

RISC-V Instruction Set Manual, Volume I: RISC-V User-Level ISA
2022-02-25 20:38:20 +01:00
Sebastian Huber
4b09a4c7b8 bsps/riscv: Add missing include 2022-02-25 20:38:20 +01:00
Sebastian Huber
3cf618b398 bsps/riscv: Support .riscv.attributes 2022-02-25 15:34:06 +01:00
Sebastian Huber
8a640bf817 bsps/powerpc: Do no use Newlib internals
The struct _reent::__sdidinit member was renamed in a recent Newlib.
2022-02-25 15:34:06 +01:00
Joel Sherrill
4bc34704a1 cpukit/libblock: Clean up before license change 2022-02-23 16:30:46 -06:00
Joel Sherrill
cc9f4339e3 score/cpu/i386: Clean up file headers in prep for license change. 2022-02-23 16:30:46 -06:00
Joel Sherrill
1011484867 score/src/schedulersimple*.c: Replace found in found in with found in
Updates #3053.
2022-02-23 16:30:46 -06:00
Kinsey Moore
fa944c5eac spec/microblaze: Use configurable RAM size
When committed, the MicroBlaze RAM size was hard-coded to 16MB. This
changes the default to 256MB and sets the KCU105 BSPs to 2GB since that
is what the board has on it.
2022-02-23 12:33:55 -06:00
Kinsey Moore
3317d1e8f0 cpukit/libdebugger: Add MicroBlaze support
Add MicroBlaze support for libdebugger. This uses only software break
type instructions to provide self-hosted GDB debugging support for
applications since internal control of debug hardware is not possible.

Also of note, this implementation for MicroBlaze would typically use the
brki instruction for software break, but instead uses an illegal opcode
to manage software breaks as exceptions. This is due to poor interaction
with the debug hardware where the debug hardware will intercept software
breaks instead of allowing the software break vector to execute.
2022-02-23 08:35:45 -06:00
Kinsey Moore
16d40ce7ff cpukit/libdebugger: Avoid cascade for interrupts
This updates behavior of libdebugger to handle debug exceptions in
interrupt context by temporarily removing a software breakpoint,
stepping, and then resuming afterward.
2022-02-23 08:35:45 -06:00
Kinsey Moore
dbdf38ea7b microblaze: Decouple exceptions from interrupts
Exception handling should be enabled at all times during execution to
ensure that exceptions are not ignored which would cause further
problems. This separates use of the exception enable bit from use of the
interrupt enable bit in the machine status register so that they can be
manipulated independently.
2022-02-23 08:35:45 -06:00
Kinsey Moore
ea1a4fd29b cpukit/libdebugger: Add pure swbreak capability
Add a capability that allows for implementations that operate purely
using software breaks. Due to this implementation method, software
breaks must not be restored until just before returning control to the
thread itself and will be handled by the implementation through thread
switch and interrupt hooks.
2022-02-23 08:35:45 -06:00
Kinsey Moore
924993a4bc cpukit/libdebugger: Avoid missed swbreak removal
It is possible to remove software breaks without actually restoring the
original instruction to memory. When this happens, the original
instruction is lost. This ensures that the original instruction is
restored when a software break is removed.
2022-02-23 08:35:45 -06:00
Sebastian Huber
fa65ad7f02 config: Document CONFIGURE_SCHEDULER_TABLE_ENTRIES 2022-02-22 16:10:03 +01:00
Sebastian Huber
8f1e8f8f26 kern_ntptime.c: Port to RTEMS
Remove previous adjtime() implementation.

Update #2348.
2022-02-21 14:16:41 +01:00
Sebastian Huber
91057b3bdf kern_ntptime.c: Import from FreeBSD
The file was imported from this repository:

https://github.com/freebsd/freebsd.git

This commit was used:

commit 3ec0dc367bff27c345ad83240625b2057af391b9
Author: Sebastian Huber <sebastian.huber@embedded-brains.de>
Date:   Mon Feb 7 14:16:16 2022 -0700

    kern_ntptime.c: Remove ntp_init()

    The ntp_init() function did set a couple of global objects to zero.  These
    objects are in the .bss section and already initialized to zero during kernel
    or module loading.

Update #2348.
2022-02-21 14:16:29 +01:00
Andriy Gapon
870cf9695f kern_tc: unify timecounter to bintime delta conversion
There are two places where we convert from a timecounter delta to
a bintime delta: tc_windup and bintime_off.
Both functions use the same calculations when the timecounter delta is
small.  But for a large delta (greater than approximately an equivalent
of 1 second) the calculations were different.  Both functions use
approximate calculations based on th_scale that avoid division.  Both
produce values slightly greater than a true value, calculated with
division by tc_frequency, would be.  tc_windup is slightly more
accurate, so its result is closer to the true value and, thus, smaller
than bintime_off result.

As a consequence there can be a jump back in time when time hands are
switched after a long period of time (a large delta).  Just before the
switch the time would be calculated with a large delta from
th_offset_count in bintime_off.  tc_windup does the switch using its own
calculations of a new th_offset using the large delta.  As explained
earlier, the new th_offset may end up being less than the previously
produced binuptime.  So, for a period of time new binuptime values may
be "back in time" comparing to values just before the switch.

Such a jump must never happen.  All the code assumes that the uptime is
monotonically nondecreasing and some code works incorrectly when that
assumption is broken.  For example, we have observed sleepq_timeout()
ignoring a timeout when the sbinuptime value obtained by the callout
code was greater than the expiration value, but the sbinuptime obtained
in sleepq_timeout() was less than it.  In that case the target thread
would never get woken up.

The unified calculations should ensure the monotonic property of the
uptime.

The problem is quite rare as normally tc_windup should be called HZ
times per second (typically 1000 or 100).  But it may happen in VMs on
very busy hypervisors where a VM's virtual CPU may not get an execution
time slot for a second or more.

Reviewed by:	kib
MFC after:	2 weeks
Sponsored by:	Panzura LLC
2022-02-21 14:07:29 +01:00
Mark Johnston
ede2278d8d timecounter: Initialize tc_lock earlier
Hyper-V wants to register its MSR-based timecounter during
SI_SUB_HYPERVISOR, before SI_SUB_LOCK, since an emulated 8254 may not be
available for DELAY().  So we cannot use MTX_SYSINIT to initialize the
timecounter lock.

PR:		259878
Reviewed by:	kib
MFC after:	3 days
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D33014
2022-02-21 14:01:31 +01:00
Sebastian Huber
d69acf87dc config: CONFIGURE_DISABLE_NEWLIB_REENTRANCY
Do not initialize Thread_Control::libc_reent if
CONFIGURE_DISABLE_NEWLIB_REENTRANCY is defined.  This helps to catch errors
with a NULL pointer exception rather than a corruption of the thread control
block.
2022-02-21 11:08:30 +01:00
Christian Mauderer
6fe6622489 bsp/imxrt: Enforce alignment for devicetree
A device tree binary has to be 8 byte aligned in memory. This is checked
since RTEMS commit 34052ef78c "libfdt: Add
FDT alignment check to fdt_check_header()".
2022-02-21 09:30:05 +01:00
Chris Johns
1e0a163388 bsp/arm/zynq: Cadence I2C has moved, update to the new path 2022-02-17 16:55:03 +11:00
Matt Joyce
d24da94f62 newlib01: Edit asserts to check initialization
Edit assert statements in worker thread to check initialization against the
__cleanup member of struct _reent instead of __sdidinit.  This will allow the
removal of sdidinit in a follow up Newlib patch.
2022-02-16 08:25:42 +01:00
Christian Mauderer
cff16379c9 bsp/atsam: Improve UART / USART tx performance
Put the next character into the send buffer if the buffer is empty and
not when the last character has been sent out to the line. This improves
the performance slightly.

Before that patch, the receive path was faster than the transmit path.
Therefore a simple echo could drop characters on a busy connection.
With this patch sending and receiving has about the same performance so
that no characters are lost.

Fixes #4610
2022-02-11 09:03:42 +01:00
Christian Mauderer
0074c9ecf3 bsp/atsam/i2c: Add error return and fix edge cases
The driver didn't return with an error on (for example) a NACK on the
bus. This adds the expected error return. Due to the new case that a
transfer can be interrupted on an error, there were some new edge cases.
This patch therefore also fixes these edge cases by removing the
transfer_state that more or less duplicated the interrupt states.

Fixes #4592
2022-02-10 09:08:03 +01:00
Christian Mauderer
974d24f8a8 bsp/atsam/i2c: Simplify driver
Do some clean ups. Remove superfluous variables. Eliminate some overly
complex logic (information about transfer and remaining bytes has been
tracked redundantly in multiple variables).

This patch doesn't change the behavior of the driver.

Update #4592
2022-02-10 09:07:46 +01:00
Christian Mauderer
7b5948d4d2 termios: Pass number of sent chars to l_start
At the moment the line discipline start function (l_start) has no
possibility to get feedback about the number of characters that have
been sent. This patch passes that information via an additional
parameter.

The change might trigger a warning on existing code because of a pointer
mismatch but it shouldn't break it. An existing function with the old
API will just ignore the additional parameter.

Update #4493
2022-02-10 09:07:26 +01:00
Kinsey Moore
17e05426ca cpukit/microblaze: Simplify dispatch assembly
The dispatch code was unnecessarily saving and restoring an extra
interrupt frame. This avoids the extra frame and folds the dispatch call
into a fallthrough to the interrupt frame restoration code.
2022-02-04 11:31:00 -06:00
Kinsey Moore
c6d8d1cb2b cpukit/microblaze: Clarify interrupt frame usage
Avoid use of magic numbers in favor of named constants and add MSR to
the interrupt frame so that thread dispatch can occur on exceptions as
well.
2022-02-04 11:30:59 -06:00
Kinsey Moore
ace9955fc4 cpukit/microblaze: Add exception extensions
Add the functions necessary to support RTEMS_EXCEPTION_EXTENSIONS and
mark this functionality as available on MicroBlaze.
2022-02-04 11:30:59 -06:00
Kinsey Moore
530a8c2494 cpukit/microblaze: Add debug vector and handler
This patch adds a vector for debug events along with a hook similar to
the exception framework. The debug vector generates an exception frame
for use by libdebugger.
2022-02-04 11:30:59 -06:00
Kinsey Moore
127980c799 cpukit/microblaze: Add exception framework
This patch updates the CPU_Exception_frame to include all necessary
registers, combines hardware snd software exception handlers into a
shared vector, provides an architecture-specific hook for taking
control of exception handling, and moves exception handling over to
actually using the CPU_Exception_frame instead of a minimal interrupt
stack frame. As the significant contents of _exception_handler.S have
been entirely rewritten, the copyright information on this file has been
updated to reflect that.
2022-02-04 11:30:59 -06:00
Alex White
37543e1968 microblaze: Add support for libbsd networking
This includes fixes and improvements necessary to get libbsd networking
running.
2022-02-01 16:58:24 -06:00
Jennifer Averett
50a6580da0 microblaze: Add support for libbsd. 2022-02-01 16:58:24 -06:00
Sebastian Huber
20ca3b09ba sparc: Mark dl06 as expected fail 2022-01-28 08:43:19 +01:00
Sebastian Huber
b519e509a9 sptests: Avoid a dependency on errno
Avoid a dependency on errno which might be a thread-local object.  The tests
sp01, spstkalloc02, and sptls03 assume that no thread-local storage object is
present.

Update #4560.
2022-01-28 08:03:48 +01:00
Kinsey Moore
b539af865e cpukit: Prevent error with disabled stack checker
When the stack checker is not enabled, the stack checker reporting
function can still be called. This prevents that call from performing a
null memory access in trying to find the high water mark if the stack
checker was never initialized.

This also introduces a test to ensure this call does not cause a crash.

Closes #4588
2022-01-27 13:07:30 -06:00
Sebastian Huber
2145e0c7bf Remove obsolete rtems_gxx_*() implementation
GCC versions prior to 6.1 used a RTEMS thread model based on
rtems_gxx_*() functions. GCC version 6.1 or later uses the
self-contained synchronization objects of Newlib <sys/lock.h> for the
RTEMS thread model.

Remove the obsolete implementation.

Close #3143.
2022-01-27 11:06:46 +01:00
Sebastian Huber
e3f70b379b bsps: Avoid use of memcpy() in bsp_fdt_copy()
The memcpy() function may be not loaded at the time bsp_fdt_copy() is
called.
2022-01-19 08:11:20 +01:00
Christian Mauderer
aa95122c17 bsp/atsam: Optionally use DMA for UART Rx
If the system is busy with other interrupts and the UART is set to a
fast baud rate, it's possible to loose UART interrupts and therefore
characters. This allows to optionally enable a DMA for the UARTs so that
a number of lost interrupts can be tolerated.

The number of DMAs on this chip is limited and not not all applications
need that feature. Therefore the DMA is disabled by default.

Close #4578
2022-01-18 08:41:15 +01:00
Christian Mauderer
fbd18c09af bsp/atsam: Merge USART and UART driver
If no extended features of the USART are used and if the comparison
feature of the UART is not used, the two modules are compatible. The
drivers were nearly identical except for some names of the defines.

This patch merges the two drivers into one.

Update #4578
2022-01-18 08:41:11 +01:00
Sebastian Huber
12a2a8e442 arm: Optimize interrupt handling
Use the SRS (Store Return State) instruction if available.  This
considerably simplifies the context save and restore.
2022-01-17 08:14:12 +01:00
Sebastian Huber
84ba194477 arm: Fix stack alignment during interrupt handling
On a public interface, the stack pointer must be aligned on an 8-byte
boundary.  However, it may temporarily be only aligned on a 4-byte
boundary.  The interrupt handling code must ensure that the stack
pointer is properly aligned before it calls a function.  See also:

https://developer.arm.com/documentation/den0013/d/Interrupt-Handling/External-interrupt-requests/Nested-interrupt-handling

Update #4579.
2022-01-17 08:14:12 +01:00
Sebastian Huber
41a1903dd9 arm: Avoid duplicate move from CPSR
Update #4579.
2022-01-17 08:12:15 +01:00
Sebastian Huber
0290e44b28 arm: Rework per-CPU control in interrupt handling
Use volatile register r0 for the per-CPU control of the current
processor instead of the non-volatile register r7.  This enables the use
of r7 in a follow up patch.  Do the interrupt handling in ARM mode.

Update #4579.
2022-01-15 19:49:41 +01:00
Sebastian Huber
2d1ea1abae arm: Use push/pop instructions for readability
Update #4579.
2022-01-15 19:49:41 +01:00
Sebastian Huber
4e530464b0 bsps: Default to CPU counter benchmark timer
Most BSPs which used the stubbed benachmark timer provide a CPU counter.
All BSPs provide at least a stub CPU counter.  Simply use the benchmark
timer implementation using the CPU counter.
2022-01-15 19:49:41 +01:00