Port
+ v850 does not have appear to have any optimized bit scan instructions
+ v850 does have single instructions for wap u16 and u32
+ Code path optimization preferences set
+ Add BSP variants for each GCC CPU model flag and a README
- v850e1 variant does not work (fails during BSP initialization)
BSP for GDB v850 Simulator
+ linkcmds matches defaults in GDB simulator with RTEMS mods
+ crt1.c added from v850 newlib port for __main()
+ BSP exits cleanly
+ printk and console I/O work
+ uses clock tick from IDLE task
+ Tests not requiring real clock ISR work
Documentation
+ CPU Supplment chapter for v850 added
PowerPC cores with the SPE (Signal Processing Extension) have 64-bit
general-purpose registers. The SPE context switch code has been merged
with the standard context switch code. The context switch may use cache
operations to increase the performance. It will be ensured that the
context is 32-byte aligned (PPC_DEFAULT_CACHE_LINE_SIZE). This
increases the overall memory size of the context area in the thread
control block slightly. The general-purpose registers GPR2 and GPR13
are no longer part of the context. The BSP must initialize these
registers during startup (usually initialized by the __eabi() function).
The new BSP option BSP_USE_DATA_CACHE_BLOCK_TOUCH can be used to enable
the dcbt instruction in the context switch.
The new BSP option BSP_USE_SYNC_IN_CONTEXT_SWITCH can be used to enable
sync and isync instructions in the context switch. This should be not
necessary in most cases.
+ libbsp/sparc/shared/include/pci.h was largely a copy of
an older version of the cpukit pci.h. Removed much of the
contents and included <rtems/pci.h>.
+ sparc/*/pci*.c - Move to <rtems/pci.h> required updating
to use uint32_t for dword accesses.
+ Rename PCI_MULTI_FUNCTION to PCI_HEADER_TYPE_MULTI_FUNCTION
+ Define PCI_HEADER_TYPE_MULTI_FUNCTION in cpukit pci.h and remove
PCI_MULTI_FUNCTION definitions in C files.
+ Move PCI_INVALID_VENDORDEVICEID definitions from various C files
to cpukit pci.h
All constants that should have been in cpukit pci.h were moved there.
One naming style was corrected. This impacted if_wm.c.
All other contents were the same as powerpc/shared/pci.h so BSP
specific pci.h could be eliminated.
Some register layout definitions for LEON3 reside in ambapp.h which
does not really has anything to do with device registers. The
register structures has been incorrectly named LEON3_*, the cores
are not only used on LEON3 but on LEON4 and perhaps on LEON5 when
that day comes. Some structures has been renamed according to the
GRLIB core name instead, which CPU that actually use it is not
relevant. Drivers has been updated with the new names.
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
The scope of the file system operations is the file system instance.
The scope of the file system node handlers is the file location. The
benefit of moving the operations to the mount table entry is a size
reduction of the file location (rtems_filesystem_location_info_t). The
code size is slightly increased due to additional load instructions.
Restructure rtems_filesystem_mount_table_entry_t to improve cache
efficiency.
These modifications were required by hand after running the script.
In some cases, the file names did not match patterns. In others,
the format of the file did not match any common patterns.
Script does what is expected and tries to do it as
smartly as possible.
+ remove occurrences of two blank comment lines
next to each other after Id string line removed.
+ remove entire comment blocks which only exited to
contain CVS Ids
+ If the processing left a blank line at the top of
a file, it was removed.
The prototype for the clock driver tick isr varies based upon
the interrupt model used by the port. This driver was checking
solely upon a flag set by the BSP.
