Commit Graph

31964 Commits

Author SHA1 Message Date
Sebastian Huber
109bc1c74b riscv: Add SMP context switch support
Update #3433.
2018-06-29 10:04:38 +02:00
Sebastian Huber
52352387cc riscv: Add floating-point support
Update #3433.
2018-06-29 10:04:38 +02:00
Sebastian Huber
995e91e847 riscv: Fix global construction
Update #3433.
2018-06-29 10:04:38 +02:00
Sebastian Huber
694e79a0b7 riscv: Add TLS support
Update #3433.
2018-06-29 10:04:38 +02:00
Sebastian Huber
afb60eb183 riscv: Remove dead code
Update #3433.
2018-06-29 10:04:38 +02:00
Sebastian Huber
e43994dfbb riscv: Optimize context switch and interrupts
Save/restore non-volatile registers in _CPU_Context_switch().

Save/restore volatile registers in _ISR_Handler().

Update #3433.
2018-06-29 10:04:37 +02:00
Sebastian Huber
a8188730bf riscv: Fix _CPU_Context_Initialize() prototype
Update #3433.
2018-06-29 10:04:37 +02:00
Sebastian Huber
dffc08c0e9 riscv: Fix interrupt save/restore
Update #3433.
2018-06-29 10:04:37 +02:00
Sebastian Huber
40f81ce634 riscv: Implement _CPU_Context_validate()
Update #3433.
2018-06-29 10:04:37 +02:00
Sebastian Huber
71af1a4bb2 riscv: Make some CPU port defines visible to asm
Move SREG and LREG assembler defines to <rtems/score/asm.h>.

Update #3433.
2018-06-29 10:04:37 +02:00
Sebastian Huber
8f035cb85a riscv: Implement _CPU_Context_volatile_clobber()
Update #3433.
2018-06-29 10:04:37 +02:00
Sebastian Huber
b706b4a3c0 riscv: Remove mstatus from thread context
The mstatus register contains no thread-specific state which must be
saved/restored during a context switch.  Machine interrupts (MIE) must
be enabled during a context switch.

Create separate CPU_Interrupt_frame structure.

Update #3433.
2018-06-29 10:04:37 +02:00
Sebastian Huber
2987c4f27a riscv: Remove x8 initialization
The RISC-V psABI

https://github.com/riscv/riscv-elf-psabi-doc/blob/master/riscv-elf.md

does not mention that this is a frame pointer.

Update #3433.
2018-06-29 10:04:37 +02:00
Sebastian Huber
04698ebd49 riscv: Properly align the thread stack
Update #3433.
2018-06-29 10:04:37 +02:00
Sebastian Huber
a49a3c8eed riscv: Do not clear thread context
Do not clear the complete thread context.  Initialize only the necessary
members.  The Context_Control::is_executing member must be preserved
across _CPU_Context_Initialize() calls.

Update #3433.
2018-06-29 10:04:37 +02:00
Sebastian Huber
9510742e7f riscv: Fix CPU_STACK_ALIGNMENT
According to the RISC-V psABI

https://github.com/riscv/riscv-elf-psabi-doc/blob/master/riscv-elf.md

the stack alignment is 128 bits (16 bytes).

Update #3433.
2018-06-29 10:04:36 +02:00
Sebastian Huber
98f051efed riscv: Remove RISCV_GCC_RED_ZONE_SIZE
The current ABI says that there is no stack red zone:

https://github.com/riscv/riscv-elf-psabi-doc/blob/master/riscv-elf.md

"Procedures must not rely upon the persistence of stack-allocated data
whose addresses lie below the stack pointer."

Update #3433.
2018-06-29 10:04:36 +02:00
Sebastian Huber
9704d86f86 riscv: Enable interrupts during dispatch after ISR
The code sequence is derived from the ARM code
(see _ARMV4_Exception_interrupt).

Update #2751.
Update #3433.
2018-06-29 10:04:32 +02:00
Sebastian Huber
0fd8287b2b riscv: Add _CPU_Get_current_per_CPU_control()
Update #3433.
2018-06-28 15:03:23 +02:00
Sebastian Huber
3be4478f5a riscv: Avoid namespace pollution
Remove <rtems/score/riscv-utility.h> include from <rtems/score/cpu.h>
(which is visible via <rtems.h> for example).

Update #3433.
2018-06-28 15:03:23 +02:00
Sebastian Huber
bc3bdf2438 riscv: Optimize and fix interrupt disable/enable
Use the atomic read and clear operation to disable interrupts.

Do not write the complete mstatus.  Instead, set only the MIE bit
depending on the level parameter.

Update #3433.
2018-06-28 15:03:20 +02:00
Sebastian Huber
ff7b10479b bsp/riscv: Remove bsp_interrupt_handler_default()
It duplicated the default implementation.

Update #3433.
2018-06-28 15:03:19 +02:00
Sebastian Huber
cdfed94f34 bsp/riscv: Rework clock driver
Use device tree provided timebase frequency.  Do not write to read-only
mtime register.

Update #3433.
2018-06-28 15:03:19 +02:00
Sebastian Huber
1232cd4690 bsp/riscv: Add device tree support for console
Update #3433.
2018-06-28 15:02:13 +02:00
Sebastian Huber
c558cc4b00 bsp/riscv: Fix vector table for lp64
Update #3433.
2018-06-28 15:02:13 +02:00
Sebastian Huber
5f5c450aa4 bsp/riscv: Add SMP startup synchronization
Update #3433.
2018-06-28 15:02:13 +02:00
Sebastian Huber
fe2cd01ba7 bsp/riscv: Add device tree support
Update #3433.
2018-06-28 15:02:12 +02:00
Sebastian Huber
2086948a7b riscv: Add dummy SMP support
Update #3433.
2018-06-28 15:02:12 +02:00
Sebastian Huber
853c5ef890 build: Enable RISC-V SMP build
Update #3433.
2018-06-28 15:02:12 +02:00
Sebastian Huber
7c3b0df107 riscv: Implement ISR set/get level
Fix prototypes.

Update #3433.
2018-06-28 15:02:08 +02:00
Sebastian Huber
9b2ef07f4b bsp/riscv: Load global pointer
Update #3433.
2018-06-27 08:58:18 +02:00
Sebastian Huber
b0ee7894d7 bsp/riscv: Use memset() to clear .bss
Update #3433.
2018-06-27 08:58:18 +02:00
Sebastian Huber
52f4fb65b3 riscv: Format assembler files
Use tabs to match the GCC generated assembler output.

Update #3433.
2018-06-27 08:58:18 +02:00
Sebastian Huber
fef0a414cf bsp/riscv: Do not clear integer registers at start
There is no need to do this.

Update #3433.
2018-06-27 08:58:17 +02:00
Sebastian Huber
380243627b bsp/riscv: Fix some warnings
Update #3444.
2018-06-27 08:58:17 +02:00
Sebastian Huber
16d905f289 bsp/riscv: Add BSP options to define RAM region
Update #3433.
2018-06-27 08:58:17 +02:00
Sebastian Huber
37a1fc20e0 bsp/riscv: Remove unused BSP options
Update #3433.
2018-06-27 08:58:17 +02:00
Sebastian Huber
f3da074a12 bsp/riscv: Add new BSP variants
The latest RISC-V tool chain introduced new multilib variants. Add
corresponding BSP variants.

Update #3433.
2018-06-27 08:58:17 +02:00
Sebastian Huber
6f5d88a469 bsp/riscv_generic: Rename to "riscv"
Update #3433.
2018-06-27 08:58:17 +02:00
Sebastian Huber
41e22955ca bsp/riscv_generic: Use standard optimization flags
Update #3433.
2018-06-27 08:58:17 +02:00
Hesham Almatary
92388f6941 bsps/riscv_generic: Rename and add variants
Add BSP variants to match supported RISC-V ISA variants (multilibs).
2018-06-27 08:58:17 +02:00
Sebastian Huber
9e3bb457e6 bsp/riscv_generic: New linker command file
This linker command file is based on the "riscv64-rtems5-ld --verbose"
output.

Update #3433.
2018-06-27 08:58:17 +02:00
Sebastian Huber
511dc4b2be Rework initialization and interrupt stack support
Statically initialize the interrupt stack area
(_Configuration_Interrupt_stack_area_begin,
_Configuration_Interrupt_stack_area_end, and
_Configuration_Interrupt_stack_size) via <rtems/confdefs.h>.  Place the
interrupt stack area in a special section ".rtemsstack.interrupt".  Let
BSPs define the optimal placement of this section in their linker
command files (e.g. in a fast on-chip memory).

This change makes makes the CPU_HAS_SOFTWARE_INTERRUPT_STACK and
CPU_HAS_HARDWARE_INTERRUPT_STACK CPU port defines superfluous, since the
low level initialization code has all information available via global
symbols.

This change makes the CPU_ALLOCATE_INTERRUPT_STACK CPU port define
superfluous, since the interrupt stacks are allocated by confdefs.h for
all architectures.  There is no need for BSP-specific linker command
file magic (except the section placement), see previous ARM linker
command file as a bad example.

Remove _CPU_Install_interrupt_stack().  Initialize the hardware
interrupt stack in _CPU_Initialize() if necessary (e.g.
m68k_install_interrupt_stack()).

The optional _CPU_Interrupt_stack_setup() is still useful to customize
the registration of the interrupt stack area in the per-CPU information.

The initialization stack can reuse the interrupt stack, since

  * interrupts are disabled during the sequential system initialization,
    and

  * the boot_card() function does not return.

This stack resuse saves memory.

Changes per architecture:

arm:

  * Mostly replace the linker symbol based configuration of stacks with
    the standard <rtems/confdefs.h> configuration via
    CONFIGURE_INTERRUPT_STACK_SIZE.  The size of the FIQ, ABT and UND
    mode stack is still defined via linker symbols.  These modes are
    rarely used in applications and the default values provided by the
    BSP should be sufficient in most cases.

  * Remove the bsp_processor_count linker symbol hack used for the SMP
    support. This is possible since the interrupt stack area is now
    allocated by the linker and not allocated from the heap.  This makes
    some configure.ac stuff obsolete.  Remove the now superfluous BSP
    variants altcycv_devkit_smp and realview_pbx_a9_qemu_smp.

bfin:

  * Remove unused magic linker command file allocation of initialization
    stack.  Maybe a previous linker command file copy and paste problem?
    In the start.S the initialization stack is set to a hard coded value.

lm32, m32c, mips, nios2, riscv, sh, v850:

  * Remove magic linker command file allocation of initialization stack.
    Reuse interrupt stack for initialization stack.

m68k:

  * Remove magic linker command file allocation of initialization stack.
    Reuse interrupt stack for initialization stack.

powerpc:

  * Remove magic linker command file allocation of initialization stack.
    Reuse interrupt stack for initialization stack.

  * Used dedicated memory region (REGION_RTEMSSTACK) for the interrupt
    stack on BSPs using the shared linkcmds.base (replacement for
    REGION_RWEXTRA).

sparc:

  * Remove the hard coded initialization stack.  Use the interrupt stack
    for the initialization stack on the boot processor.  This saves
    16KiB of RAM.

Update #3459.
2018-06-27 08:58:16 +02:00
Sebastian Huber
715d6167e0 bsps: Support .rtemsstack.* linker input sections
Use a dedicated memory region or place it between the BSS and workspace.

Update #3459.
2018-06-27 08:58:16 +02:00
Sebastian Huber
c8df844cf3 score: Add CPU_INTERRUPT_STACK_ALIGNMENT
Add CPU port define for the interrupt stack alignment.  The alignment
should take the stack ABI and the cache line size into account.

Update #3459.
2018-06-27 08:58:16 +02:00
Sebastian Huber
196ce1859a console: Add missing return status
Update #3320.
2018-06-27 08:58:16 +02:00
Sebastian Huber
7ee5931393 Remove Clock_driver_support_shutdown_hardware()
The aim of this clock driver hook was to stop clock tick interrupts at
some late point in the exit() procedure.

The use of atexit() pulls in malloc() which pulls in errno. It is
incompatible with the intention of the
CONFIGURE_DISABLE_NEWLIB_REENTRANCY configuration option.

The exit() function must be called from thread context, so accompanied
clock tick interrupts should cause no harm.  On the contrary, someone
may assume a normal operating system operation, e.g. working timeouts.

Remove the Clock_driver_support_shutdown_hardware() clock driver hook.

Close #3436.
2018-06-27 08:58:16 +02:00
Sebastian Huber
718a84afa3 Remove unused CPU_MODES_INTERRUPT_LEVEL 2018-06-27 08:58:16 +02:00
Sebastian Huber
ebc5cfda90 spmisc01: Add test cases for basedefs.h stuff 2018-06-21 11:27:29 +02:00
Sebastian Huber
fe46647ef5 score: Macros to declare and define global symbols
Add RTEMS_DEFINE_GLOBAL_SYMBOL() and add RTEMS_DECLARE_GLOBAL_SYMBOL().

Update #3459.
2018-06-21 11:21:04 +02:00