Commit Graph

36906 Commits

Author SHA1 Message Date
Kinsey Moore
ee34dd12f4 spec/aarch64: Rename Versal BPSs to be in line with ZynqMP 2024-10-28 08:21:36 +00:00
Purva Yeshi
eaaeebedda riscv/beaglevfire: Rename 'bvf' to 'beaglevfire' 2024-10-25 21:23:23 +00:00
Francescodario Cuzzocrea
9d45cf1b44 riscv: add bsp for beagle v fire
Signed-off-by: Francescodario Cuzzocrea <bosconovic@gmail.com>
2024-10-25 21:23:23 +00:00
Francescodario Cuzzocrea
0e3792edbf riscv: Work area size based on /memory node in fdt
* It is not granted that we will always access to natually aligned
   access. So, before handling endianess do byte-a-byte load using
   the appropriate libfdt function to avoid unaligned access issues

Signed-off-by: Francescodario Cuzzocrea <bosconovic@gmail.com>
2024-10-25 21:23:23 +00:00
Gedare Bloom
0d15487401 riscv/niosv: use default values that compile 2024-10-25 13:49:36 +00:00
Kevin Kirspel
e9957cd8e3 riscv/niosv: Adding a new NIOS V BSP to RISC-V 2024-10-25 13:49:36 +00:00
Kinsey Moore
d0e9ec85b0 cpukit/libmisc/shell: Remove shell prompt carriage return
This removes the carriage return printed before the shell prompt as it
can cause other output to be overwritten unexpectedly. This was
discovered when using the "cat" shell command on a file whose content
contained no trailing \n\r and was short enough to be entirely swallowed
by the prompt.
2024-10-25 02:44:37 +00:00
Amar Takhar
e0f1c8fe0b Set Python scripts to use Python 3
Several of these already required Python 3 and would not run under 2.7.
2024-10-24 23:26:05 +00:00
Kinsey Moore
83c1a305f7 cpukit/libfs/jffs2: Prevent memory corruption due to corrupted data
The rtime decompression routine does not fully check bounds during the
entirety of the decompression pass and can corrupt memory outside the
decompression buffer if the compressed data is corrupted. This adds the
required check to prevent this failure mode.

Updates #5072
2024-10-24 22:35:40 +00:00
Matteo Concas
a5f64ff27d grlib/ascs: Fix evaluation order violations, CIDs 1399778, 1399782 2024-10-21 07:02:51 +00:00
Matteo Concas
93413ed315 grlib/pwm: Fix PWM enable bit check, CID 1399774 2024-10-21 07:02:51 +00:00
Matteo Concas
de56c23c14 grlib/1553: Remove dead code, CID 1399770 2024-10-21 07:02:51 +00:00
Matteo Concas
ff22dd6f7c grlib/1553: Remove dead code, CID 1399764 2024-10-21 07:02:51 +00:00
Kinsey Moore
907ded868d spec/bsps/aarch64/zynqmp: Complete the transition to consistent naming
These references were missed in the last renaming patch causing the
ILP32 BSP to fail to build.

Closes #5119
2024-10-20 21:10:49 -05:00
Sebastian Huber
e7ee376803 aarch64/zynqmp: Fix build due to BSP renaming
Update #5119.
2024-10-20 09:55:19 +02:00
Kinsey Moore
a34bc70dc5 spec/bsps/aarch64/zynqmp: Remove overly specific BSP and rename generic BSP
Updates #5119
2024-10-20 02:50:22 +00:00
Sebastian Huber
4c75bd88f3 Revert "libmisc/stackchk: Change stack checker reporter function signatures"
This reverts commit c1aa06dbd2.

Extending the rtems_stack_checker_info like this breaks the existing
visitor API used by rtems_stack_checker_iterate().  After review, using
an information structure contradicts the intention of the reporter to
allow a minimal reporting.  Filling up the information structure with
all the details would pull in several dependencies, like
_Thread_Get_name().  The API should be improved to provide the user with
the necessary information from the TCB without having to access members
directly.
2024-10-19 15:43:07 +00:00
Kinsey Moore
b8bd1a1ce3 spec/bsps/aarch64: Update BSP naming to be more consice
This removes the xilinx and lp64 identifiers from the ZynqMP BSPs and
updates those names throughout the build system. The xilinx identifier
is being removed because it is implied by zynqmp and lp64 is being
removed because it is the default for AArch64.

This also renames grp_zu3eg.yml to grp_hardware.yml to more accurately
reflect its purpose.

Updates #5119
2024-10-19 02:21:49 +00:00
Kinsey Moore
e6cadcf0cc spec/bsps: Clean up stale references to minimum.exe in test configurations
Now that minimum.exe is minimum.norun.exe, the tester will not attempt
to run this sample test and will therefore not categorize it as a
failure since it includes no output. BSP-level test configurations for
this test can now be removed since those configurations only existed to
prevent it from being run.
2024-10-19 02:21:09 +00:00
Kinsey Moore
685a26315c bsps/aarch64/mmu: Update mapping function to new API
This was missed in the API change.
2024-10-19 02:04:34 +00:00
Sebastian Huber
a54e0deab1 rtems: Simplify optionsimpl.h
Replace ternary operator with a boolean expression.  Include <stdbool.h>
for the bool definition.  Fix formatting.
2024-10-18 20:02:39 +00:00
Kinsey Moore
3562f1d028 spec/bsps/arm: Remove the mercury-specific BSP
This BSP has been superceded by the generic BSPs supporting lockstep and
each of the cores in split mode.

Updates #5119
2024-10-17 21:33:51 -05:00
Kinsey Moore
c978b63c3a cpukit/libdl/arm: Support BLX relocations that require a trampoline
BLX relocations in Thumb code expect the target to be ARM code. This
means that the trampoline must be generated in ARM mode.
2024-10-17 22:32:47 +00:00
Kinsey Moore
689e9986cd cpukit/libdl: Fix spelling of trampoline 2024-10-17 22:32:47 +00:00
Mohamed Hassan
c1aa06dbd2 libmisc/stackchk: Change stack checker reporter function signatures
This helps in abstraction by encapsulating unnecessary data to be revealed to the user
2024-10-16 04:30:45 +00:00
shuhua hua
c4f9759068 libtests/shell01:add test empty and NULL usernames check 2024-10-15 13:12:25 +00:00
shuhua hua
bcd4b83e16 Ignore empty user names as input
* To unify the surrounding coding style
2024-10-15 13:11:42 +00:00
Sebastian Huber
ad378dcaf7 bsps/aarch64: Use clean invalidate
On other targets, the rtems_cache_flush_entire_data() also performs a
clean and invalidate.

This is a workaround for "Answer 68874 - Zynq UltraScale+ MPSoC, APU -
An Eviction Might Overtake A Cache Clean Operation".
2024-10-11 01:27:48 +02:00
Sebastian Huber
95734e3d6d bsps/aarch64: Simplify aarch64_mmu_map_block() 2024-10-11 01:27:48 +02:00
Sebastian Huber
bb2cd445e1 bsps/aarch64: Add AARCH64_MMU_PHYSICAL_ADDRESS_RANGE_BITS
This avoids dead code in the MMU setup.
2024-10-11 01:27:48 +02:00
Sebastian Huber
269f4ca5db bsps/aarch64: Use dependency injection
Let the caller provide the translation table base and the used page
tables to ease testing.

Simplify the error handling by using early returns.

Return RTEMS_TOO_MANY instead of RTEMS_NO_MEMORY if the page tables are
all used.
2024-10-11 01:27:48 +02:00
Sebastian Huber
4b1e80dff5 bsps/aarch64: Improve MMU mapping
Produce only one fatal error.  Fix potential integer overflow errors.
2024-10-11 01:27:48 +02:00
Sebastian Huber
8c4cc767b5 aarch64/xilinx-zynqmp: Move MMU config table 2024-10-11 01:27:48 +02:00
Sebastian Huber
41ed4b5d26 bsps/aarch64: Assume that all levels have a data cache
This is the case for all currently supported AArch64 targets.
2024-10-11 01:27:48 +02:00
Sebastian Huber
aac760584b bsps/aarch64: Fix entire data cache flush/invalidate
The cache maintenance operations affect only the current PE.  Make sure
that thread dispatching is disabled and interrupts cannot interfere.
2024-10-11 01:27:48 +02:00
Sebastian Huber
064a672fbb bsps/aarch64: Simplify AArch64_clidr_get_cache_type() 2024-10-11 01:27:48 +02:00
Sebastian Huber
098f8cb079 bsps/aarch64: Fix AArch64_get_ccsidr_for_level() 2024-10-11 01:27:48 +02:00
Sebastian Huber
77094f11b1 bsps/aarch64: Simplify I-cache invalidate 2024-10-11 01:27:48 +02:00
Sebastian Huber
cfd885850a bsps/aarch64: Use fatal error for data cache disable
On the Cortex-A cores, at least the L1 data cache is required to provide
support for atomic operations.

Update #5050.
2024-10-11 01:27:48 +02:00
Sebastian Huber
3fd063159d dev/irq: Simplify SMP GIC initialization
There is no need to wait on secondary processors for the GIC distributor
enable since the BSPs for real targets start the secondary processors
in _CPU_SMP_Start_processor().
2024-10-11 01:27:48 +02:00
Sebastian Huber
f43042cd06 bsps: Move <bsp/linker-symbols.h> to shared
Move architecture-independent items to a shared <bsp/linker-symbols.h>.
Allow architectures to customize it through <bsp/linker-symbols-arch.h>.
2024-10-11 01:27:48 +02:00
Sebastian Huber
c538079ec1 aarch64: Remove trapped FP exceptions support
Whether a floating-point implementation supports trapping of
floating-point exceptions is implementation defined.  At least Qemu,
Cortex-A53, and Cortex-A72 do not support them.
2024-10-11 01:27:48 +02:00
Sebastian Huber
42c6f727d6 dev/irq: Remove arm_gic_irq_generate_software_irq()
Replace uses with API calls.
2024-10-11 01:27:48 +02:00
Sebastian Huber
5a962e3bb7 arm/aarch64: Optimize _CPU_SMP_Send_interrupt()
Avoid superfluous error checks.
2024-10-11 01:27:48 +02:00
Sebastian Huber
5ff5bd3c10 aarch64: More robust SMP system start
In SMP configurations, check that we run on a configured processor.  If not,
then there is not much that can be done since we do not have a stack available
for this processor.  Just loop forever in this case.  Do this in assemlby to
ensure that no stack memory is used.
2024-10-11 01:27:48 +02:00
Sebastian Huber
1524b5f923 aarch64/xilinx-zynqmp: Move get I2C clocks
Not all applications use I2C.
2024-10-11 01:27:48 +02:00
Sebastian Huber
f630be8933 aarch64/xilinx-zynqmp: Simplify startup
There is no need to copy sections since the linker command file has no separate
runtime and load regions for the sections.
2024-10-11 01:27:48 +02:00
Sebastian Huber
8db6a45009 bsps: Assembly implementation for PSCI bsp_reset()
Avoid issues with potential dead code after the secure monitor or
hypervisor call.
2024-10-11 01:27:48 +02:00
Sebastian Huber
a8d3efe4b0 dev/irq: Simplify GICv2 set/get affinity 2024-10-11 01:27:48 +02:00
Sebastian Huber
2b36492366 aarch64: Move exception frame support
The exception frame handling support is optional.
2024-10-11 01:27:48 +02:00