* Coding style cleanups.
* Use OS reserved trap 0x89 for IRQ Disable
* Use OS reserved trap 0x8A for IRQ Enable
* Add to SPARC CPU supplement documentation
This will result in faster Disable/Enable code since the
system trap handler does not need to decode which function
the user wants. Besides the IRQ disable/enabled can now
be inline which avoids the caller to take into account that
o0-o7+g1-g4 registers are destroyed by trap handler.
It was also possible to reduce the interrupt trap handler by
five instructions due to this.
Use register g6 for the per-CPU control of the current processor. The
register g6 is reserved for the operating system by the SPARC ABI. On
Linux register g6 is used for a similar purpose with the same method
since 1996.
The register g6 must be initialized during system startup and then must
remain unchanged.
Since the per-CPU control is used in all critical sections of the
operating system, this is a performance optimization for the operating
system core procedures. An additional benefit is that the low-level
context switch and interrupt processing code is now identical on non-SMP
and SMP configurations.
The registers g2 through g4 are reserved for applications. GCC uses
them as volatile registers by default. So they are treated like
volatile registers in RTEMS as well.
Script does what is expected and tries to do it as
smartly as possible.
+ remove occurrences of two blank comment lines
next to each other after Id string line removed.
+ remove entire comment blocks which only exited to
contain CVS Ids
+ If the processing left a blank line at the top of
a file, it was removed.
* cpu_supplement/arm.t, cpu_supplement/i386.t, cpu_supplement/m68k.t,
cpu_supplement/mips.t, cpu_supplement/powerpc.t, cpu_supplement/sh.t,
cpu_supplement/sparc.t, cpu_supplement/tic4x.t, porting/cpuinit.t,
user/conf.t, user/init.t: Move interrupt_stack_size field from CPU
Table to Configuration Table. Eliminate CPU Table from all ports.
Delete references to CPU Table in all forms.
* cpu_supplement/arm.t, cpu_supplement/i386.t, cpu_supplement/m68k.t,
cpu_supplement/mips.t, cpu_supplement/powerpc.t, cpu_supplement/sh.t,
cpu_supplement/sparc.t, cpu_supplement/tic4x.t, user/conf.t: Moved
most of the remaining CPU Table fields to the Configuration Table.
This included pretasking_hook, predriver_hook, postdriver_hook,
idle_task, do_zero_of_workspace, extra_mpci_receive_server_stack,
stack_allocate_hook, and stack_free_hook. As a side-effect of this
effort some multiprocessing code was made conditional and some style
clean up occurred.
* ada_user/Makefile.am, ada_user/ada_user.texi,
cpu_supplement/Makefile.am, cpu_supplement/cpu_supplement.texi,
cpu_supplement/sparc.t: Add Blackfin CPU supplement chapter and get
everything building from previous breakages.
* cpu_supplement/bfin.t: New file.
