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Code Pull Requests Activity
28,044 Commits 7 Branches 54 Tags
a6502a58e64eb47b4c987884fdcb6af79fae792c
Commit Graph

13239 Commits

Author SHA1 Message Date
Daniel Hellstrom
0d3b5d4742 SPARC: optimize window underflow trap 
Save five instructions on underflow handling.

By using an optimized trap entry we can move instructions from
the window underflow function into the trap entry vector. By
setting WIM=0 and using RESTORE it is possible to move the
new WIM register content from the trapped window into the
to-be-restored register window. It is then possible to avoid
the WIM write delay.
 2014-12-02 13:57:20 +01:00
Daniel Hellstrom
6930aa7f19 SPARC: optimize window overflow trap entry 
By using a optimized trap entry we can move instructions from
the window overflow function into the trap entry vector. By
using the saved locals instead of g1 we don't need to save
that register temporarily. Also spead out non store instructions
inbetween stores to use the write buffer better.
 2014-12-02 13:57:15 +01:00
Daniel Hellstrom
348d1812ba SPARC: window overflow optimization 
I see no need for waiting the 3 instruction delay for wim to be
written in this case, since the STD after does not depend on WIM
 2014-12-02 13:55:50 +01:00
Chris Johns
dd309b1054 m68k/mcf5235: GCC 4.9.2 generates invalid code for Init5235. 
Move the vector table copy out of the Init5235 source to avoid
stipping the GCC bug.

Fixes #2204.
 2014-12-01 14:55:23 +11:00
Sebastian Huber
3a8566b796 bsp/qoriq: Delete empty header file 
close #2062
 2014-11-27 14:03:34 +01:00
Sebastian Huber
cbc433c7a2 bsps/arm: Add .nocache section 
This section can be use to provide a cache coherent memory area via
rtems_cache_coherent_add_area().
 2014-11-27 10:33:30 +01:00
Josh Oguin
aed6e1de21 libchip/serial/z85c30.c: Remove redundant assignment 
This was flagged by CodeSonar.
 2014-11-26 07:51:57 -06:00
Josh Oguin
02958c5e53 libchip/serial/ns16550* and z8530*: Assert on baud number to avoid divide by 0 
This was flagged by CodeSonar. It should be impossible to get an
incorrect baud number back but ensure this in debug mode. The _Assert()
keeps their scanner from evaluating for divide by 0 past this point.
 2014-11-26 07:51:57 -06:00
Josh Oguin
0ad1e8001f libchip/display/disp_hcms29xx.c: Remove useless variable and check 
This was flagged by CodeSonar.
 2014-11-26 07:51:57 -06:00
Josh Oguin
61f8d668d0 libbsp/shared/bspinit.c: Document assumption of NULL returned 2014-11-26 07:51:57 -06:00
Sebastian Huber
7e5c9b895e rtems: Move rtems_cache_aligned_malloc() 
Make sure also the size is cache aligned since otherwise we may have
some overlap with the next allocation block.  A cache invalidate on this
area would be fatal.
 2014-11-25 16:08:16 +01:00
Sebastian Huber
42fe0d3fbb bsps/arm: L2C 310 avoid infinite loops 2014-11-25 16:08:16 +01:00
Sebastian Huber
55db0e52be bsp/ngmp: Use -muser-mode GCC option 
This option is necessary to use the latest GCC 4.8, 4.9 and 5.0
versions.
 2014-11-24 09:44:50 +01:00
Joel Sherrill
b46a31e0b8 leon2: include <rtems/ringbuf.h> not <ringbuf.h> 
close #2113
 2014-11-23 09:48:26 -06:00
Joel Sherrill
ff1c6130ed powerpc/haleakala: Fix warnings 2014-11-21 13:47:43 -06:00
Nigel Spon
502609c80d powerpc/haleakala: Add network driver 
close 1405
 2014-11-21 13:47:42 -06:00
Sebastian Huber
11925eef78 Delete or rename MIN/MAX macros and defines 
Include <sys/param.h> if necessary to get the MIN()/MAX() macros.
 2014-11-21 08:52:29 +01:00
Gedare Bloom
280f4ecc88 autotools: regenerate preinstall.am for pc386 2014-11-20 11:05:02 -05:00
Jan Dolezal
067da5c45d i386/pc386: VESA based frame buffer utilizing real mode interrupt 10h 2014-11-20 09:52:40 -05:00
Jan Dolezal
c5a74946ac i386/pc386/include: header files for VESA BIOS EXTENSIONS and VESA Extended Display Identification Data 2014-11-20 09:52:40 -05:00
Jan Dolezal
586c86c75a i386/shared/realmode_int: real mode interrupt interface 2014-11-20 09:52:39 -05:00
Jan Dolezal
74d2d94041 i386: global descriptor table manipulation functions 2014-11-20 09:52:39 -05:00
Jan Dolezal
d885b2b213 i386: GDTR manipulation functions parameters changed to use explicit width types 2014-11-20 09:52:39 -05:00
Jan Dolezal
ec494ffbfc i386/pc386: configurable size of descriptor tables 2014-11-20 09:52:38 -05:00
Sebastian Huber
50440c065e bsps/arm: Enable L2C for Cortex-A9 MPCore BSPs 2014-11-20 11:36:03 +01:00
Sebastian Huber
d1eb7b1707 bsps/arm: L2C 310 drop exclusive cache support 
Optimize locking.
 2014-11-20 10:30:28 +01:00
Sebastian Huber
5f4f828259 bsps/arm: L1 cache support changes 2014-11-20 10:30:28 +01:00
Sebastian Huber
e492e7f8d8 bsps/arm: L2C 310 compile-time errata 588369 2014-11-20 10:30:28 +01:00
Sebastian Huber
52d24b00db bsps/arm: L2C 310 compile-time errata 753970 2014-11-20 10:30:28 +01:00
Sebastian Huber
5574188670 bsps/arm: L2C 310 exclusive config is fatal 2014-11-20 10:30:28 +01:00
Sebastian Huber
d53de34428 bsps/arm: L2C 310 use l2c_310_* prefix throughout 2014-11-20 10:30:27 +01:00
Sebastian Huber
861d315aa0 bsps/arm: L2C 310 use L2C_310_* prefix throughout 2014-11-20 10:30:27 +01:00
Sebastian Huber
f2fed0c197 bsps/arm: L2C 310 add compile time checks 
Simplify initialization.  Replace some assert() with fatal errors.
 2014-11-20 10:30:27 +01:00
Sebastian Huber
13f1462ff4 bsps/arm: L2C 310 delete invalid link 2014-11-20 10:30:27 +01:00
Sebastian Huber
a9d6c2091b bsps/arm: L2C 310 simplify and remove white space 2014-11-20 10:30:27 +01:00
Sebastian Huber
957c07575a bsps/arm: L2C 310 rename BSP_ARM_L2CC_BASE 
Rename BSP_ARM_L2CC_BASE to BSP_ARM_L2C_310_BASE.
 2014-11-20 10:30:26 +01:00
Sebastian Huber
45a63ee8d6 bsp/xilinx-zynq: Add Cadence I2C bus driver 2014-11-20 10:30:20 +01:00
Sebastian Huber
bdf8fa76c2 bsp/xilinx-zynq: Add zync_clock_cpu_1x() 2014-11-20 10:30:20 +01:00
Sebastian Huber
234d5c408c bsp/xilinx-zynq: Rename BSP_ARM_A9MPCORE_UARTCLK 
Rename BSP_ARM_A9MPCORE_UARTCLK to ZYNQ_CLOCK_UART since this clock has
nothing to do with the Cortex-A9 MPCore.
 2014-11-20 10:30:20 +01:00
Sebastian Huber
8100e7117c bsp/xilinx-zynq: Adjust BSP_ARM_A9MPCORE_PERIPHCLK 2014-11-20 10:30:20 +01:00
Sebastian Huber
f0c564c5ae bsps/arm: Adjust stacks for ARMv4 
Reduce non-IRQ stacks to size zero.  All non-IRQ stacks overlap now the
IRQ stack.  This is all right since the SVC stack is used only during
startup and here interrupts are disabled.  The other exception stacks
lead to a system termination by default, so we can here also use the IRQ
stack since interrupts are disabled on exception entry.
 2014-11-20 08:54:10 +01:00
Alan Cudmore
96a9f4cb6d ARM removed shared/abort from several ARM BSPs 2014-11-20 08:54:10 +01:00
Joel Sherrill
a373dc3768 lpc23xx_tli800-testsuite.tcfg: Add dl02 2014-11-05 17:52:23 -06:00
Joel Sherrill
091c610808 lpc2362-testsuite.tcfg: Add dl02 2014-11-05 17:52:05 -06:00
Joel Sherrill
0b91cfbf51 lpc1768_mbed_ahb_ram_eth-testsuite.tcfg: Add a handful more tests 2014-11-05 17:51:43 -06:00
Joel Sherrill
f9e4139f55 lm3s3749-testsuite.tcfg: Add dl02 2014-11-05 15:31:36 -06:00
Joel Sherrill
8d74b80e26 lpc23xx_tli800-testsuite.tcfg: Add dl01 2014-11-04 15:05:08 -06:00
Joel Sherrill
6d84a9fff9 lpc2362-testsuite.tcfg: Add dl01 2014-11-04 15:04:46 -06:00
Joel Sherrill
a7812cdcea lpc1768_mbed_ahb_ram_eth-testsuite.tcfg: Add rbheap01 2014-11-04 15:04:28 -06:00
Joel Sherrill
643e7cb8a6 lm3s3749-testsuite.tcfg: Add dl01 2014-11-04 15:02:03 -06:00