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Commit Graph

116 Commits

Author SHA1 Message Date
Joel Sherrill
8ca4b5c8bb bsps/arm/shared: Change license to BSD-2 
Updates #3053.
 2022-07-08 08:42:42 -05:00
Chris Johns
cb52e37464 bsps/arm: MP core timer setting off by one 2022-06-15 13:15:15 +10:00
Karel Gardas
635cd68aa7 bsp/arm: allocate .rtemsstack on REGION_STACK instead of on REGION_WORK 
REGION_WORK may be backed by external RAM which may not be initialized
in a time we need stack to work well. E.g. code loaded in flash,
stack allocated on in-cpu SRAM and data (REGION_WORK) on external SDRAM.

Sponsored-By:	Precidata
 2022-05-23 08:36:41 +02:00
Sebastian Huber
e7a2470d06 bsps/arm: Fix bsp_start_memcpy() for ARMv7-AR 
Synchronize data and instruction streams.
 2022-03-14 09:23:54 +01:00
Joel Sherrill
ba619b7f36 bsps/arm/: Scripted embedded brains header file clean up 
Updates #4625.
 2022-03-10 08:43:50 +01:00
Sebastian Huber
db8f598d56 build: Remove old build system 
Close #3250.
Close #4081.
 2021-09-21 07:39:09 +02:00
Sebastian Huber
59472042ec bsps/arm: More robust SMP start 
Do not continue execution on processors which are not configured to prevent the
use of arbitrary memory for the initialization stack.
 2021-08-12 10:04:11 +02:00
Sebastian Huber
c7b4eca7fa bsps/irq: bsp_interrupt_facility_initialize() 
Do not return a status code in bsp_interrupt_facility_initialize() since this
leads to unreachable code in bsp_interrupt_initialize().  Use RTEMS_DEBUG
assertions in bsp_interrupt_facility_initialize() if necessary.
 2021-07-27 10:03:19 +02:00
Sebastian Huber
32f5a195d7 bsps/irq: bsp_interrupt_vector_disable() 
Return a status code for bsp_interrupt_vector_disable().

Update #3269.
 2021-07-26 19:57:31 +02:00
Sebastian Huber
bc86a5fa84 bsps/irq: bsp_interrupt_vector_enable() 
Return a status code for bsp_interrupt_vector_enable().

Update #3269.
 2021-07-26 19:57:30 +02:00
Sebastian Huber
deb5afb2f2 bsps/irq: Add rtems_interrupt_is_pending() 
Add a default implementation which just returns RTEMS_UNSATISFIED.

Update #3269.
 2021-07-26 17:08:42 +02:00
Sebastian Huber
eebecd09fa bsps/irq: Add rtems_interrupt_get_attributes() 
Add a default implementation which clears the attributes to zero and
just returns RTEMS_SUCCESSFUL for valid parameters.

Update #3269.
 2021-07-26 17:08:42 +02:00
Sebastian Huber
9832652c53 bsps/irq: Add rtems_interrupt_raise() 
Add rtems_interrupt_raise_on() and rtems_interrupt_clear().

Add a default implementation which just returns RTEMS_UNSATISFIED for
valid parameters.

Update #3269.
 2021-07-26 07:54:25 +02:00
Sebastian Huber
781213f9ec bsps/irq: Add rtems_interrupt_vector_is_enabled() 
Add a default implementation which just returns RTEMS_UNSATISFIED for
valid parameters.

Update #3269.
 2021-07-26 07:54:25 +02:00
Sebastian Huber
a398909dc2 bsps/arm: Fix SMP start 
Skip the data cache initialization if we are a secondary processor.

The bug was introduced by e164df5e33 and
did not show up in tests using Qemu since the data cache behaviour is
not emulated.
 2021-07-09 10:43:10 +02:00
Pranav Dangi
8b0e333487 bsps/arm: Add start up support for ARMv6 RPi Models 2021-07-07 20:09:47 +02:00
Sebastian Huber
3fee662093 bsps/irq: Use BSP_INTERRUPT_VECTOR_COUNT 
Use BSP_INTERRUPT_VECTOR_COUNT instead of BSP_INTERRUPT_VECTOR_MAX.

Update #3269.
 2021-06-24 11:36:25 +02:00
Sebastian Huber
af73b7b64b bsps/irq: Remove BSP_INTERRUPT_VECTOR_MIN 
Remove BSP_INTERRUPT_VECTOR_MIN and unconditionally let interrupt vector
numbers start with zero.

The BSP_INTERRUPT_VECTOR_MIN == 0 invariant was tested by the previous commit
and building all BSPs.

Update #3269.
 2021-06-24 11:35:49 +02:00
Sebastian Huber
e10dec0fe7 bsps: Support RTEMS_NOINIT in linkcmds 
Update #3866.
 2021-05-02 18:41:21 +02:00
Sebastian Huber
2a24f99d11 bsps/arm: Set MSP in ARMv7-M start code 
Set the Main Stack Pointer (MSP) to the ISR stack area end just in case
we run using the Process Stack Pointer (PSP).  This helps if
applications are started by a boot loader.
 2021-04-21 07:04:53 +02:00
Vijay Kumar Banerjee
c90fa83041 bsps: Remove networking drivers 
Update #3850
 2021-04-07 16:15:38 -06:00
Sebastian Huber
9eb9813dc1 bsps: Add missing DWARF 5 sections 
Sort alphabetically.
 2021-01-26 15:29:36 +01:00
Sebastian Huber
33c12d5f92 bsps: Support DWARF 5 sections 
GCC 11 uses DWARF 5 by default.
 2021-01-25 12:56:00 +01:00
Sebastian Huber
9f3a08ef2d bsps: Use header file for GIC architecture support 
This avoids a function call overhead in the interrupt dispatching.

Update #4202.
 2020-12-23 09:24:49 +01:00
Sebastian Huber
23d9223ad3 bsps/arm: Invalidate TLB in start.S 
Update #4202.
 2020-12-23 09:24:47 +01:00
Sebastian Huber
e164df5e33 bsps/arm: Clear SCTLR[M, I, A, C] in start.S 
Initialize the data and unified cache levels.  Invalidate the
instruction cache levels.

Update #4202.
 2020-12-23 09:19:28 +01:00
Sebastian Huber
b32fd22732 bsps/arm: Add arm-data-cache-loop-set-way.h 
This makes it possible to reuse this loop.

Update #4202.
 2020-12-23 09:19:28 +01:00
Sebastian Huber
46a3c0446f bsps/arm: Remove optional start hook arguments 
The start hook arguments are not used by a BSP.  Removing them avoids
the need for a stack during the very early system initialization.

Update #4202.
 2020-12-23 09:19:28 +01:00
Sebastian Huber
76a1a53780 bsps/arm: Invalidate branch predictors earlier 
Make sure the branch predictors are invalidated before the first branch
is executed.

Update #4202.
 2020-12-23 09:19:28 +01:00
Sebastian Huber
272534eb72 bsps/arm: Set VBAR in start.S 
Set the VBAR to the vector table in the start section before
bsp_start_hook_0() is called to earlier handle exceptions in RTEMS.

Set the VBAR to the normal vector table in start.S for the main
processor.  Secondary processors set it in bsp_start_hook_0().

Update #4202.
 2020-12-23 09:19:17 +01:00
Sebastian Huber
b5aceef5d9 bsps: Remove gicvx_interrupt_dispatch() 
Avoid one level of indirection.

Update #4202.
 2020-12-16 11:00:03 +01:00
Christian Mauderer
9b3def237a bsps/arm/imx*: Fix location of shared headers 
When moving the headers from the imx BSP to the shared area, the wrong
directory has been selected. This patch fixes that problem.

Update #4180
 2020-12-14 11:29:36 +01:00
Sebastian Huber
105e52032e bsps: Remove ARM GIC SGI target filter 
Remove the target filter for software-generated interrupts since this
feature is not supported by the affinity routing in GICv3.

Update #4202.
 2020-12-10 09:42:50 +01:00
Sebastian Huber
b6925e10c8 bsps: Fix GICv3 arm_gic_trigger_sgi() 
Use the targets parameter to determine the targets of the SGI.  Change
targets parameter type to 32-bit to ease the parameter passing.  GICv3
supports up to 16 targets.

Update #4202.
 2020-12-10 09:42:49 +01:00
Sebastian Huber
e68827e1d9 arm/cache-cp15: Support Armv8 
Update #4202.
 2020-12-10 07:58:03 +01:00
Kinsey Moore
a151ee167e bsps: Move ARM GICv2 driver to bsps/shared 
This moves the ARM GICv2 driver to bsps/shared to be usable by AArch64
code.
 2020-12-02 18:51:40 -06:00
Kinsey Moore
f0859573f9 bsps: Move zynq-uart to bsps/shared 
This moves the zynq-uart driver from bsps/arm/shared to bsps/shared to
accomodate use by AArch64 BSPs.
 2020-12-02 18:51:40 -06:00
Christian Mauderer
7141afbb0e bsp/imxrt: Add new BSP 
Update #4180
 2020-11-20 08:53:19 +01:00
Christian Mauderer
6cece58544 bsps/imx: Move imx-gpio to arm/shared 
Update #4180
 2020-11-20 08:53:18 +01:00
Christian Mauderer
e00f443428 imx: Move imx_iomux to arm/shared 
Update #4180
 2020-11-20 08:53:18 +01:00
Sebastian Huber
273613f1a8 bsps/arm: Sort fast text/data sections 2020-10-21 07:58:38 +02:00
Sebastian Huber
3fccdc956c bsps/arm: Add support for MPU region alignment 
Update #3910.
 2020-10-21 07:58:34 +02:00
Kinsey Moore
f8ad5bb2a4 bsps: Break out AArch32 GICv3 support 
This breaks out AArch32-specific code so that the shared GICv3 code can
be reused by other architectures.
 2020-10-05 16:11:39 -05:00
Kinsey Moore
1480c3f5e8 bsps: Break out AArch32 portions of GPT driver 
This breaks AArch32-specific portions of the ARM GPT driver into their
own file so that the generic code can be moved for reuse by other
architectures.
 2020-10-05 16:11:39 -05:00
Kinsey Moore
1c03649312 Move ARM PL011 UART driver 
This UART driver is now needed for BSPs other than ARM.
 2020-10-05 16:11:39 -05:00
Sebastian Huber
20d82377a6 arm: Fix arm_cp15_set_translation_table_entries() 
In a multi-processor system we must broadcast the TLB maintenance operation to
the Inner Shareable domain to ensure that the other processors update their TLB
caches accordingly.

Close #4068.
 2020-09-17 08:20:35 +02:00
Jan Sommer
b87efa7599 bsp/xilinx-zynq: Flush TX-Buffer before initializing uart 
Closes #4055
Closes #4056
 2020-08-22 17:29:25 +10:00
Sebastian Huber
95d37b6307 bsps/arm: Use _Assert() 2020-08-20 14:54:18 +02:00
Christian Mauderer
222d687969 bsps/arm: Fix uninitialized value in generic timer 
_CPU_Counter_frequency() can be called by the rtems_counter
initialization before arm_gt_clock_initialize() initializes the value
used in _CPU_Counter_frequency().

Closes #3961.
 2020-04-20 09:07:35 +02:00
Sebastian Huber
51307919b4 arm: ARMv7-M statically initialized vector table 
Statically initialize the ARMv7-M vector table to allow a placement in
ROM with read-only MPU settings.

Change licence to BSD-2-Clause in some files.
 2020-04-03 09:12:44 +02:00