RTOS/rtems
1
0
Fork 0
forked from Imagelibrary/rtems
Code Pull Requests Activity
35,611 Commits 7 Branches 54 Tags
9c15524f15945e524acf9901f27145886744e565
Commit Graph

35611 Commits

This Branch
This Branch
All Branches
Author SHA1 Message Date
Gedare Bloom
9c15524f15 wscript: rename bsp_defaults to bspdefaults 2022-11-11 11:58:05 -07:00
Sebastian Huber
68e1dc87a6 validation: Fix unused variable warning 2022-11-11 16:48:12 +01:00
Sebastian Huber
77c8d822c3 bsps/riscv: Fix software interrupt dispatching 
In SMP configurations, there may be no software interrupt handler
installed when the software interrupt is processed.  Add the new
interrupt handler dispatch variant
bsp_interrupt_handler_dispatch_unlikely() for this special case.
 2022-11-11 16:38:25 +01:00
Sebastian Huber
55318d17b4 validation: Improve spurious interrupt test case 
Use the tm27 support to test a spurious interrupt.  This helps to run the
validation test case on targets which have no software interrupt available for
tests (for example riscv/PLIC/CLINT in the SMP configuration).
 2022-11-11 16:38:25 +01:00
Sebastian Huber
908ffc7a93 bsps/noel: Fix interrupt support 2022-11-11 16:38:25 +01:00
Kinsey Moore
b5983c559a cpukit/fdt: Fix typos and clarify params 2022-11-10 15:18:18 -06:00
Joel Sherrill
ecd8aec911 Remove remnants of rtems_io_lookup_name 
Updates #3420.
 2022-11-10 15:18:12 -06:00
Sebastian Huber
bfdfc979fd bsps/riscv: Fix PLIC enable register count 
Each PLIC enable register has 32 bits, so we have to divide by 32.
 2022-11-10 15:17:07 +01:00
Sebastian Huber
8f6dd3ca1f arm: Fix Armv7-M TLS support 
Set the thread ID register in the CPU context.

Update #3835.
Close #4753.
 2022-11-10 11:10:46 +01:00
Sebastian Huber
e4210d5a08 bsps/riscv: Skip init on not configured processors 2022-11-10 08:55:38 +01:00
Sebastian Huber
3e5ccdd34e bsps/riscv: Simplify riscv_plic_init() 2022-11-10 08:55:38 +01:00
Sebastian Huber
d2bac3d730 bsps/riscv: Simplify riscv_clint_init() 2022-11-10 08:55:38 +01:00
Sebastian Huber
ccf09a6e16 bsps/riscv: Add tm27 support 2022-11-10 08:55:38 +01:00
Sebastian Huber
ba53a177ab bsps/riscv: Always dispatch software interrupts 
This helps to run the interrupt API validation tests.
 2022-11-10 08:55:38 +01:00
Sebastian Huber
47d156d706 bsps/riscv: bsp_interrupt_get/set_affinity() 
Provide bsp_interrupt_get_affinity() and bsp_interrupt_set_affinity() only if
RTEMS_SMP is enabled.  Replace fatal error with a status code.
 2022-11-10 08:55:38 +01:00
Sebastian Huber
1bf1c779e1 bsps/riscv: bsp_interrupt_raise_on() 
Implement bsp_interrupt_raise_on() and bsp_interrupt_raise().
 2022-11-10 08:55:38 +01:00
Sebastian Huber
8a51ecc7b9 bsps/riscv: bsp_interrupt_is_pending() 
Implement this function.
 2022-11-10 08:55:38 +01:00
Sebastian Huber
d156d7b2f8 bsps/riscv: bsp_interrupt_get_attributes() 
Implement this function.
 2022-11-10 08:55:38 +01:00
Sebastian Huber
a52fc42454 bsps/riscv: Improve bsp_interrupt_vector_disable() 
Add support for hart-specific software and timer interrupts.
 2022-11-10 08:55:38 +01:00
Sebastian Huber
e19d490fbe bsps/riscv: Improve bsp_interrupt_vector_enable() 
Add support for hart-specific software and timer interrupts.
 2022-11-10 08:55:38 +01:00
Sebastian Huber
16c352de2f bsps/riscv: bsp_interrupt_vector_is_enabled() 
Implement this function.
 2022-11-10 08:55:38 +01:00
Sebastian Huber
9c80a88694 bsps/riscv: bsp_interrupt_is_valid_vector() 
Implement this function.
 2022-11-10 08:55:38 +01:00
Sebastian Huber
7d17b99660 bsps/riscv: RISCV_MAXIMUM_EXTERNAL_INTERRUPTS 
Increase RISCV_MAXIMUM_EXTERNAL_INTERRUPTS to 128 to support recent Qemu
versions by default.
 2022-11-10 08:55:38 +01:00
Sebastian Huber
f151e6f680 validation: Properly teardown test cases 
Make sure that the state of the testable interrupt vector is restored to the
state at the test case begin.
 2022-11-09 16:55:15 +01:00
Sebastian Huber
4a46161b3f riscv: Simplify _CPU_ISR_Set_level() 
Where CPU_ENABLE_ROBUST_THREAD_DISPATCH == TRUE, the only supported interrupt
level allowed to set is 0 (interrupts enabled).  This constraint is enforced by
the API level functions which return an error status for other interrupt
levels.
 2022-11-09 16:54:02 +01:00
Sebastian Huber
b66cda78b2 libmd: Remove extra digest copy in SHA256_Final() 
The extra digest copy was introduced by an erroneous merge conflict resolution
for commit "crypto routines: Hint minimum buffer sizes to the compiler".
 2022-11-09 16:54:02 +01:00
Sebastian Huber
3a38a0173b riscv: Remove superfluous init/fini functions 2022-11-09 16:54:02 +01:00
Sebastian Huber
0f9231002c config: Place init task storage area in .rtemsstack 
This avoids a superfluous zero initialization of the task storage area.  This
reduces the system initialization time.
 2022-11-09 16:54:02 +01:00
Kinsey Moore
080dc5d873 cpukit/aarch64: Emulate FPSR for FENV traps 
The AArch64 TRM specifies that when FPCR is set to trap floating point
exceptions, the FPSR exception bits are not set. This ensures that FPSR
is updated as FENV expects even if floating point exception traps are
enabled.
 2022-11-09 08:14:11 -06:00
Kinsey Moore
698227e6ea bsps/aarch64: Ensure FPU trap state is consistent 
RTEMS may be booted from a dirty environment. Ensure that FPU trap
settings are consistent.
 2022-11-09 08:14:11 -06:00
Kinsey Moore
7842a333e0 zynqmp: Add support for the CFC-400X 
This adds a BSP variant for the ZynqMP BSP family to support the
Innoflight CFC-400X platform. To properly support the CFC-400X, device
trees were added to the ZynqMP platform due to both the optional
management interface as well as alternate physical configuration of the
ethernet interfaces.
 2022-11-09 08:01:03 -06:00
Sebastian Huber
df81434421 rtems: Fix type in description 2022-11-08 07:40:55 +01:00
Gedare Bloom
dc8539c108 wscript: fix formatting with yapf 2022-11-07 09:49:38 -07:00
Sebastian Huber
e15c5e5623 build: Disable can01 for small memory BSPs 2022-11-07 10:07:50 +01:00
Sebastian Huber
b4ffaa7cdc bsps/riscv: Use start data for object 
Maybe this helps to ensure that the object is properly aligned.

Update #4658.
 2022-11-04 14:01:44 +01:00
Chris Johns
18b1a59184 cpukit/libdebugger: Fix stepping on ARM architectures 
Closes #4744
 2022-10-31 08:04:00 +11:00
Chris Johns
d64e10ea37 rtems-bsps: Generate empty config.ini for arc/bsp combinations 
- Generate a config for all BSPs in an arch
 2022-10-31 08:03:11 +11:00
Prashanth S
26d50bdfb6 bsps/arm/beagle/dcan: Added DCAN support 2022-10-30 09:35:54 +01:00
Prashanth S
cd91b37dce cpukit/dev/can: Added CAN support 2022-10-30 09:35:54 +01:00
Sebastian Huber
89ba2a9838 bsps/riscv: Workaround for sporadic linker issues 
Disable the linker relaxation in start.S to work around an issue described
here:

https://mail.gnu.org/archive/html/bug-binutils/2021-03/msg00164.html

The real issue is probably in the linker command file or the linker itself.

Update #4658.
 2022-10-28 14:05:02 +02:00
Dariusz Sabala
1eae6f24fe bsps/arm: fix Cortex-M7 systick reload value 
- see ARM DUI 0646C Arm Cortex-M7 Devices Generic User Guide
  "The RELOAD value is calculated according to its use.
  For example, to generate a multi-shot timer with a period
  of N processor clock cycles, use a RELOAD value of N-1.
  If the SysTick interrupt is required every 100 clock pulses,
  set RELOAD to 99."
- see routines used in CMSIS project for reference

Close #4746.
 2022-10-26 11:47:22 +02:00
Sebastian Huber
f6bcf1636b sptests: Avoid fatal error to end a test 
End the test with a normal exit instead of
INTERNAL_ERROR_THREAD_EXITTED.
 2022-10-25 08:00:32 +02:00
Sebastian Huber
468f21ed4f bsps: Add Cache Manager implementation group 
Update #3707.
 2022-10-24 13:34:32 +02:00
Chris Johns
d574e08663 libdebugger: Add a target break call to suspend all running threads 
- Optionally wait if there is no remote debugger connected and break
  when the remote connects

Closes #4740
 2022-10-18 07:37:57 +11:00
Alan Cudmore
1d2fab8a79 bsps: Improve riscv console FDT parsing 
This fixes a problem with parsing the FDT compatible property by
replacing the RISCV_CONSOLE_IS_COMPATIBLE macro with calls to
the fdt_stringlist_contains function. The macro only works when
the compatible FDT entry is a single string and not a list of
strings. The new call will compare each item in the string list.

Close #4728.
 2022-10-14 08:15:14 -05:00
Sebastian Huber
e9a69c5744 riscv: Move functions to avoid build issues 
The _RISCV_Map_cpu_index_to_hardid() and _RISCV_Map_hardid_to_cpu_index()
functions must be available to all riscv BSPs.
 2022-10-14 10:52:52 +02:00
Sebastian Huber
a7706515c7 validation: Use correct number of idle tasks 
Update #3716.
 2022-10-14 10:48:23 +02:00
Sebastian Huber
a1f23c2879 powerpc: Conditionally provide Context_Control_fp 
This avoids a pedantic warning about a zero size Context_Control_fp.
 2022-10-14 10:48:23 +02:00
Sebastian Huber
985aaac0ab powerpc: Fix 'noreturn' function does return 2022-10-14 10:48:23 +02:00
Sebastian Huber
64fbeaa0d1 score: INTERNAL_ERROR_IDLE_THREAD_STACK_TOO_SMALL 
Ensure that the IDLE storage allocator did allocate a suffiently large area.

Update #3835.
Update #4524.
 2022-10-14 10:48:23 +02:00