* Makefile.am, configure.ac, preinstall.am, s3c2400/include/s3c2400.h:
Add CPU type s3c2410. Add a new s3c24xx common file shared between
s3c2400 and s3c2410. Most content is moved from s3c2400 now. Some
were changed to include <s3c24xx.h> instead of <s3c2400.h>.
* s3c2410/include/s3c2410.h, s3c2410/irq/bsp_irq_asm.S,
s3c2410/irq/irq.h, s3c24xx/clock/clockdrv.c, s3c24xx/clock/support.c,
s3c24xx/include/s3c24xx.h, s3c24xx/irq/bsp_irq_init.c,
s3c24xx/irq/irq.c, s3c24xx/irq/irq.h, s3c24xx/timer/timer.c: New files.
* mpc8260/console-generic/console-generic.c,
mpc8xx/console-generic/console-generic.c: Remove all references to
console_reserve_resources and termios_reserve_resources.
* mpc5xx/console-generic/console-generic.c, mpc5xx/include/console.h,
mpc8260/console-generic/console-generic.c, mpc8260/include/console.h,
mpc8xx/console-generic/console-generic.c, mpc8xx/include/console.h:
Remove all references to console_reserve_resources and
termios_reserve_resources.
* new-exceptions/bspsupport/irq.c: don't disable irqs
at the interrupt controller (PIC) during initialization -- this
caused problems where some BSPs's BSP_disable_irq_at_pic() routine
did not ignore IRQ lines associated with cascaded PICs.
Rely on the BSP (BSP_setup_the_pic()) to provide a good
initial setup.
* new-exceptions/bspsupport/ppc_exc_asm_macros.h,
new-exceptions/bspsupport/ppc_exc.S,
new-exceptions/bspsupport/README,
new-exceptions/bspsupport/ppc_exc_hdl.c:
Thomas Doerfler clarified (thanks!) that raising an
exception and executing the 1st instruction is not
an atomical operation. I added a fix to the code that
checks if a lower-priority interrupt is under way:
we now not only test if the 'lock' variable was set
but also check if the interrupted PC points to the
'write lock' instruction.
Added more comments and updated README.
* Makefile.am, new-exceptions/bspsupport/README:
provide new irq_bspsupport.rel which was
split out of exc_bspsupport.rel to provide finer-grained
control over what BSPs want to use.
* at91rm9200/clock/clock.c, lpc22xx/clock/clockdrv.c,
mc9328mxl/clock/clockdrv.c, s3c2400/clock/clockdrv.c: Eliminate
copies of the Configuration Table. Use the RTEMS provided accessor
macros to obtain configuration fields.
* mcf5206/clock/ckinit.c, mcf5272/clock/ckinit.c: Eliminate copies of
the Configuration Table. Use the RTEMS provided accessor macros to
obtain configuration fields.
* new-exceptions/e500_raw_exc_init.c: map DEC
exception to ASM_BOOKE_DEC_VECTOR instead of ASM_DEC_VECTOR.
Fixed wrong mapping of ASM_BOOKE_FIT_VECTOR
(was ASM_BOOKE_PIT_VECTOR).
* new-exceptions/raw_exception.c, new_exceptions/raw_exception.h,
new_exceptions/bspsupport/irq.c: renamed ASM_BOOKE_PIT_VECTOR
to ASM_BOOKE_DEC_VECTOR to be closer to 'official'
nomenclature.
* new-exceptions/bspsupport/ppc_exc_hdl.c: make sure
RI is set in the exception frame and panic if it isn't
(state info might have been lost). This only affects
classic PPC.
* new-exceptions/bspsupport/README,
new-exceptions/bspsupport/ppc_exc_bspsupp.h
new-exceptions/bspsupport/vectors_init.c:
added crude test to make sure MMU maps memory as
write-back enabled.
* new-exceptions/bspsupport/ppc_exc_test.c,
new-exceptions/bspsupport/vectors_init.c,
new-exceptions/bspsupport/ppc_exc_bspsupp.h,
new-exceptions/bspsupport/README,
new-exceptions/bspsupport/irq_supp.h:
Added README and some comments; now use TRAP exception
in ppc_exc_test.c so that it works on PSIM.
* new-exceptions/bspsupport/, new-exceptions/bspsupport/ppc_exc.S,
new-exceptions/bspsupport/ppc_exc_test.c,
new-exceptions/bspsupport/vectors.h,
new-exceptions/bspsupport/vectors_init.c,
new-exceptions/bspsupport/irq.c,
new-exceptions/bspsupport/ppc_exc_bspsupp.h,
new-exceptions/bspsupport/ppc_exc_hdl.c,
new-exceptions/bspsupport/ppc_exc_asm_macros.h,
new-exceptions/bspsupport/nested_irq_test.c:
New files. Added 'middleware' code for helping BSPs implement
exception and interrupt handling and implementing the 'new'
RTEMS IRQ API (which I personally dislike).
* new-exceptions/e500_raw_exc_init.c, new-exceptions/raw_exception.c,
shared/include/cpuIdent.c, shared/include/cpuIdent.h:
Added different kinds of 'bookE' to the ppc_cpu_is_bookE feature
check; unfortunately...
* new-exceptions/raw_exception.c, new-exceptions/raw_exception.h:
Removed all #ifdef <cpu_flavor>. All exception vectors are now
always defined.
Changed implementation of <cpu>_vector_is_valid() from 'case'
statements to table lookup.
Replaced 'ASM_VECTORS_CRITICAL' by a variable
'bsp_raw_vector_is_405_critical' which is set at run-time.
Removed PPC_MSR_EXC_BITS. The exception handling code
(libbsp/shared/vectors/vectors.S and ../irq/irq_asm.S) now
has a run-time check for these bits.
Both files are now free of #if <cpu_flavor> constructs.
