Do not disable transmitter until shift register is empty when closing device.
It is correct to look at the sending software state when closing the device.
However, the sending state must be cleared only when everything is sent.
The APBUART control register can be updated from both ISR and task context so
the device must be locked when manipulating the register.
There is also a scenario with RX FIFO interrupts where a few characters can be
in the FIFO without generating interrupt.
The cons layer decides which of the registered console device is granted as
system console. When a device specific console driver performs its first_open,
it inherits UART parameters from boot loader only if it is the system console.
Utilize the APBUART RX delayed interrupt if available. It also
enables RX FIFO interrupt when used.
The APBUART RX delayed interrupt is supported by the GR740.
LEON driver manager console driver interface (cons) and the APBUART cons driver
(apbuart_cons) have been updated for recent TERMIOS interface changes. The
legacy callback API is not used anymore and deprecated functions are
eliminated.
This new implementation is based on RTEMS BSP and Device Driver Development
Guide, chapter named "Console Driver".
- Functions marked as deprecated (rtems_termios_open() and
rtems_termios_close()) have been updated with the present-day versions.
- The legacy "callback" interface is replaced with the "handler" interface.
- Implementation is inspired by the documentation example, the non-driver
manager driver for APBUART (apbuart_termios).
- Polled, interrupt and task mode is supported.
The FIFOs available capability bit is available in the UART Control Register:
FIFOs available (FA) - Set to 1 when receiver and transmitter FIFOs are
available. When 0, only holding register is available.
Delay interrupt can delay a receive character interrupt to better handle RX bursts.
- Compatible with SMP
- Selects timecounter depending on features available
- Fixes problem with time going to fast on SMP
This is an implementation of the RTEMS "clockdrv_shell" interface for
LEON2/3/4 systems using the Driver Manager. It is clock hardware agnostic
and compatible with SMP and UP. Availability of free running counters is
probed and selected as needed.
GR740:
RTEMS TESTSUITE FAILURE SUMMARY
Result Test ExecRes ConsoleRes ExitCode1 ExitCode2
FAIL: ./fstests/imfs_fsscandir01 OK FAIL 5 0
FAIL: ./fstests/jffs2_fsscandir01 OK FAIL 5 0
FAIL: ./fstests/mdosfs_fsscandir01 OK FAIL 5 0
FAIL: ./fstests/mimfs_fsscandir01 OK FAIL 5 0
FAIL: ./fstests/mrfs_fsscandir01 OK FAIL 5 0
FAIL: ./psxtests/psxshm01 FAIL FAIL N/A N/A
FAIL: ./psxtests/psxshm02 FAIL FAIL N/A N/A
FAIL: ./sptests/spinternalerror01 OK N/A -559038737 1611526157
FAIL: ./sptests/sptimecounter01 OK N/A 5 0
SUMMARY
Tests failing: 9
Tests successful: 578
---
GR712RC:
RTEMS TESTSUITE FAILURE SUMMARY
Result Test ExecRes ConsoleRes ExitCode1 ExitCode2
FAIL: ./smptests/smpipi01 FAIL FAIL N/A N/A
FAIL: ./smptests/smpthreadlife01 FAIL FAIL N/A N/A
FAIL: ./fstests/imfs_fsscandir01 OK FAIL 5 0
FAIL: ./fstests/jffs2_fsscandir01 OK FAIL 5 0
FAIL: ./fstests/mdosfs_fsscandir01 OK FAIL 5 0
FAIL: ./fstests/mimfs_fsscandir01 OK FAIL 5 0
FAIL: ./fstests/mrfs_fsscandir01 OK FAIL 5 0
FAIL: ./psxtests/psxshm01 FAIL FAIL N/A N/A
FAIL: ./psxtests/psxshm02 FAIL FAIL N/A N/A
FAIL: ./sptests/spinternalerror01 OK N/A -559038737 1611526157
FAIL: ./sptests/sptimecounter01 OK N/A 5 0
SUMMARY
Tests failing: 11
Tests successful: 576
The extended mechanism for switching input path by separated
alternative registers is already implemented in TMS570
pin multiplexer driver used for TMS570LS31xx
rtems/c/src/lib/libbsp/arm/tms570/pinmux/pinmux.c
But the code has not been tested on real TMS570LC43xx hardware yet.
