Some BSPs have issues linking the dl* tests. These issues have
not been investigated. This is a temporary workaround until we
have an explanation and permanent solution.
updates 2258.
This patch adds the macro BSP_START_NEEDS_REGISTER_INITIALIZATION and
three hooks for BSP-specific register init code to arm/shared/start.S.
Said hooks are bsp_start_init_registers_core (intended for initializing
the ARM core registers), bsp_start_init_registers_banked_fiq (for the
FIQ mode banked registers) and bsp_start_init_registers_vfp (for the FPU
registers). BSP_START_NEEDS_REGISTER_INITIALIZATION would be defined in
a BSP's configure.ac (so that it appears in its bspopts.h).
This patch also adds the register init code required by the TMS570.
We've tested it with the tms570ls3137_hdk.cfg config and it works fine.
This patch allows the existing FPU code to support both VFP-D16 and
VFP-D32. According to ARM, writes to D32DIS are ignored for D16 so
there's no need to enclose the bic instruction with an #ifdef. We tested
it on a TMS570LS3137 using TI initialization code and it works fine.
Signed-off by: Martin Galvan <martin.galvan@tallertechnologies.com>
Remove miniIMFS. Statically initialize the root IMFS.
Add configuration options to disable individual
features of the root IMFS, e.g.
o CONFIGURE_IMFS_DISABLE_CHOWN,
o CONFIGURE_IMFS_DISABLE_FCHMOD,
o CONFIGURE_IMFS_DISABLE_LINK,
o CONFIGURE_IMFS_DISABLE_MKNOD,
o CONFIGURE_IMFS_DISABLE_MOUNT,
o CONFIGURE_IMFS_DISABLE_READLINK,
o CONFIGURE_IMFS_DISABLE_RENAME,
o CONFIGURE_IMFS_DISABLE_RMNOD,
o CONFIGURE_IMFS_DISABLE_SYMLINK,
o CONFIGURE_IMFS_DISABLE_UNMOUNT, and
o CONFIGURE_IMFS_DISABLE_UTIME.
This allows it to be wrapped by another function at link-time
and can be used to trace interrupts. If not placed in a separate
file, the function pointer address used in BSP_shared_interrupt_init
will be resolved at compile-time, and the function will not be wrappable.
The structure tms570_sci_context holds state variable
tx_chars_in_hw which holds if and how many characters
(in the optional FIFO support for some Ti SCIs) are submitted
into hardware.
When field is not writable then code breaks when RTEMS
is build for Flash area.
The problem found and analyzed by Martin Galvan from tallertechnologies.
Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
Add AltiVec and FPU support to the Context_Control in case we use the
e6500 multilib.
Add PPC_MULTILIB_ALTIVEC and PPC_MULTILIB_FPU multilib defines. Add
non-volatile AltiVec and FPU context to Context_Control. Add save/restore of
non-volatile AltiVec and FPU to _CPU_Context_switch(). Add save/restore
of volatile AltiVec and FPU context to the exception code. Adjust data
cache optimizations for the new context and cache line size.
