* libchip/network/if_dc.c: Changed type of ISR argument to void* from
rtems_interrupt_vector, to permit passing arbitrary arguments to the
ISR. Clean up of variables to silence compiler warnings.
PR 1258/rtems
* cpukit/score/src/heapallocatealigned.c (block_allocate): New routine.
* cpukit/score/src/heapallocatealigned.c (_Heap_Allocate_aligned):
Use block_allocate() instead of _Heap_Block_allocate(). Replace
_Heap_Head(the_heap)->next with equivalent _Heap_First(the_heap).
* cpukit/score/src/heap.c (_Heap_Allocate): fix comments according
to changed block split strategy in _Heap_Allocate_aligned().
* libchip/network/smc91111.c, libchip/network/smc91111.h: Multiple fixes.
- Odd bit bug in some chips taken care of.
- Buggy ASSERT removed, it seem to be inserted to detect if MBUF data
alignment but failing to do so must have made the driver writer to make
some incorrect assumptions about MBUFs.
- Fixed MBUF handling to handle mbuf chains better. The Data length of
MBUFs in middle of the mbuf chain are now checked for odd number of bytes.
- Made while loop responsible for copying data to fifo port copy 16 shorts
per loop instead of 1 short, increasing the copying process.
* leon_smc91111/leon_smc91111.c: LEON2 SMC91111 initialization: PIO
Interrupt initialization fix and speed rate defaulted to 100Mbit/s
for boards with 50MHz system clock or greater now all defaults to
100Mbit/s
PR 1257/bsps
* sh7032/score/cpu_asm.c, sh7032/timer/timer.c, sh7045/score/cpu_asm.c,
sh7045/timer/timer.c, sh7750/score/cpu_asm.c, sh7750/timer/timer.c:
Code outside of cpukit should use the public API for
rtems_interrupt_disable/rtems_interrupt_enable. By bypassing the
public API and directly accessing _CPU_ISR_Disable and
_CPU_ISR_Enable, they were bypassing the compiler memory barrier
directive which could lead to problems. This patch also changes the
type of the variable passed into these routines and addresses minor
style issues.
PR 1257/bsps
* mpc5xx/exceptions/raw_exception.c, mpc5xx/irq/irq.c,
mpc6xx/exceptions/raw_exception.c,
mpc8260/exceptions/raw_exception.c,
mpc8xx/exceptions/raw_exception.c, new-exceptions/raw_exception.c,
ppc403/ictrl/ictrl.c, ppc403/irq/ictrl.c: Code outside of cpukit
should use the public API for
rtems_interrupt_disable/rtems_interrupt_enable. By bypassing the
public API and directly accessing _CPU_ISR_Disable and
_CPU_ISR_Enable, they were bypassing the compiler memory barrier
directive which could lead to problems. This patch also changes the
type of the variable passed into these routines and addresses minor
style issues.
PR 1257/bsps
* at91rm9200/irq/irq.c, lpc22xx/irq/irq.c, mc9328mxl/irq/irq.c,
s3c2400/irq/irq.c: Code outside of cpukit should use the public API
for rtems_interrupt_disable/rtems_interrupt_enable. By bypassing the
public API and directly accessing _CPU_ISR_Disable and
_CPU_ISR_Enable, they were bypassing the compiler memory barrier
directive which could lead to problems. This patch also changes the
type of the variable passed into these routines and addresses minor
style issues.
PR 1257/bsps
* shared/irq/i8259.c, shared/irq/irq.c: Code outside of cpukit should
use the public API for
rtems_interrupt_disable/rtems_interrupt_enable. By bypassing the
public API and directly accessing _CPU_ISR_Disable and
_CPU_ISR_Enable, they were bypassing the compiler memory barrier
directive which could lead to problems. This patch also changes the
type of the variable passed into these routines and addresses minor
style issues.
PR 1257/bsps
* irq/irq_init.c: Code outside of cpukit should use the public API for
rtems_interrupt_disable/rtems_interrupt_enable. By bypassing the
public API and directly accessing _CPU_ISR_Disable and
_CPU_ISR_Enable, they were bypassing the compiler memory barrier
directive which could lead to problems. This patch also changes the
type of the variable passed into these routines and addresses minor
style issues.
PR 1257/bsps
* irq/irq.c: Code outside of cpukit should use the public API for
rtems_interrupt_disable/rtems_interrupt_enable. By bypassing the
public API and directly accessing _CPU_ISR_Disable and
_CPU_ISR_Enable, they were bypassing the compiler memory barrier
directive which could lead to problems. This patch also changes the
type of the variable passed into these routines and addresses minor
style issues.
PR 1257/bsps
* irq/GT64260Int.c, irq/irq.c: Code outside of cpukit should use the
public API for rtems_interrupt_disable/rtems_interrupt_enable. By
bypassing the public API and directly accessing _CPU_ISR_Disable and
_CPU_ISR_Enable, they were bypassing the compiler memory barrier
directive which could lead to problems. This patch also changes the
type of the variable passed into these routines and addresses minor
style issues.
PR 1257/bsps
* startup/bspclean.c: Code outside of cpukit should use the public API
for rtems_interrupt_disable/rtems_interrupt_enable. By bypassing the
public API and directly accessing _CPU_ISR_Disable and
_CPU_ISR_Enable, they were bypassing the compiler memory barrier
directive which could lead to problems. This patch also changes the
type of the variable passed into these routines and addresses minor
style issues.
PR 1257/bsps
* shared/irq/idt.c, shared/irq/irq.c, shared/irq/irq_init.c: Code
outside of cpukit should use the public API for
rtems_interrupt_disable/rtems_interrupt_enable. By bypassing the
public API and directly accessing _CPU_ISR_Disable and
_CPU_ISR_Enable, they were bypassing the compiler memory barrier
directive which could lead to problems. This patch also changes the
type of the variable passed into these routines and addresses minor
style issues.
PR 1257/bsps
* console/inch.c, console/keyboard.c, console/pc_keyb.c, console/vt.c:
Code outside of cpukit should use the public API for
rtems_interrupt_disable/rtems_interrupt_enable. By bypassing the
public API and directly accessing _CPU_ISR_Disable and
_CPU_ISR_Enable, they were bypassing the compiler memory barrier
directive which could lead to problems. This patch also changes the
type of the variable passed into these routines and addresses minor
style issues.
PR 1257/bsps
* csb336/network/lan91c11x.c, csb337/startup/bspstart.c,
edb7312/irq/irq.c, gba/irq/irq.c, gba/irq/irq_init.c,
gp32/startup/bspstart.c, rtl22xx/startup/bspstart.c,
shared/abort/abort.c, shared/abort/simple_abort.c,
shared/irq/irq_init.c: Code outside of cpukit should use the public
API for rtems_interrupt_disable/rtems_interrupt_enable. By bypassing
the public API and directly accessing _CPU_ISR_Disable and
_CPU_ISR_Enable, they were bypassing the compiler memory barrier
directive which could lead to problems. This patch also changes the
type of the variable passed into these routines and addresses minor
style issues.
* cpu_asm.S: Fix two problems:
- CC bit has been clobbered and was not correctly restored
- bfin hardware does not allow to read instructions from the L1
* startup/bspstart.c: Add a useful routine to program memory protection
in bfin. It is not used but a user of ezKit533 can customize its bsp
and use this function.
