Statically initialize the trap table in start.S to jump to _SPARC_Bad_trap()
for all unexpected traps. This enables a proper RTEMS fatal error handling
right from the start. Do not rely on the stack and register settings which
caused an unexpected trap. Use the ISR stack of the processor to do the fatal
error handling. Save the full context which caused the trap. Fatal error
handler may use it for error logging.
Unify the _CPU_Exception_frame_print() implementations and move it to cpukit.
Update #4459.
Move _CPU_ISR_install_raw_handler() and _CPU_ISR_install_vector() to separate
files. The goal is to make their use optional.
Update #4458.
Update #4459.
The _ISR_Handler_initialization() does not touch the _ISR_Vector_table[]. Move
the definition of _ISR_Vector_table[] to a separate file.
Change license to BSD-2-Clause according to file history and re-licensing
agreement.
Update #3053.
Make the initialization of the per-CPU data optional.
Change license to BSD-2-Clause according to file history and
re-licensing agreement.
Update #3053.
Created futimens.c and utimensat.c to add support for the POSIX
methods futimens() and utimensat().
utime() and utimes() are considered obsolote by POSIX, but RTEMS
will continue to support them.
Closes#4396
Add the BSPs for running on the ZU3EG Ultrascale+ Zynq MPSoC and alter
the option defaults necessary for them to run properly using the
standard BOOT.BIN configured for PetaLinux that comes in the Out-of-Box
package.
Currently, the AArch64 BSPs have a hard time running on real hardware
without building the toolchain and the bsps with -mstrict-align in
multiple places. Configuring the MMU on these chips allows for unaligned
memory accesses for non-device memory which avoids requiring strict
alignment in the toolchain and in the BSPs themselves.
In writing this driver, it was found that the synchronous exception
handling code needed to be rewritten since it relied on clearing SCTLR_EL1 to
avoid thread stack misalignments in RTEMS_DEBUG mode. This is now
avoided by exactly preserving thread mode stack and flags and the new
implementation is compatible with the draft information provided on the
mailing list covering the Exception Management API.
The default available RAM on the A53 BSP is quite small at 8MB. This
bumps that to 128MB to avoid allocation failures in tmcontext01 caused
by large allocations on a cache size of 16MB reported by the system
registers in QEMU.
Move this diagnostic function to a separate file since it does not
provide a core function of the system.
Change license to BSD-2-Clause according to file history and
re-licensing agreement.
Update #3053.
Move clock_nanosleep() to a separate file to avoid a dependency on errno
which pulls in the Newlib reentrancy support. This is an issue since
most parts which are pulled in cannot be garbage collected by the linker
due to the system initialization linker set.
The sizes are configurable via fuses or per software via some registers.
At the moment the registers are not changed. Changing the registers
destroys data stored in the RAM areas (like application code or data).
So either the fuses or some bootloader should be used to set them before
the application starts.
This also adds an OCRAM only linker command file.
Update #4180
The "powerpc/shared/console" code has the start-up console value fixed
at 9600 baud. This changes the hard-wired constant "9600" in the code
to the configuration setting "BSP_CONSOLE_BAUD" and adds configuration
support in both the "waf" and the legacy configuration systems.
Note that the VME BSPs beatnik, mvme3100, and mve5100 can be improved
by adding a "mvmexxxx" BSP family. This configuration change, as well
as future configuration changes, could then be made in a "grp.yml" file.
Move rtems_calloc() since it only depends on rtems_malloc(). This may
make it easier to customize the heap allocator.
Change licence to BSD-2-Clause according to file history.
Update #3053.
