Commit Graph

13099 Commits

Author SHA1 Message Date
Sebastian Huber
e870941bb0 libmisc: More useful default configuration
The dummy.c was a de-facto default configuration.  Rename it to
default-configuration.c.  Use unlimited objects and the stack checker.
This makes it easier for new RTEMS users which will likely use this file
if they just work with the usual main() function as the application
entry point.  Provide proper arguments for main() using the BSP command
line.  Add spare user extensions and drivers.

Do not initialize the network by default.  Delete bspinit.c.
2014-12-05 07:47:06 +01:00
Ben Gras
13d9029453 beagle bsp: disable watchdog on am335x
On recent u-boots, the watchdog is turned on / left enabled. The
Beaglebone Black rev. C ships with such a u-boot internally so any
application booting from it must disable the watchdog.

Therefore this change is needed to boot an RTEMS app out-of-the-box
on a BBB Rev C - otherwise the user button must be held during boot
(to bypass the stock uboot) or the internal uboot must be updated. To
allow for a better out-of-the-box experience, we just turn off the
watchdog.
2014-12-05 04:05:45 +01:00
Jan Dolezal
038e1dba31 i386: doxygen and comments related to VESA real mode framebuffer 2014-12-04 13:37:50 -05:00
Jan Dolezal
d78eac64a8 i386/pc386: cammelCase (struct and function names) to underscores, typedefed structs, break >80 chars lines, removed newlines at EOFs
fb_vesa_rm.c: removed inline from functions declared in fb_vesa.h
              removed unnecessary printks in the end of patch
edid.h, vbe3.h: switched from custom *PACKED_ATTRIBUTE at the structs to the
                RTEMS_COMPILER_PACKED_ATTRIBUTE for easier maintainability
                of doxygen
2014-12-04 13:37:50 -05:00
Sebastian Huber
adc1dbeb39 bsp/leon3: Fix trap table initialization
Fixes bug introduced with dff1803cfb.
2014-12-04 15:16:26 +01:00
Daniel Hellstrom
dff1803cfb SPARC: optimize IRQ enable & disable
* Coding style cleanups.
* Use OS reserved trap 0x89 for IRQ Disable
* Use OS reserved trap 0x8A for IRQ Enable
* Add to SPARC CPU supplement documentation

This will result in faster Disable/Enable code since the
system trap handler does not need to decode which function
the user wants. Besides the IRQ disable/enabled can now
be inline which avoids the caller to take into account that
o0-o7+g1-g4 registers are destroyed by trap handler.

It was also possible to reduce the interrupt trap handler by
five instructions due to this.
2014-12-04 12:51:11 +01:00
Ben Gras
4081032ce0 pc386 bsp fix for default mode
If USE_VBE_RM is 0, vesa_realmode_bootup_init() is not available so the
test should be #if instead of #ifdef.
2014-12-03 18:06:29 +01:00
Nick Withers
fa4fe456b7 Move the flash size probe into bankValidate()
Previously, bankValidate() could be called (e.g., BSP_flashWrite() -> regionCheckAndErase() -> argcheck() -> bankValidate()) without the probe having happened. When it then invoked BSP_flashCheckId(), unmapped memory could be read, possibly causing a fatal exception.
2014-12-03 07:51:02 +01:00
Jiri Gaisler
2501814ee9 sparc/leon2: LEON_Is_interrupt_masked for Leon2 in leon.h wrongly defined
Condition needs to be inverted, as a 1 in the mask register means
    that the interrupt is enabled. Solves ticket #1959 in trac.
2014-12-02 14:04:11 +01:00
Jiri Gaisler
291f30f285 sparc/leon3: LEON_Is_interrupt_masked for Leon3 in leon.h wrongly defined
Condition needs to be inverted, as a 1 in the mask register means
that the interrupt is enabled. Solves ticket #1958 in trac.
2014-12-02 14:04:04 +01:00
Daniel Hellstrom
0d3b5d4742 SPARC: optimize window underflow trap
Save five instructions on underflow handling.

By using an optimized trap entry we can move instructions from
the window underflow function into the trap entry vector. By
setting WIM=0 and using RESTORE it is possible to move the
new WIM register content from the trapped window into the
to-be-restored register window. It is then possible to avoid
the WIM write delay.
2014-12-02 13:57:20 +01:00
Daniel Hellstrom
6930aa7f19 SPARC: optimize window overflow trap entry
By using a optimized trap entry we can move instructions from
the window overflow function into the trap entry vector. By
using the saved locals instead of g1 we don't need to save
that register temporarily. Also spead out non store instructions
inbetween stores to use the write buffer better.
2014-12-02 13:57:15 +01:00
Daniel Hellstrom
348d1812ba SPARC: window overflow optimization
I see no need for waiting the 3 instruction delay for wim to be
written in this case, since the STD after does not depend on WIM
2014-12-02 13:55:50 +01:00
Chris Johns
dd309b1054 m68k/mcf5235: GCC 4.9.2 generates invalid code for Init5235.
Move the vector table copy out of the Init5235 source to avoid
stipping the GCC bug.

Fixes #2204.
2014-12-01 14:55:23 +11:00
Sebastian Huber
3a8566b796 bsp/qoriq: Delete empty header file
close #2062
2014-11-27 14:03:34 +01:00
Sebastian Huber
cbc433c7a2 bsps/arm: Add .nocache section
This section can be use to provide a cache coherent memory area via
rtems_cache_coherent_add_area().
2014-11-27 10:33:30 +01:00
Josh Oguin
aed6e1de21 libchip/serial/z85c30.c: Remove redundant assignment
This was flagged by CodeSonar.
2014-11-26 07:51:57 -06:00
Josh Oguin
02958c5e53 libchip/serial/ns16550* and z8530*: Assert on baud number to avoid divide by 0
This was flagged by CodeSonar. It should be impossible to get an
incorrect baud number back but ensure this in debug mode. The _Assert()
keeps their scanner from evaluating for divide by 0 past this point.
2014-11-26 07:51:57 -06:00
Josh Oguin
0ad1e8001f libchip/display/disp_hcms29xx.c: Remove useless variable and check
This was flagged by CodeSonar.
2014-11-26 07:51:57 -06:00
Josh Oguin
61f8d668d0 libbsp/shared/bspinit.c: Document assumption of NULL returned 2014-11-26 07:51:57 -06:00
Sebastian Huber
7e5c9b895e rtems: Move rtems_cache_aligned_malloc()
Make sure also the size is cache aligned since otherwise we may have
some overlap with the next allocation block.  A cache invalidate on this
area would be fatal.
2014-11-25 16:08:16 +01:00
Sebastian Huber
42fe0d3fbb bsps/arm: L2C 310 avoid infinite loops 2014-11-25 16:08:16 +01:00
Sebastian Huber
55db0e52be bsp/ngmp: Use -muser-mode GCC option
This option is necessary to use the latest GCC 4.8, 4.9 and 5.0
versions.
2014-11-24 09:44:50 +01:00
Joel Sherrill
b46a31e0b8 leon2: include <rtems/ringbuf.h> not <ringbuf.h>
close #2113
2014-11-23 09:48:26 -06:00
Joel Sherrill
ff1c6130ed powerpc/haleakala: Fix warnings 2014-11-21 13:47:43 -06:00
Nigel Spon
502609c80d powerpc/haleakala: Add network driver
close 1405
2014-11-21 13:47:42 -06:00
Sebastian Huber
11925eef78 Delete or rename MIN/MAX macros and defines
Include <sys/param.h> if necessary to get the MIN()/MAX() macros.
2014-11-21 08:52:29 +01:00
Gedare Bloom
280f4ecc88 autotools: regenerate preinstall.am for pc386 2014-11-20 11:05:02 -05:00
Jan Dolezal
067da5c45d i386/pc386: VESA based frame buffer utilizing real mode interrupt 10h 2014-11-20 09:52:40 -05:00
Jan Dolezal
c5a74946ac i386/pc386/include: header files for VESA BIOS EXTENSIONS and VESA Extended Display Identification Data 2014-11-20 09:52:40 -05:00
Jan Dolezal
586c86c75a i386/shared/realmode_int: real mode interrupt interface 2014-11-20 09:52:39 -05:00
Jan Dolezal
74d2d94041 i386: global descriptor table manipulation functions 2014-11-20 09:52:39 -05:00
Jan Dolezal
d885b2b213 i386: GDTR manipulation functions parameters changed to use explicit width types 2014-11-20 09:52:39 -05:00
Jan Dolezal
ec494ffbfc i386/pc386: configurable size of descriptor tables 2014-11-20 09:52:38 -05:00
Sebastian Huber
50440c065e bsps/arm: Enable L2C for Cortex-A9 MPCore BSPs 2014-11-20 11:36:03 +01:00
Sebastian Huber
d1eb7b1707 bsps/arm: L2C 310 drop exclusive cache support
Optimize locking.
2014-11-20 10:30:28 +01:00
Sebastian Huber
5f4f828259 bsps/arm: L1 cache support changes 2014-11-20 10:30:28 +01:00
Sebastian Huber
e492e7f8d8 bsps/arm: L2C 310 compile-time errata 588369 2014-11-20 10:30:28 +01:00
Sebastian Huber
52d24b00db bsps/arm: L2C 310 compile-time errata 753970 2014-11-20 10:30:28 +01:00
Sebastian Huber
5574188670 bsps/arm: L2C 310 exclusive config is fatal 2014-11-20 10:30:28 +01:00
Sebastian Huber
d53de34428 bsps/arm: L2C 310 use l2c_310_* prefix throughout 2014-11-20 10:30:27 +01:00
Sebastian Huber
861d315aa0 bsps/arm: L2C 310 use L2C_310_* prefix throughout 2014-11-20 10:30:27 +01:00
Sebastian Huber
f2fed0c197 bsps/arm: L2C 310 add compile time checks
Simplify initialization.  Replace some assert() with fatal errors.
2014-11-20 10:30:27 +01:00
Sebastian Huber
13f1462ff4 bsps/arm: L2C 310 delete invalid link 2014-11-20 10:30:27 +01:00
Sebastian Huber
a9d6c2091b bsps/arm: L2C 310 simplify and remove white space 2014-11-20 10:30:27 +01:00
Sebastian Huber
957c07575a bsps/arm: L2C 310 rename BSP_ARM_L2CC_BASE
Rename BSP_ARM_L2CC_BASE to BSP_ARM_L2C_310_BASE.
2014-11-20 10:30:26 +01:00
Sebastian Huber
45a63ee8d6 bsp/xilinx-zynq: Add Cadence I2C bus driver 2014-11-20 10:30:20 +01:00
Sebastian Huber
bdf8fa76c2 bsp/xilinx-zynq: Add zync_clock_cpu_1x() 2014-11-20 10:30:20 +01:00
Sebastian Huber
234d5c408c bsp/xilinx-zynq: Rename BSP_ARM_A9MPCORE_UARTCLK
Rename BSP_ARM_A9MPCORE_UARTCLK to ZYNQ_CLOCK_UART since this clock has
nothing to do with the Cortex-A9 MPCore.
2014-11-20 10:30:20 +01:00
Sebastian Huber
8100e7117c bsp/xilinx-zynq: Adjust BSP_ARM_A9MPCORE_PERIPHCLK 2014-11-20 10:30:20 +01:00