* new-exceptions/e500_raw_exc_init.c, new-exceptions/raw_exception.c,
shared/include/cpuIdent.c, shared/include/cpuIdent.h:
Added different kinds of 'bookE' to the ppc_cpu_is_bookE feature
check; unfortunately...
* new-exceptions/raw_exception.c, new-exceptions/raw_exception.h:
Removed all #ifdef <cpu_flavor>. All exception vectors are now
always defined.
Changed implementation of <cpu>_vector_is_valid() from 'case'
statements to table lookup.
Replaced 'ASM_VECTORS_CRITICAL' by a variable
'bsp_raw_vector_is_405_critical' which is set at run-time.
Removed PPC_MSR_EXC_BITS. The exception handling code
(libbsp/shared/vectors/vectors.S and ../irq/irq_asm.S) now
has a run-time check for these bits.
Both files are now free of #if <cpu_flavor> constructs.
* Makefile.am, configure.ac, preinstall.am,
new-exceptions/e500_raw_exc_init.c: Started adding
support for e500 CPU. Most stuff is borrowed from mpc6xx.
* rtems/powerpc/powerpc.h: added a #ifdef __ppc_generic
branch. The goal is eventually to make this the starting
point for cleanup (remove as many branches as possible;
replace by run-time tests if necessary).
* new-exceptions/raw_exception.c, new-exceptions/raw_exception.h:
Qualified all exception vector symbols that are only defined
#ifdef <cpu_flavor> with <cpu_flavor> in the symbol name.
If the special flavor __ppc_generic is effective the ALL
vector symbols are available and ppc_vector_is_valid() works
for all supported CPUs (run-time check).
This is work towards a #ifdef <cpu_flavor> free libcpu and
exception framework.
* mpc5xx/console-generic/console-generic.c, mpc8260/timer/timer.c,
new-exceptions/cpu.c, old-exceptions/cpu.c: Move interrupt_stack_size
field from CPU Table to Configuration Table. Eliminate CPU Table from
all ports. Delete references to CPU Table in all forms.
* mpc5xx/console-generic/console-generic.c: Moved most of the remaining
CPU Table fields to the Configuration Table. This included
pretasking_hook, predriver_hook, postdriver_hook, idle_task,
do_zero_of_workspace, extra_mpci_receive_server_stack,
stack_allocate_hook, and stack_free_hook. As a side-effect of this
effort some multiprocessing code was made conditional and some style
clean up occurred.
* new-exceptions/raw_exception.c, new-exceptions/raw_exception.h,
old-exception/cpu.c: define bsp_exceptions_in_RAM variable.
This is probably only used by the simulator (were else
can you install something to ROM ??).
* mpc6xx/mmu/bat.c, mpc6xx/mmu/pte121.c: use new
feature-checks from cpuIdent.h rather than filtering
CPU types when checking for availability of high BATs
and an MMU with hardware page-table lookup.
* shared/include/cpuIdent.h, shared/include/cpuIdent.c:
Added a simple 'feature check' facility. Code should
not check for a particular CPU type if possible but
check the respective feature bit (e.g., 'has_altivec').
This makes it much less cumbersome to add more CPU
types in the future.
* mpc5xx/clock/clock.c, mpc5xx/timer/timer.c, mpc8260/clock/clock.c,
mpc8260/cpm/brg.c, mpc8260/timer/timer.c, mpc8xx/clock/clock.c,
mpc8xx/console-generic/console-generic.c, mpc8xx/timer/timer.c,
new-exceptions/raw_exception.c, old-exceptions/cpu.c,
ppc403/clock/clock.c, ppc403/console/console.c,
ppc403/console/console.c.polled, ppc403/console/console405.c,
ppc403/ictrl/ictrl.c, ppc403/irq/ictrl.c, ppc403/timer/timer.c,
ppc403/tty_drv/tty_drv.c: Eliminate PowerPC specific elements from
the CPU Table. They have been replaced with variables named bsp_XXX
as needed.
* sh7032/clock/ckinit.c, sh7032/delay/delay.c, sh7032/timer/timer.c,
sh7045/clock/ckinit.c, sh7045/timer/timer.c, sh7750/clock/ckinit.c,
sh7750/timer/timer.c: Eliminate the clicks_per_microsecond field in
the SuperH CPU Table and define another mechanism for drivers to
obtain this information.
* clock/ckinit.c: Eliminate the clicks_per_microsecond field in the
MIPS CPU Table and define another mechanism for drivers to obtain
this information.
* shared/src/cache.c: moved generic operations
(flush/invalidate 1 data line, invalidate 1 inst. line)
from #ifdef <cpu_flavor> to general section (all CPUs).
* mpc5xx/irq/irq.c, mpc5xx/exceptions/raw_exception.c,
new-exceptions/raw_exception.c: test for non-NULL-ness before calling
'on'/'off' methods so that users don't have to provide
no-ops if they don't want this feature.
PR 1257/bsps
* sh7032/score/cpu_asm.c, sh7032/timer/timer.c, sh7045/score/cpu_asm.c,
sh7045/timer/timer.c, sh7750/score/cpu_asm.c, sh7750/timer/timer.c:
Code outside of cpukit should use the public API for
rtems_interrupt_disable/rtems_interrupt_enable. By bypassing the
public API and directly accessing _CPU_ISR_Disable and
_CPU_ISR_Enable, they were bypassing the compiler memory barrier
directive which could lead to problems. This patch also changes the
type of the variable passed into these routines and addresses minor
style issues.
PR 1257/bsps
* mpc5xx/exceptions/raw_exception.c, mpc5xx/irq/irq.c,
mpc6xx/exceptions/raw_exception.c,
mpc8260/exceptions/raw_exception.c,
mpc8xx/exceptions/raw_exception.c, new-exceptions/raw_exception.c,
ppc403/ictrl/ictrl.c, ppc403/irq/ictrl.c: Code outside of cpukit
should use the public API for
rtems_interrupt_disable/rtems_interrupt_enable. By bypassing the
public API and directly accessing _CPU_ISR_Disable and
_CPU_ISR_Enable, they were bypassing the compiler memory barrier
directive which could lead to problems. This patch also changes the
type of the variable passed into these routines and addresses minor
style issues.
PR 1257/bsps
* at91rm9200/irq/irq.c, lpc22xx/irq/irq.c, mc9328mxl/irq/irq.c,
s3c2400/irq/irq.c: Code outside of cpukit should use the public API
for rtems_interrupt_disable/rtems_interrupt_enable. By bypassing the
public API and directly accessing _CPU_ISR_Disable and
_CPU_ISR_Enable, they were bypassing the compiler memory barrier
directive which could lead to problems. This patch also changes the
type of the variable passed into these routines and addresses minor
style issues.
PR 1249/build
* configure.ac: Jerry Needell <jerry.needell@unh.edu> reported that the
leon3 was left out of the cache enable logic. Thus the cache
management support code was empty on LEON3 CPUs.
