Commit Graph

51 Commits

Author SHA1 Message Date
Hesham ALMatary
10504d3ca4 doc: Add new documentation section for Epiphany architecture 2015-05-21 16:03:34 -04:00
Alexander Krutwig
a9c4f15dbe doc: Clarify SPARC floating point ABI 2015-05-21 09:02:51 +02:00
Daniel Cederman
b92f737c24 doc: Describe new default error handler for Sparc 2015-02-11 15:35:27 +01:00
Sebastian Huber
48cfe6819e doc: Add multilib section to CPU supplement
Add multilib section for ARM and PowerPC
2014-12-16 11:34:47 +01:00
Daniel Hellstrom
dff1803cfb SPARC: optimize IRQ enable & disable
* Coding style cleanups.
* Use OS reserved trap 0x89 for IRQ Disable
* Use OS reserved trap 0x8A for IRQ Enable
* Add to SPARC CPU supplement documentation

This will result in faster Disable/Enable code since the
system trap handler does not need to decode which function
the user wants. Besides the IRQ disable/enabled can now
be inline which avoids the caller to take into account that
o0-o7+g1-g4 registers are destroyed by trap handler.

It was also possible to reduce the interrupt trap handler by
five instructions due to this.
2014-12-04 12:51:11 +01:00
Sebastian Huber
1434dbd6eb doc: Clarify ABI in SPARC CPU supplement 2014-09-12 16:13:55 +02:00
Sebastian Huber
33676c8c2b doc/arm: Update floating point unit support 2014-09-08 07:53:03 +02:00
Joel Sherrill
a7ec6fac9b or1k.t: Fix spelling errors 2014-08-20 15:49:42 -05:00
Hesham ALMatary
b08829228d Add new documentation section for OpenRISC CPU architecture. 2014-08-20 15:46:15 -05:00
Sebastian Huber
7c0bd74c87 sparc: Add _CPU_Get_current_per_CPU_control()
Use register g6 for the per-CPU control of the current processor.  The
register g6 is reserved for the operating system by the SPARC ABI.  On
Linux register g6 is used for a similar purpose with the same method
since 1996.

The register g6 must be initialized during system startup and then must
remain unchanged.

Since the per-CPU control is used in all critical sections of the
operating system, this is a performance optimization for the operating
system core procedures.  An additional benefit is that the low-level
context switch and interrupt processing code is now identical on non-SMP
and SMP configurations.
2014-04-28 09:26:19 +02:00
Sebastian Huber
3fe1e4308a sparc: Document register g7 usage 2014-04-28 09:26:19 +02:00
Sebastian Huber
b2ec2d1597 sparc: Optimize context switch
The registers g2 through g4 are reserved for applications.  GCC uses
them as volatile registers by default.  So they are treated like
volatile registers in RTEMS as well.
2014-04-28 09:26:19 +02:00
Sebastian Huber
d60e760e80 bsps: Fix TLS support in linker command files
The TLS section symbols had wrong values in case of an empty TLS data
section and a nonempty TLS BSS section.
2014-04-22 09:51:17 +02:00
Sebastian Huber
320faf8e68 score: Clarify TLS support 2014-04-17 08:06:40 +02:00
Sebastian Huber
0bf59cf0ae Add documentation for profiling 2014-03-14 08:46:51 +01:00
Sebastian Huber
24bf11eca1 score: Add CPU counter support
Add a CPU counter interface to allow access to a free-running counter.
It is useful to measure short time intervals.  This can be used for
example to enable profiling of critical low-level functions.

Add two busy wait functions rtems_counter_delay_ticks() and
rtems_counter_delay_nanoseconds() implemented via the CPU counter.
2014-02-14 10:28:29 +01:00
Sebastian Huber
022851aba5 Add thread-local storage (TLS) support
Tested and implemented on ARM, m68k, PowerPC and SPARC.  Other
architectures need more work.
2014-02-04 10:06:35 +01:00
Joel Sherrill
5124d64acd sparc.t: Correct for V8/V9 2013-11-20 15:26:11 -06:00
Joel Sherrill
4eaf781826 doc master include files: Do not include top node on printed output
In PDF, DVI, and PostScript files, the contents of the @top
node were being printed. These are intended only for info
and html output formats.
2013-02-26 08:03:58 -06:00
Joel Sherrill
838bfb6b5d doc: Update version.texi and stamp-vti files
See http://www.rtems.org/pipermail/rtems-devel/2013-February/002466.html
for instructions on how to do this.
2013-02-26 08:03:58 -06:00
Joel Sherrill
b6ecf33c99 doc: Update to build info format with texinfo 4.13 and 5.0
Texinfo 5.0 is a complete reimplementation and has stricter
interpretations of the texinfo language.
2013-02-26 08:03:57 -06:00
Joel Sherrill
2d7ae960bb v850 port: Initial addition with BSP for simulator in GDB
Port
  + v850 does not have appear to have any optimized bit scan instructions
  + v850 does have single instructions for wap u16 and u32
  + Code path optimization preferences set
  + Add BSP variants for each GCC CPU model flag and a README
    - v850e1 variant does not work (fails during BSP initialization)
BSP for GDB v850 Simulator
  + linkcmds matches defaults in GDB simulator with RTEMS mods
  + crt1.c added from v850 newlib port for __main()
  + BSP exits cleanly
  + printk and console I/O work
  + uses clock tick from IDLE task
  + Tests not requiring real clock ISR work
Documentation
  + CPU Supplment chapter for v850 added
2012-06-11 13:37:29 -05:00
Joel Sherrill
9b4422a251 Remove All CVS Id Strings Possible Using a Script
Script does what is expected and tries to do it as
smartly as possible.

+ remove occurrences of two blank comment lines
  next to each other after Id string line removed.
+ remove entire comment blocks which only exited to
  contain CVS Ids
+ If the processing left a blank line at the top of
  a file, it was removed.
2012-05-11 08:44:13 -05:00
Joel Sherrill
33a105fb69 Revert: Remove CVS Ids
See http://www.rtems.org/pipermail/rtems-devel/2012-May/001006.html
for details.
2012-05-07 11:08:48 -05:00
Ralf Corsépius
9847d61df1 Remove CVS-Ids. 2012-05-04 09:36:25 +02:00
Joel Sherrill
61250b4ce9 Remove all .cvsignore files. 2012-02-01 10:59:44 -06:00
Joel Sherrill
abdeac2a14 2011-12-06 Joel Sherrill <joel.sherrill@oarcorp.com>
PR 1793/doc
	* .cvsignore, Makefile.am, README, configure.ac, index.html.in,
	main.am, project.am, ada_user/.cvsignore, ada_user/ada_user.texi,
	ada_user/example.texi, bsp_howto/.cvsignore,
	bsp_howto/bsp_howto.texi, cpu_supplement/.cvsignore,
	cpu_supplement/cpu_supplement.texi, cpu_supplement/preface.texi,
	develenv/.cvsignore, develenv/develenv.texi, develenv/intro.texi,
	filesystem/.cvsignore, filesystem/filesystem.texi,
	filesystem/preface.texi, networking/.cvsignore,
	networking/networking.texi, networking/preface.texi,
	porting/.cvsignore, porting/porting.texi, porting/preface.texi,
	posix1003.1/.cvsignore, posix1003.1/posix1003_1.texi,
	posix_users/.cvsignore, posix_users/posix_users.texi,
	posix_users/preface.texi, shell/.cvsignore, shell/preface.texi,
	shell/shell.texi, started/.cvsignore, started/started.texi,
	user/.cvsignore, user/c_user.texi, user/dirstat.texi,
	user/example.texi, user/glossary.texi, user/preface.texi: Convert
	from texi2www to texi2html.
	* texi2html_init.in: New file.
	* rtems_footer.html.in, rtems_header.html.in: Removed.
2011-12-06 15:12:48 +00:00
Joel Sherrill
b4f5d4dc21 2011-12-05 Joel Sherrill <joel.sherrilL@OARcorp.com>
* ada_user/version.texi, bsp_howto/version.texi,
	cpu_supplement/version.texi, develenv/version.texi,
	filesystem/version.texi, networking/version.texi,
	porting/version.texi, posix1003.1/version.texi,
	posix_users/version.texi, shell/version.texi, started/version.texi,
	user/version.texi: Update to match when files in directory where last
	touched.
2011-12-05 21:34:18 +00:00
Joel Sherrill
bd0ebc3a6a 2011-03-04 Joel Sherrill <joel.sherrill@oarcorp.com>
PR 1752/doc
	* cpu_supplement/.cvsignore, cpu_supplement/Makefile.am,
	cpu_supplement/cpu_supplement.texi: Remove TI C4x CPU Supplement
	chapter.
	* cpu_supplement/tic4x.t: Removed.
2011-03-04 18:47:52 +00:00
Joel Sherrill
df6311707e 2010-12-14 Joel Sherrill <joel.sherrill@oarcorp.com>
* Makefile.am, configure.ac, common/cpright.texi, common/rtems.texi.in,
	cpu_supplement/.cvsignore, started/Makefile.am, started/binaries.t,
	started/buildc.t, started/buildrt.t, started/intro.t,
	started/nextstep.t, started/nt.t, started/require.t,
	started/sample.t, started/started.texi, started/version.texi: Major
	update which includes removal of references to specific tool versions
	and patches.
	* started/tversions.texi.in: Removed.
2010-12-14 16:51:17 +00:00
Joel Sherrill
d3d9908fec 2010-06-15 Gedare Bloom <giddyup44@yahoo.com>
PR 1565/cpukit
	* cpu_supplement/Makefile.am, cpu_supplement/cpu_supplement.texi: Merge
	SPARC64 port.
	* cpu_supplement/sparc64.t: New file.
2010-06-15 22:48:08 +00:00
Ralf Corsepius
f8a86a4089 2010-06-11 Ralf Corsépius <ralf.corsepius@rtems.org>
* cpu_supplement/Makefile.am: Include main.am.
2010-06-11 10:54:25 +00:00
Ralf Corsepius
485b1526f8 New. 2010-06-11 07:45:46 +00:00
Ralf Corsepius
e630235973 Remove EDITION (Unused) 2010-06-11 07:40:00 +00:00
Joel Sherrill
eebcc5be64 2009-09-14 Sebastian Huber <sebastian.huber@embedded-brains.de>
* cpu_supplement/arm.t: Update.
	* cpu_supplement/preface.texi: Typo.
	* cpu_supplement/general.t: Expanded abbreviation.
2009-09-14 14:50:39 +00:00
Joel Sherrill
967eceb2b3 2009-04-19 Joel Sherrill <joel.sherrill@oarcorp.com>
* cpu_supplement/.cvsignore, cpu_supplement/Makefile.am,
	cpu_supplement/cpu_supplement.texi: Add shell for Atmel AVR chapter.
	* cpu_supplement/avr.t: New file.
2009-04-19 15:49:20 +00:00
Joel Sherrill
276abbf6c6 2008-12-04 Jukka Pietarinen <jukka.pietarinen@mrf.fi>
* cpu_supplement/.cvsignore, cpu_supplement/Makefile.am,
	cpu_supplement/cpu_supplement.texi: Add Lattice Mico32 support.
	* cpu_supplement/lm32.t: New file.
2008-12-04 22:54:32 +00:00
Joel Sherrill
42cf7c7c41 2008-06-02 Joel Sherrill <joel.sherrill@oarcorp.com>
* cpu_supplement/.cvsignore, cpu_supplement/Makefile.am,
	cpu_supplement/arm.t, cpu_supplement/bfin.t,
	cpu_supplement/cpu_supplement.texi, cpu_supplement/i386.t,
	cpu_supplement/m68k.t, cpu_supplement/mips.t,
	cpu_supplement/powerpc.t, cpu_supplement/preface.texi,
	cpu_supplement/sh.t: Remove duplicated text from each CPU specific
	chapter. This text was necessary when each CPU was a separate manual
	but now only needs to be one place and that is in an introductory
	chapter.
	* cpu_supplement/general.t: New file.
2008-06-02 16:09:56 +00:00
Joel Sherrill
66c50e281a 2007-12-04 Joel Sherrill <joel.sherrill@OARcorp.com>
* cpu_supplement/arm.t, cpu_supplement/i386.t, cpu_supplement/m68k.t,
	cpu_supplement/mips.t, cpu_supplement/powerpc.t, cpu_supplement/sh.t,
	cpu_supplement/sparc.t, cpu_supplement/tic4x.t, porting/cpuinit.t,
	user/conf.t, user/init.t: Move interrupt_stack_size field from CPU
	Table to Configuration Table. Eliminate CPU Table from all ports.
	Delete references to CPU Table in all forms.
2007-12-04 22:18:30 +00:00
Joel Sherrill
3e06654040 2007-12-03 Joel Sherrill <joel.sherrill@OARcorp.com>
* cpu_supplement/arm.t, cpu_supplement/i386.t, cpu_supplement/m68k.t,
	cpu_supplement/mips.t, cpu_supplement/powerpc.t, cpu_supplement/sh.t,
	cpu_supplement/sparc.t, cpu_supplement/tic4x.t, user/conf.t: Moved
	most of the remaining CPU Table fields to the Configuration Table.
	This included pretasking_hook, predriver_hook, postdriver_hook,
	idle_task, do_zero_of_workspace, extra_mpci_receive_server_stack,
	stack_allocate_hook, and stack_free_hook. As a side-effect of this
	effort some multiprocessing code was made conditional and some style
	clean up occurred.
2007-12-03 22:23:02 +00:00
Joel Sherrill
f09b997d4d 2007-11-28 Joel Sherrill <joel.sherrill@OARcorp.com>
* cpu_supplement/powerpc.t: Eliminate PowerPC specific elements from
	the CPU Table. They have been replaced with variables named bsp_XXX
	as needed.
2007-11-28 21:46:05 +00:00
Joel Sherrill
7d20851af3 2007-11-26 Joel Sherrill <joel.sherrill@oarcorp.com>
* cpu_supplement/sh.t: Eliminate the clicks_per_microsecond field in
	the SuperH CPU Table and define another mechanism for drivers to
	obtain this information.
2007-11-26 23:01:25 +00:00
Joel Sherrill
4f6acf4139 2007-11-26 Joel Sherrill <joel.sherrill@oarcorp.com>
* cpu_supplement/i386.t, cpu_supplement/m68k.t: Pick up changes missed
	earlier.
2007-11-26 23:00:20 +00:00
Joel Sherrill
219aed6811 2007-11-26 Joel Sherrill <joel.sherrill@oarcorp.com>
* cpu_supplement/mips.t: Eliminate the clicks_per_microsecond field in
	the MIPS CPU Table and define another mechanism for drivers to obtain
	this information.
2007-11-26 22:36:41 +00:00
Joel Sherrill
5e35d353dc 2007-11-26 Joel Sherrill <joel.sherrill@oarcorp.com>
* cpu_supplement/i386.t: Eliminate the interrupt_table_segment and
	interrupt_table_offset fields in the i386 CPU Table since they are
	never read.
2007-11-26 22:06:42 +00:00
Joel Sherrill
bab02abc5e 2007-11-26 Joel Sherrill <joel.sherrill@oarcorp.com>
* cpu_supplement/m68k.t: Eliminate the interrupt_vector_table field in
	the m68k CPU Table since it is never read.
2007-11-26 21:26:39 +00:00
Joel Sherrill
782e3e8b96 2007-06-21 Joel Sherrill <joel.sherrill@OARcorp.com>
* ada_user/ada_user.texi, bsp_howto/bsp_howto.texi,
	cpu_supplement/cpu_supplement.texi, develenv/develenv.texi,
	filesystem/filesystem.texi, itron3.0/itron.texi,
	networking/networking.texi, porting/porting.texi,
	posix1003.1/posix1003_1.texi, posix_users/posix_users.texi,
	rgdb_specs/rgdb_specs.texi, rtems_gdb/rtems_gdb.texi,
	started/started.texi, started_ada/started_ada.texi, user/c_user.texi:
	Print table of contents in front of manual where it should be when
	you print.
2007-06-21 18:53:00 +00:00
Joel Sherrill
d8f7868689 2006-10-26 Joel Sherrill <joel@OARcorp.com>
* ada_user/.cvsignore, bsp_howto/.cvsignore, cpu_supplement/.cvsignore,
	develenv/.cvsignore, filesystem/.cvsignore, itron3.0/.cvsignore,
	networking/.cvsignore, new_chapters/.cvsignore, porting/.cvsignore,
	posix1003.1/.cvsignore, relnotes/.cvsignore: Add missing files.
2006-10-26 18:36:40 +00:00
Joel Sherrill
ffae7bd65f 2006-10-23 Joel Sherrill <joel@OARcorp.com>
* ada_user/Makefile.am, ada_user/ada_user.texi,
	cpu_supplement/Makefile.am, cpu_supplement/cpu_supplement.texi,
	cpu_supplement/sparc.t: Add Blackfin CPU supplement chapter and get
	everything building from previous breakages.
	* cpu_supplement/bfin.t: New file.
2006-10-23 19:14:08 +00:00
Joel Sherrill
36af34f9a9 2006-08-29 Joel Sherrill <joel@OARcorp.com>
* cpu_supplement/cpu_supplement.texi: New file.
2006-08-29 13:17:04 +00:00