PR 845/bsps
* startup/bspstart.c, start/start.S: setup BATs prior to attempting any
device access - missing BAT mappings were probably the reason for the
MMU malfunction assumption. Enabled MSR_DR.
PR 837/bsps
make sure exceptions_in_RAM flag is set prior to initializing exception
handling. Keep MCP disabled for memory probes :-( (the raven would
otherwise fault on PCI config space access to empty slots).
PR832/bsps
* startup/ldsegs.S: move CPU segment descriptor tables from .text to
.data; the CPU modifies the descriptor tables and this could be a
problem: a) if text segment is ever write-protected b) rtems-gdb-stub
checksums the text segment against the file gdb is using. A checksum
mismatch results because of the CPU touching the accessed bit...
PR 833/bsps
* irq/irq_asm.S: Currently, all (new exception) BSPs explicitely enable
the FPU across the user ISR but DONT save/restore the FPU context.
Any use of the FPU fron the user handler (e.g., due to GCC
optimizations) result in corruption. The fix results in an exception
in such cases (user ISR must explicitely save/enable/restore FPU).
Edvin Catovic <edvin@gaisler.com>
Konrad Eisele <konrad@gaisler.com>
PR 827/bsps
* network/Makefile.am, network/open_eth.c, network/open_eth.h: Portion
of large update of SPARC BSPs. Includes addition of sis, leon2 and
leon3 BSPs, deletion of leon BSP, addition of SMC91111 NIC driver and
much more.
* network/README.smc91111, network/smc91111.c, network/smc91111.h,
network/smc91111config.h, network/smc91111exp.h: New files.
Edvin Catovic <edvin@gaisler.com>
Konrad Eisele <konrad@gaisler.com>
PR 827/bsps
* ChangeLog, configure.ac, console/Makefile.am, console/console.c,
console/debugputs.c, startup/Makefile.am, startup/linkcmds,
tools/Makefile.am: Portion of large update of SPARC BSPs. Includes
addition of sis, leon2 and leon3 BSPs, deletion of leon BSP, addition
of SMC91111 NIC driver and much more.
Edvin Catovic <edvin@gaisler.com>
Konrad Eisele <konrad@gaisler.com>
PR 827/bsps
* Makefile.am, bspstart.c, gnatcommon.c, start.S: Portion of large
update of SPARC BSPs. Includes addition of sis, leon2 and leon3 BSPs,
deletion of leon BSP, addition of SMC91111 NIC driver and much more.
* timer/timer.c: Enhance to use either interupt-based timer
functions on older CPUs or to use TSC-based timer functions on
more recent (Pentium and above) CPUs. The decision is made in
Timer_initialize function when it is called for the first time
based on a result obtained from cpuid instruction during the BSP
initialization phase. During the first call, there are also late
bindings to the implementation functions initialized to
appropriate values.
PR 527/bsps
PR 822/bsps
* mpc8xx/clock/clock.c: Currently the MBX8xx BSP does not boot,
because some logical errors are in the startup code. Additionally,
the mpc8xx shared clock driver does not support the clocking scheme
of some of the board variants, which are clocked from a
32768Hz (!) external crystal.
PR 822/bsps
* console/console.c, startup/bspstart.c, startup/imbx8xx.c,
startup/mmutlbtab.c, startup/start.S, vectors/vectors_init.c:
Currently the MBX8xx BSP does not boot, because some logical errors
are in the startup code. Additionally, the mpc8xx shared clock driver
does not support the clocking scheme of some of the board variants,
which are clocked from a 32768Hz (!) external crystal.
PR 577/bsps
* console.c: The console_close() method currently calls StopRemoteTx()
on all invocations. It should should be ok for last close only but
not for any others. If you open a port multiple times, you only want
to call StopRemoteTx() only as part of the last close.
PR 816/bsps
* mpc8xx/include/mpc8xx.h: The struct which describes SCC Ethernet mode
parameters (m8xxSCCENparms_t) does not match the hardware: members
taddr_h and taddr_l are transposed. When loading new multicast group
addresses into the hash table, the wrong hash bit is set.
* startup/bspstart.c: Removed mpc824x conditionals around call to
L1_caches_enables, conditionals are now in mmuAsm.S.
* vme/VMEConfig.h: Set up VME A16, A24 and A32 windows at different
locations for mvme2100.
* vme/vmeconfig.c: Fixed spelling.
PR 581/bsps
* mpc6xx/exceptions/raw_exception.c, shared/include/cpuIdent.h:
Converting PSIM to new exception model required addition of PSIM CPU
model.
Cherrypick from master 2004-11-22 22:13:35 UTC Jennifer Averett <Jennifer.Averett@OARcorp.com> '2004-11-22 Jennifer Averett <jennifer@OARcorp.com>':
c/src/lib/libbsp/powerpc/psim/irq/irq.c
c/src/lib/libbsp/powerpc/psim/irq/irq.h
c/src/lib/libbsp/powerpc/psim/irq/irq_asm.S
c/src/lib/libbsp/powerpc/psim/irq/irq_init.c
* vmeUniverse/vmeUniverse.c: Use PCI_MEM_BASE_ADJUSTMENT because some
boards -- notably the MVME2100 -- return the physical address, not an
offset in PCI memory space.
* configure.ac, mpc6xx/exceptions/raw_exception.c,
mpc6xx/exceptions/raw_exception.h, mpc6xx/mmu/bat.c,
mpc6xx/mmu/bat.h, mpc6xx/mmu/mmuAsm.S, shared/include/cpuIdent.c,
shared/include/cpuIdent.h: Add MPC8240 and MPC8245 support. There was
also a significant amount of spelling and whitespace cleanup.
