* Makefile.am: Install iregdefs.h and idtcpu.h to
$(includedir)/rtems/mips.
* cpu_asm.S: Include <rtems/mips/iregdef.h> instead of <iregdef.h>.
* rtems/score/mips.h, cpu_asm.S: Include <rtems/mips/idtcpu.h>
instead of <idtcpu.h>.
* Per PR94, all rtems/score/CPUtypes.h are named rtems/score/types.h.
* rtems/score/mipstypes.h: Removed.
* rtems/score/types.h: New file via CVS magic.
* Makefile.am, rtems/score/cpu.h: Account for name change.
* cpu_asm.h: Removed.
* Makefile.am: Remove cpu_asm.h.
* rtems/score/mips64orion.h: Renamed mips.h.
* rtems/score/mips.h: New file, formerly mips64orion.h.
Header rewritten.
(mips_get_sr, mips_set_sr, mips_enable_in_interrupt_mask,
mips_disable_in_interrupt_mask): New macros.
* rtems/score/Makefile.am: Reflect renaming mips64orion.h.
* asm.h: Include <mips.h> not <mips64orion.h>. Now includes the
few defines that were in <cpu_asm.h>.
* cpu.c (_CPU_ISR_Get_level): Added MIPS ISA I version of this routine.
MIPS ISA 3 is still in assembly for now.
(_CPU_Thread_Idle_body): Rewrote in C.
* cpu_asm.S: Rewrote file header.
(FRAME,ENDFRAME) now in asm.h.
(_CPU_ISR_Get_level): Removed ISA I version and rewrote in C.
(_CPU_ISR_Set_level): Removed ISA I version and rewrote in C.
(_CPU_Context_switch): MIPS ISA I now manages preserves SR_IEC and
leaves other bits in SR alone on task switch.
(mips_enable_interrupts,mips_disable_interrupts,
mips_enable_global_interrupts,mips_disable_global_interrupts,
disable_int, enable_int): Removed.
(mips_get_sr): Rewritten as C macro.
(_CPU_Thread_Idle_body): Rewritten in C.
(init_exc_vecs): Rewritten in C as mips_install_isr_entries() and
placed in libcpu.
(exc_tlb_code, exc_xtlb_code, exc_cache_code, exc_norm_code): Moved
to libcpu/mips/shared/interrupts.
(general): Cleaned up comment blocks and #if 0 areas.
* idtcpu.h: Made ifdef report an error.
* iregdef.h: Removed warning.
* rtems/score/cpu.h (CPU_INTERRUPT_NUMBER_OF_VECTORS): Now a variable
number defined by libcpu.
(_CPU_ISR_Disable, _CPU_ISR_Enable): Rewritten to use new routines
to access SR.
(_CPU_ISR_Set_level): Rewritten as macro for ISA I.
(_CPU_Context_Initialize): Honor ISR level in task initialization.
(_CPU_Fatal_halt): Use new _CPU_ISR_Disable() macro.
Joel Sherrill <joel@OARcorp.com>
* This is a major reworking of the mips64orion port to use
gcc predefines as much as possible and a big push to multilib
the mips port. The mips64orion port was copied/renamed to mips
to be more like other GNU tools. Alan did most of the technical
work of determining how to map old macro names used by the mips64orion
port to standard compiler macro definitions. Joel did the merge
with CVS magic to keep individual file history and did the BSP
modifications. Details follow:
* Makefile.am: idtmon.h in mips64orion port not present.
* asm.h: MIPS64ORION replaced with MIPS. Frame setup macros added.
* cpu.c: Comments added.
* cpu_asm.S: Conditionals changed. MIPS ISA level 1 support added.
First attempt at exception/interrupt processing for ISA level 1
and minus any use of IDT/MON added.
* idtcpu.h: Conditionals changed to use gcc predefines.
* iregdef.h: Ditto.
* cpu_asm.h: No real change. Merger required commit.
* rtems/Makefile.am: Ditto.
* rtems/score/Makefile.am: Ditto.
* rtems/score/cpu.h: Change MIPS64ORION to MIPS.
* rtems/score/mips64orion.h: Change MIPS64ORION to MIPS. Convert
from using RTEMS_CPU_MODEL to gcc predefines to figre things out.
Ralf Corsepius <corsepiu@faw.uni-ulm.de> that contain:
* Modifications, (minor) corrections, cleanups to most existing
Makefile.ams
* Adds automake support to all remaining BSPs which have not yet been
converted to automake.
* Makefile.am for all remaining wrapup/Makefile.ams
<corsepiu@faw.uni-ulm.de> which implements automake support for some
score/cpu/<RTEMS_CPU> subdirectories and fixes a few minor configuration
bugs.
To apply:
rm -rf c/src/exec/score/cpu/a29k/wrap
rm -rf c/src/exec/score/cpu/hppa1.1/wrap
rm -rf c/src/exec/score/cpu/i386/wrap
rm -rf c/src/exec/score/cpu/mips64orion/wrap
rm -rf c/src/exec/score/cpu/no_cpu/wrap
patch -p1 < rtems-rc-19991123-rc-2.diff.gz
Notes:
* I don't see a possiblity to convert the powerpc subdirectory in its
current layout to automake the time being.
* Besides the fact that this subdirectory is not in single-tree building
layout, the actual showstopper is the ifeq $(RTEMS_CPU_MODEL),mpc750)
gmake-conditional in powerpc/Makefile.in, which automake (correctly)
refuses to handle.
* The problem is *not* specific to the powerpc. Other CPUs basically
have similar problems (SH:sh7032 vs sh7045, SPARC: erc32.h in
score/cpu/sparc), but have been lucky to get around real issues (cf.
configuration files below score/cpu/sh/).
* From a configuration focused POV this problem boils down to a
file/subdirectory selection problem:
ppc: 1 or others
sh: 1 out of 2
sparc: 1 out of 1
Automake's means to implement such behavior is using conditionals to be
evaluated at configuration-time. The old configuration scheme however
used make-time conditionals. The SH port was lucky to get around this
issue because it applies a selection from a limited set of possible
selections, the powerpc however applies a selection from an unlimited
set, based on data not being available at configuration time.
* Currently I only see two general solutions:
1) make RTEMS_CPU_MODEL available at configuration time, ie. replace
make-time configuration by configuration-time configuration
2) Perform the selection at build-time, i.e. always install all files,
but use #ifdef #else #endif in source files. This is what the m68k has
exploited at other locations inside of the source-tree.
=> This directory is the last one remaining not using automake below the
whole exec/ hierarchy.
