* irq/irq.c: Removed printk() before the interrupt initialization
because it somehow destroys the interrupt context.
* make/custom/nds.cfg: Enable Thumb interwork.
* startup/bspstart.c: Set default exception handler.
PR 1832/libcpu
* at91rm9200/irq/irq.c: he bsp_interrupt_dispatch routine does not
determine the correct interrupt source number. According to the
datasheet, the reading of the interrupt vector register (AIC_IVR)
notifies the hardware that the OS is taken care of the interrupt.
Only after AIC_IVR have been read can the correct source number be
read from the interrupt status register (AIC_ISR).
PR 1786/bsps
* Makefile.am: Add support for Altivec.
* startup/bspstart.c, Makefile.am: Use shared/startup/zerobss.c instead.
* make/custom/mvme5500.cfg: Change CPU_CFLAGS to
"-mcpu=7450 -mtune=7450 -Dmpc7455"
* irq/BSP_irq.c, pci/detect_host_bridge.c, pci.c, pcifinddevice.c:
Remove warnings.
* vme/VMEConfig.h, include/bsp.h: use VME shared IRQ handlers.
* network/if_100MHz/GT64260eth.c: Recycle the Rx mbuf if there
is any Rx error.
PR 1781/bsps
* console/console-io.c: The UART RX and TX are different ISR
now. So the array containing the registeration changes. The
change is due to change in the libcup uart function.
PR 1781/bsps
* ChangeLog, Makefile.am, README, bsp_specs, configure.ac,
preinstall.am, times, console/console.c, include/bsp.h,
include/cplb.h, include/tm27.h, make/custom/TLL6527M.cfg,
startup/bspstart.c, startup/linkcmds: New files.
Initial port for the TLL6527Mboard that contains blackfin 52X
range of processors. Used eZKit533 as a reference for building
the port.
PR 1781/bsps
* bf52x/include: Added additional MMR.
* bf52x/interrupt: The BF52X processors have a different
System interrupt controller than present in the 53X range of
processors. The 52X have 8 interrupt assignment registers. The
implementation uses tables to increase predictability.
* serial/uart.?: Added DMA based and interrupt based transfer
support. The uart code used a single ISR for TX and RX and tried
to identify and multiplex inside the ISR. In the new code the
type of interrupt is identified by the central ISR dispatcher
bf52x/interrupt or interrupt/. This simplifies the UART ISR.
PR 1768/bsps
* shared/irq/irq_asm.S: The nbench benchmark highlighted the fact that
we do not perform a cld before calling C code in the ISR. This was
historically not a problem but gcc 4.3 changed the behavior. From
http://gcc.gnu.org/gcc-4.3/changes.html
PR 1738/bsps
* clock/clock.c, include/bsp.h, network/network.c: system clock driver
programs the PIT w/o assuming the CPU clock frequency being a power
of two.
PR 1748/bsps
* clock/ckinit.c, include/leon.h: When the clock tick generates an
interrupt WHILE we have interrupts disabled doing a get TOD or
uptime, the get nanoseconds handler was returning a bogusly large
number.
PR 1748/bsps
* clock/ckinit.c: When the clock tick generates an interrupt WHILE we
have interrupts disabled doing a get TOD or uptime, the get
nanoseconds handler was returning a bogusly large number.
PR 1750/bsps
* console/erc32_console.c: The new console driver did not support
polled mode. It also had a bug in which it could lose a transmitter
interrupt.
PR 1738/bsps
* README, startup/bspstart.c, startup/linkcmds: Add support for dynamic
clock speed determination. This algorithm is described in the README
file. The output of the RTEMS Timing Tests was moved to TIMES to
signicantly shrink the README.
* TIMES: New file.
