RTOS/rtems
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Code Pull Requests Activity
26,383 Commits 7 Branches 54 Tags
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Commit Graph

12405 Commits

Author SHA1 Message Date
Joel Sherrill
053abcda22 multiple BSPs: Remove BSP_SMALL_MEMORY 2014-05-06 18:31:00 -05:00
Sebastian Huber
c2ea0ea54d bsp/gen83xx: Add BSP_USB_EHCI_MPC83XX_HAS_ULPI 2014-05-06 14:45:10 +02:00
Chris Johns
1461b648b7 testsuite: Add a per BSP test check for tests not to build. 
Provide a file per BSP to list tests that do not build for a BSP. This change
removes the BSP_SMALL_MEMORY hack from the code. That hack was a
mistake.

Provide configuration files for each BSP with tests that cannot build.
 2014-05-05 10:24:41 +10:00
Ralf Kirchner
b0e83e1207 libchip: Add asserts to dwmac driver 2014-04-30 14:53:17 +02:00
Ralf Kirchner
64bc102fbf libchip: Correct netstats message for dwmac driver 2014-04-30 14:53:17 +02:00
Ralf Kirchner
bc9a71ba6a bsp/altera-cyclone-v: Move mbufs and network clusters to uncached RAM 2014-04-30 14:53:14 +02:00
Ralf Kirchner
ff13e0bd97 bsp/altera-cyclone-v: Increase size of nocache region and nocache heap 
Increase size of nocache heap in order to be able to move mbufs and clusters of the network driver to uncached RAM
 2014-04-30 14:44:47 +02:00
Sebastian Huber
03b7789ec7 score: Statically initialize _ISR_Vector_table 2014-04-29 09:51:22 +02:00
Sebastian Huber
a16af0b367 bsps/mips: Delete unused files 
The MIPS port defines CPU_SIMPLE_VECTORED_INTERRUPTS to FALSE.
 2014-04-29 09:51:22 +02:00
Sebastian Huber
0b344f3451 bsps/m32r: Fix bsp_specs 2014-04-29 09:50:40 +02:00
Sebastian Huber
ef2645409d bsps/bfin: Fix bsp_specs 2014-04-29 09:50:25 +02:00
Sebastian Huber
6741427a3b bsp/h8sim: Fix linker command file 2014-04-29 08:07:16 +02:00
Sebastian Huber
7c0bd74c87 sparc: Add _CPU_Get_current_per_CPU_control() 
Use register g6 for the per-CPU control of the current processor.  The
register g6 is reserved for the operating system by the SPARC ABI.  On
Linux register g6 is used for a similar purpose with the same method
since 1996.

The register g6 must be initialized during system startup and then must
remain unchanged.

Since the per-CPU control is used in all critical sections of the
operating system, this is a performance optimization for the operating
system core procedures.  An additional benefit is that the low-level
context switch and interrupt processing code is now identical on non-SMP
and SMP configurations.
 2014-04-28 09:26:19 +02:00
Sebastian Huber
b2ec2d1597 sparc: Optimize context switch 
The registers g2 through g4 are reserved for applications.  GCC uses
them as volatile registers by default.  So they are treated like
volatile registers in RTEMS as well.
 2014-04-28 09:26:19 +02:00
Joel Sherrill
f412e126d0 mcf52235/configure.ac: Delete junk line 2014-04-24 08:21:00 -05:00
Chris Johns
b74c9cfb76 bootstrap: Sort the contents of the prinstall.am files. 
Sorting removed the variations across different host operating systems
and file systems.
 2014-04-23 14:32:34 +10:00
Joel Sherrill
1450de0d7e shsim: Correct linking for C++ 2014-04-22 15:12:11 -05:00
Joel Sherrill
25c3208aef gensh4: Correct linking for C++ 2014-04-22 15:12:11 -05:00
Joel Sherrill
851e64321b gensh2: Correct linking for C++ 2014-04-22 15:12:11 -05:00
Joel Sherrill
3191b42681 gensh1: Correct linking for C++ 2014-04-22 15:12:11 -05:00
Joel Sherrill
b6a2e57ba9 score603e: Add rtems_crti 2014-04-22 15:12:11 -05:00
Joel Sherrill
77737ad104 ss555: Add rtems_crti/n 2014-04-22 15:12:10 -05:00
Joel Sherrill
812c9d68c3 sim68000/bsp_specs: Add crtbegin/end, crt[in] 2014-04-22 15:12:09 -05:00
Joel Sherrill
2f36f5a500 mpc8260ads: Add rtems_crti/n 2014-04-22 15:12:07 -05:00
Joel Sherrill
8c18adde1a h8sim/bsp_specs: Add crtbegin/end, crt[in] 2014-04-22 09:45:55 -05:00
Joel Sherrill
d47904f3e1 niagara/Makefile.am: Fix rule for start.o 2014-04-22 08:37:03 -05:00
Joel Sherrill
90bc4d03f0 libcpu/sh: Build cache stubs so apps usign cache API link 2014-04-22 08:37:01 -05:00
Joel Sherrill
614fefecf8 dummy_printk_support.c: Comment clean up 2014-04-22 08:37:01 -05:00
Joel Sherrill
a531683ae9 shsim: Add printk() support and move all code to console subdirectory 2014-04-22 08:37:01 -05:00
Sebastian Huber
d60e760e80 bsps: Fix TLS support in linker command files 
The TLS section symbols had wrong values in case of an empty TLS data
section and a nonempty TLS BSS section.
 2014-04-22 09:51:17 +02:00
Sebastian Huber
e2782684f2 bsp/mbx8xx: Fix Makefile.am and bsp_specs 2014-04-22 09:36:48 +02:00
Sebastian Huber
e10574a4c2 bsps/powerpc: Fix linker command files 2014-04-22 08:34:46 +02:00
Ralf Kirchner
d98eea06dc bsp/arm: Cleanup L2 cache handling 2014-04-17 13:25:12 +02:00
Ralf Kirchner
127634c358 bsp/arm: Correct L2 cache enable method 2014-04-17 13:25:12 +02:00
Ralf Kirchner
62fa1ea25e bsp/arm: Add cache size methods 
Add new methods which deliver the cache sizes of for supported cache levels.
 2014-04-17 13:25:12 +02:00
Ralf Kirchner
1c62f74d22 bsp/arm: Add L2 cache locking 
This level 2 cache is a shared data and instruction cache and thus needs locking.
 2014-04-17 13:25:12 +02:00
Ralf Kirchner
bebcfa57a8 bsp/arm: Remove unused cache store methods 2014-04-17 13:25:12 +02:00
Ralf Kirchner
db5a84d0ad bsp/arm: Correct cache misalignment handling 
Correct misalignment handling and prepare for locking.
 2014-04-17 13:25:11 +02:00
Ralf Kirchner
92e2757b0b bsp/arm: Correct L2 cache flushing 
Correct misalignment handling and prepare for locking.
 2014-04-17 13:25:11 +02:00
Ralf Kirchner
cbd9e634ee bsp/arm: Remove arm erratum 764369 from L2 cache 
Arm erratum 764369 only applies to the level 1 cache.
 2014-04-17 13:25:11 +02:00
Ralf Kirchner
9ee2ec56b5 bsp/arm: Consistenly same handling for flushing 
It is importeant to consistently apply the same handling for flushing within
level 2 and level 1 cache handling. In this case now both handling use clean and invalidate.
 2014-04-17 13:25:11 +02:00
Ralf Kirchner
e331e69a47 bsp/arm: RTEMS_SMP to arm erratum 764369 detection 
Move the RTEMS_SMP conditional compilation to the detection method of arm erratum 764369
 2014-04-17 13:25:11 +02:00
Ralf Kirchner
707b617294 bsp/arm: Erratum 764369 after enabling SCU 
Execute the SCU part of the workaround of arm erratum 764368 after the SCU was enabled.
 2014-04-17 13:25:11 +02:00
Ralf Kirchner
d9e7d1e414 bsp/arm: Correct detection of arm erratum 764368 2014-04-17 13:25:10 +02:00
Ralf Kirchner
924b47a548 bsp/arm: Cleanup L1 cache 2014-04-17 13:25:10 +02:00
Ralf Kirchner
a38d4a37bc libchip: Correct error handling in dwmac driver 
By fault an rtems_status_code has been expected instead of an errno error number.
 2014-04-17 13:24:08 +02:00
Ralf Kirchner
1613a01bb0 libchip: Reduce tx interrupts 
Reduce number of packet transmitted interrupts by using the interrupt mechanism only
if we run out of DMA descriptors.
Under normal conditions regaining DMA descriptors, mbufs and clusters is handled
via a counter.
 2014-04-17 13:24:07 +02:00
Ralf Kirchner
f28b8d4595 libchip: Cleanup 2014-04-17 13:24:07 +02:00
Ralf Kirchner
18fe64a2ca libchip: Improve handling of DMA suspends 
Reset the corresponding DMA status bit
 2014-04-17 13:24:07 +02:00
Ralf Kirchner
6ac39691a2 bsp/altera-cyclone-v: Cleanup 2014-04-17 13:24:07 +02:00