PowerPC cores with the SPE (Signal Processing Extension) have 64-bit
general-purpose registers. The SPE context switch code has been merged
with the standard context switch code. The context switch may use cache
operations to increase the performance. It will be ensured that the
context is 32-byte aligned (PPC_DEFAULT_CACHE_LINE_SIZE). This
increases the overall memory size of the context area in the thread
control block slightly. The general-purpose registers GPR2 and GPR13
are no longer part of the context. The BSP must initialize these
registers during startup (usually initialized by the __eabi() function).
The new BSP option BSP_USE_DATA_CACHE_BLOCK_TOUCH can be used to enable
the dcbt instruction in the context switch.
The new BSP option BSP_USE_SYNC_IN_CONTEXT_SWITCH can be used to enable
sync and isync instructions in the context switch. This should be not
necessary in most cases.
These modifications were required by hand after running the script.
In some cases, the file names did not match patterns. In others,
the format of the file did not match any common patterns.
Script does what is expected and tries to do it as
smartly as possible.
+ remove occurrences of two blank comment lines
next to each other after Id string line removed.
+ remove entire comment blocks which only exited to
contain CVS Ids
+ If the processing left a blank line at the top of
a file, it was removed.
Many files had an extra blank line in the license text
found in the file header. This patch removes that line.
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
*
* http://www.rtems.com/license/LICENSE.
The script that did this also turned off execute permission
when it was turned on incorrectly.
This commit covers at least PR2020, 2022, and 2023. This
patch adds all of the code for both BSPs, modifications
to libcpu/powerpc for the ppc440, and some updates to the
BSPs from follow up review and testing.
These BSPs should be good baselines for future development.
The configurations used by Ric are custom and have a non-standard
NIC. They also do not have a UART. Thus the current console
driver just prints to a RAM buffer.
The NIC and UART support are left for future work. When the UART
support is added, moving the existing "to RAM" console driver to
a shared location is likely desirable because boards with no debug
UART port are commonly deployed. This would let printk() go to RAM.
The low level routines can be used in different occasions, it will be
required when accessing PCI.
Note the difference between byteorder.h (inlined functions) and access.S
where the functions will be declared in the library archive librtemscpu.a.
Function names starting with _ are in library and can be referenced by
function pointers.
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
