- Support DDRMC0 region 0 up to 2G in size
- Support DDRMC0 region 1 with DDR memory greater than 2G
up to the DDRMC0 max amount
- Extend the heap with region 1's memory
Closes#4684
The uniprocessor schedulers had some special case logic for the
PRIORITY_PSEUDO_ISR priority. Tasks with a priority of PRIORITY_PSEUDO_ISR
were allowed to preempt a not preemptible task. If other higher priority task
are made ready while a PRIORITY_PSEUDO_ISR task preempts a not preemptible
task, then the other tasks run before the not preemptible task. This made the
RTEMS_NO_PREEMPT mode ineffective.
Remove the PRIORITY_PSEUDO_ISR special case logic. This simplifies the
uniprocessor schedulers. Move the uniprocessor-specific scheduler support to
the new header file <rtems/score/scheduleruniimpl.h>.
Close#2365.
The build option definitions were rearranged such that the option
definitions used in the linker script were not available. This caused
linker errors when building.
Sort the .noinit* input sections by name first, then by alignment if two
sections have the same name. This allows the placement of begin/end symbols to
initialize some areas with a special value.
Update #4678.
Use the existing WRITE_SR() abstraction to access the interrupt group 0 and 1
enable registers. This fixes the build for the AArch32 target.
Add BSP options which define the initial values of CPU Interface registers.
There were two bugs with MMU page use that were partially hiding each
other. The linker script page table section was 4x the size it needed to
be and the page table allocation routine was allocating pages PTRSIZE
times larger than it needed to. On ILP32, this resulted in incorrect but
functional allocation. On LP64, this resulted in allocation failures
earlier than expected.
The compiler wraps fork(), etc. system calls if coverage generation is enabled.
These functions must be provided by the system. For RTEMS, they just return an
error status.
Update #4670.
Allow separate optimization flags for the BSP, cpukit, and tests. For example,
the BSP and cpukit may be built without optimization if coverage
instrumentation is enabled, however, the tests may still use optimization.
Update #4670.
The original file cpukit/libfs/src/ftpfs/tftpDriver.c
is split into two:
tftpfs.c - This file contains the code from tftpDriver.c
related to file system operations such as mount(),
open(), read(), and so on.
tftpDriver.c - In the original file remains only the code related
to networking. This code implements the Trivial
File Transfer Protocol (TFTP).
Moreover, the code is extended to support
* RFC 2347 TFTP Option Extension
* RFC 2348 TFTP Blocksize Option
* RFC 7440 TFTP Windowsize Option
Update #4666.
The patch "bsps/atsam: Fix type of options" missed to adapt some parts
of the yml. With that a custom value works well. But if no value is set,
configure doesn't fall back to the default value but instead just causes
an error. This patch fixes that.
ATSAM_CONSOLE_DEVICE_INDEX and ATSAM_CONSOLE_DEVICE_TYPE have to be
integers like suggested by their description. Otherwise it's not
possible to select (for example) USART2 as console device.
This is the default configuration of the board out of the box.
Any other possible/supported configuration requires soldering,
so definitely not out of the box experience.
Sponsored-By: Precidata
This patch adds stm32h747i-disco-m4 BSP variant and puts it in sync
with the stm32h747i-disco BSP variant hardware support. That means,
only USART 1, 2 and UART 8 are enabled. Also SDRAM 2 is set to 32MB,
SDRAM 1 size is set to 0.
Sponsored-By: Precidata
This patch disables all U(S)ARTs which are not supported by the board
itself and its provided connectors. That means only USART1 and 2
and UART8 are enabled.
Sponsored-By: Precidata
This is minimalist configuration for the stm32h757i-eval-m4 BSP provided
here. The only general enhancement worth mention is a flash origin address
configuration which is needed for simplification as M4 core boots
from second flash bank which starts at 0x8100000 by default. The boot
address of the core may be changed by using STM32CubeProgrammer. If done
so then also BSP configuration needs to be changed accordingly.
As the BSP variant is running on M4 core, there is also more configuration
changes required here. E.g. boot core and ABI (compilation flags)
in comparison with stm32h757i-eval BSP. On the other hand, C code is shared
completely with this BSP variant.
Sponsored-By: Precidata
