cperciva's libmd implementation is 5-30% faster
The same was done for SHA256 previously in r263218
cperciva's implementation was lacking SHA-384 which I implemented, validated against OpenSSL and the NIST documentation
Extend sbin/md5 to create sha384(1)
Chase dependancies on sys/crypto/sha2/sha2.{c,h} and replace them with sha512{c.c,.h}
Reviewed by: cperciva, des, delphij
Approved by: secteam, bapt (mentor)
MFC after: 2 weeks
Sponsored by: ScaleEngine Inc.
Differential Revision: https://reviews.freebsd.org/D3929
The VRSAVE feature of the Altivec unit can be used to reduce the amount of
Altivec registers which need to be saved/restored during interrupt processing
and context switches.
In order to use the VRSAVE optimization a corresponding multilib (-mvrsave) is
required, see GCC configuration. The -mvrsave option must be added to the
ABI_FLAGS of the BSP.
Currently only the -mcpu=e6500 based QorIQ BSP support this optimization.
Update #4712.
Added support for Cobham Gaisler NOEL-V systems. The NOEL-V support
is implemented as a riscv BSP. Both 32-bit and 64-bit processor
systems are supported. Cobham Gaisler's NOEL-V RISC-V processor IP
is described here:
https://www.gaisler.com/NOELV
Compatible with the following NOEL-V FPGA example design ranges
available from Cobham Gaisler. Follow the links for free
bit-streams, DTS/DTB, user's manuals and quick-start guides:
- NOEL-ARTYA7-EX (https://www.gaisler.com/NOEL-ARTYA7)
- NOEL-PF-EX (https://www.gaisler.com/NOEL-PF)
- NOEL-XCKU-EX (https://www.gaisler.com/NOEL-XCKU)
Uses the shared GRLIB APBUART console driver "apbuart_termios.c".
APBUART devices are probed using device tree.
Closes#4225.
Issue an error message if an SMP-specific scheduler is used and
RTEMS_SMP is disabled. This might be a more informative compared to
compiler or linker errors.
The <rtems.h> header file should not unnecessarily include standard C
header files. The <string.h> and <limits.h> header includes were
removed in 2017.
Update #4662.
The ABI flags for the amd64 BSP contain the -Werror=return-type flag. There is no reason for this to be there so it has been removed. The same option has also been removed amd64.cfg file.
- Versal has IO mapped to the upper 64bit address space and
needs full 64bit addresses.
- Add xilinx_versal_aiedge for custom hardware
- Make the hardware settings the defaults and qemu as variants
Closes#4693
Added two pragmas to address, and changed the value of
AARCH64_EXCEPTION_MAKE_ENUM_64_BIT to INT_MAX because the old value was not
in range of an int.
Updates #4662
