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2010-11-12 Sebastian Huber <sebastian.huber@embedded-brains.de>

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* mpc55xx/include/irq.h: Include missing <bspopts.h>.  Format.
	* mpc83xx/include/mpc83xx.h, mpc83xx/i2c/mpc83xx_i2cdrv.h,
	mpc83xx/i2c/mpc83xx_i2cdrv.c: Changes to use this driver for the
	MPC55XX familiy.
This commit is contained in:
Sebastian Huber
2010-11-12 12:43:28 +00:00
parent 0badd50930
commit fe5d5048c6
5 changed files with 166 additions and 129 deletions
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7
c/src/lib/libcpu/powerpc/ChangeLog
View File

@@ -1,3 +1,10 @@
2010-11-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
* mpc55xx/include/irq.h: Include missing <bspopts.h>. Format.
* mpc83xx/include/mpc83xx.h, mpc83xx/i2c/mpc83xx_i2cdrv.h,
mpc83xx/i2c/mpc83xx_i2cdrv.c: Changes to use this driver for the
MPC55XX familiy.
2010-08-15 Joel Sherrill <joel.sherrilL@OARcorp.com>
* mpc55xx/esci/esci.c: Add BSP_poll_char.

164
c/src/lib/libcpu/powerpc/mpc55xx/include/irq.h
View File

@@ -24,6 +24,8 @@
#include <rtems/irq-extension.h>
#include <rtems/irq.h>
#include <bspopts.h>
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
@@ -43,89 +45,86 @@ extern "C" {
/* Software interrupts */
#define MPC55XX_IRQ_SOFTWARE_MIN 0U
#define MPC55XX_IRQ_SOFTWARE_MAX 7U
#define MPC55XX_IRQ_SOFTWARE_GET_INDEX( v) (v)
#define MPC55XX_IRQ_SOFTWARE_GET_REQUEST( i) (i)
#define MPC55XX_IRQ_SOFTWARE_GET_INDEX(v) (v)
#define MPC55XX_IRQ_SOFTWARE_GET_REQUEST(i) (i)
#define MPC55XX_IRQ_SOFTWARE_NUMBER (MPC55XX_IRQ_SOFTWARE_MAX + 1U)
#if ((MPC55XX_CHIP_TYPE >= 5510) && (MPC55XX_CHIP_TYPE <= 5517))
#else /*((MPC55XX_CHIP_TYPE >= 5510) && (MPC55XX_CHIP_TYPE <= 5517))*/
#endif /*((MPC55XX_CHIP_TYPE >= 5510) && (MPC55XX_CHIP_TYPE <= 5517))*/
#if MPC55XX_CHIP_TYPE >= 5510 && MPC55XX_CHIP_TYPE <= 5517
/* eDMA interrupts */
#define MPC55XX_IRQ_EDMA_ERROR_LOW 10U
#define MPC55XX_IRQ_EDMA_REQUEST_LOW_MIN 11U
#define MPC55XX_IRQ_EDMA_REQUEST_LOW_MAX 26U
#if ((MPC55XX_CHIP_TYPE >= 5510) && (MPC55XX_CHIP_TYPE <= 5517))
#define MPC55XX_IRQ_EDMA_GET_CHANNEL(v) \
((v) - MPC55XX_IRQ_EDMA_REQUEST_LOW_MIN)
#define MPC55XX_IRQ_EDMA_GET_REQUEST(c) \
((c) + MPC55XX_IRQ_EDMA_REQUEST_LOW_MIN)
/* eDMA interrupts */
#define MPC55XX_IRQ_EDMA_ERROR_LOW 10U
#define MPC55XX_IRQ_EDMA_REQUEST_LOW_MIN 11U
#define MPC55XX_IRQ_EDMA_REQUEST_LOW_MAX 26U
/* I2C interrupt */
#define MPC55XX_IRQ_I2C 48U
#define MPC55XX_IRQ_EDMA_GET_CHANNEL( v) \
((v) - MPC55XX_IRQ_EDMA_REQUEST_LOW_MIN)
#define MPC55XX_IRQ_EDMA_GET_REQUEST( c) \
((c) + MPC55XX_IRQ_EDMA_REQUEST_LOW_MIN)
/* SIU external interrupts */
#define MPC55XX_IRQ_SIU_EXTERNAL_0 53U
#define MPC55XX_IRQ_SIU_EXTERNAL_1 54U
#define MPC55XX_IRQ_SIU_EXTERNAL_2 55U
#define MPC55XX_IRQ_SIU_EXTERNAL_3 56U
#define MPC55XX_IRQ_SIU_EXTERNAL_4_15 57U
/* SIU external interrupts */
#define MPC55XX_IRQ_SIU_EXTERNAL_0 53U
#define MPC55XX_IRQ_SIU_EXTERNAL_1 54U
#define MPC55XX_IRQ_SIU_EXTERNAL_2 55U
#define MPC55XX_IRQ_SIU_EXTERNAL_3 56U
#define MPC55XX_IRQ_SIU_EXTERNAL_4_15 57U
/* eMIOS interrupts */
#define MPC55XX_IRQ_EMIOS_REQUEST_LOW_MIN 58U
#define MPC55XX_IRQ_EMIOS_REQUEST_LOW_MAX 81U
#define MPC55XX_IRQ_EMIOS_GET_CHANNEL(v) \
((v) - MPC55XX_IRQ_EMIOS_REQUEST_LOW_MIN)
#define MPC55XX_IRQ_EMIOS_GET_REQUEST(c) \
((c) + MPC55XX_IRQ_EMIOS_REQUEST_LOW_MIN)
#elif MPC55XX_CHIP_TYPE >= 5554 && MPC55XX_CHIP_TYPE <= 5567
/* eDMA interrupts */
#define MPC55XX_IRQ_EDMA_ERROR_LOW 10U
#define MPC55XX_IRQ_EDMA_REQUEST_LOW_MIN 11U
#define MPC55XX_IRQ_EDMA_REQUEST_LOW_MAX 42U
/* eMIOS interrupts */
#define MPC55XX_IRQ_EMIOS_REQUEST_LOW_MIN 58U
#define MPC55XX_IRQ_EMIOS_REQUEST_LOW_MAX 81U
#define MPC55XX_IRQ_EMIOS_GET_CHANNEL( v) \
((v) - MPC55XX_IRQ_EMIOS_REQUEST_LOW_MIN)
#define MPC55XX_IRQ_EMIOS_GET_REQUEST( c) \
((c) + MPC55XX_IRQ_EMIOS_REQUEST_LOW_MIN)
#define MPC55XX_IRQ_EDMA_ERROR_HIGH 210U
#define MPC55XX_IRQ_EDMA_REQUEST_HIGH_MIN 211U
#define MPC55XX_IRQ_EDMA_REQUEST_HIGH_MAX 242U
#else /*((MPC55XX_CHIP_TYPE >= 5510) && (MPC55XX_CHIP_TYPE <= 5517))*/
#define MPC55XX_IRQ_EDMA_GET_CHANNEL(v) \
(((v) > MPC55XX_IRQ_EDMA_REQUEST_LOW_MAX) \
? ((v) + 32U - MPC55XX_IRQ_EDMA_REQUEST_HIGH_MIN) \
: ((v) - MPC55XX_IRQ_EDMA_REQUEST_LOW_MIN))
#define MPC55XX_IRQ_EDMA_GET_REQUEST(c) \
(((c) >= 32U) \
? ((c) - 32U + MPC55XX_IRQ_EDMA_REQUEST_HIGH_MIN) \
: ((c) + MPC55XX_IRQ_EDMA_REQUEST_LOW_MIN))
/* eDMA interrupts */
#define MPC55XX_IRQ_EDMA_ERROR_LOW 10U
#define MPC55XX_IRQ_EDMA_REQUEST_LOW_MIN 11U
#define MPC55XX_IRQ_EDMA_REQUEST_LOW_MAX 42U
/* SIU external interrupts */
#define MPC55XX_IRQ_SIU_EXTERNAL_0 46U
#define MPC55XX_IRQ_SIU_EXTERNAL_1 47U
#define MPC55XX_IRQ_SIU_EXTERNAL_2 48U
#define MPC55XX_IRQ_SIU_EXTERNAL_3 49U
#define MPC55XX_IRQ_SIU_EXTERNAL_4_15 50U
#define MPC55XX_IRQ_EDMA_ERROR_HIGH 210U
#define MPC55XX_IRQ_EDMA_REQUEST_HIGH_MIN 211U
#define MPC55XX_IRQ_EDMA_REQUEST_HIGH_MAX 242U
/* eMIOS interrupts */
#define MPC55XX_IRQ_EMIOS_REQUEST_LOW_MIN 51U
#define MPC55XX_IRQ_EMIOS_REQUEST_LOW_MAX 66U
#define MPC55XX_IRQ_EMIOS_REQUEST_HIGH_MIN 202U
#define MPC55XX_IRQ_EMIOS_REQUEST_HIGH_MAX 209U
#define MPC55XX_IRQ_EDMA_GET_CHANNEL( v) \
(((v) > MPC55XX_IRQ_EDMA_REQUEST_LOW_MAX) \
? ((v) + 32U - MPC55XX_IRQ_EDMA_REQUEST_HIGH_MIN) \
: ((v) - MPC55XX_IRQ_EDMA_REQUEST_LOW_MIN))
#define MPC55XX_IRQ_EDMA_GET_REQUEST( c) \
(((c) >= 32U) \
? ((c) - 32U + MPC55XX_IRQ_EDMA_REQUEST_HIGH_MIN) \
: ((c) + MPC55XX_IRQ_EDMA_REQUEST_LOW_MIN))
#define MPC55XX_IRQ_EMIOS_GET_CHANNEL(v) \
(((v) > MPC55XX_IRQ_EMIOS_REQUEST_LOW_MAX) \
? ((v) + 16U - MPC55XX_IRQ_EMIOS_REQUEST_HIGH_MIN) \
: ((v) - MPC55XX_IRQ_EMIOS_REQUEST_LOW_MIN))
/* SIU external interrupts */
#define MPC55XX_IRQ_SIU_EXTERNAL_0 46U
#define MPC55XX_IRQ_SIU_EXTERNAL_1 47U
#define MPC55XX_IRQ_SIU_EXTERNAL_2 48U
#define MPC55XX_IRQ_SIU_EXTERNAL_3 49U
#define MPC55XX_IRQ_SIU_EXTERNAL_4_15 50U
/* eMIOS interrupts */
#define MPC55XX_IRQ_EMIOS_REQUEST_LOW_MIN 51U
#define MPC55XX_IRQ_EMIOS_REQUEST_LOW_MAX 66U
#define MPC55XX_IRQ_EMIOS_REQUEST_HIGH_MIN 202U
#define MPC55XX_IRQ_EMIOS_REQUEST_HIGH_MAX 209U
#define MPC55XX_IRQ_EMIOS_GET_CHANNEL( v) \
(((v) > MPC55XX_IRQ_EMIOS_REQUEST_LOW_MAX) \
? ((v) + 16U - MPC55XX_IRQ_EMIOS_REQUEST_HIGH_MIN) \
: ((v) - MPC55XX_IRQ_EMIOS_REQUEST_LOW_MIN))
#define MPC55XX_IRQ_EMIOS_GET_REQUEST( c) \
(((c) >= 16U) \
? ((c) - 16U + MPC55XX_IRQ_EMIOS_REQUEST_HIGH_MIN) \
: ((c) + MPC55XX_IRQ_EMIOS_REQUEST_LOW_MIN))
#endif /*((MPC55XX_CHIP_TYPE >= 5510) && (MPC55XX_CHIP_TYPE <= 5517))*/
#define MPC55XX_IRQ_EMIOS_GET_REQUEST(c) \
(((c) >= 16U) \
? ((c) - 16U + MPC55XX_IRQ_EMIOS_REQUEST_HIGH_MIN) \
: ((c) + MPC55XX_IRQ_EMIOS_REQUEST_LOW_MIN))
#else
#error "unexpected chip type"
#endif
/* Checks */
#define MPC55XX_IRQ_IS_VALID(v) \
((v) >= MPC55XX_IRQ_MIN && \
((v) >= MPC55XX_IRQ_MIN && \
(v) <= MPC55XX_IRQ_MAX)
#define MPC55XX_IRQ_IS_SOFTWARE(v) \
((v) >= MPC55XX_IRQ_SOFTWARE_MIN && \
@@ -140,24 +139,31 @@ extern "C" {
#define MPC55XX_INTC_DISABLED_PRIORITY 0U
#define MPC55XX_INTC_INVALID_PRIORITY (MPC55XX_INTC_MAX_PRIORITY + 1)
#define MPC55XX_INTC_DEFAULT_PRIORITY (MPC55XX_INTC_MIN_PRIORITY + 1)
#define MPC55XX_INTC_IS_VALID_PRIORITY(p) ((p) >= MPC55XX_INTC_DISABLED_PRIORITY && (p) <= MPC55XX_INTC_MAX_PRIORITY)
#define MPC55XX_INTC_IS_VALID_PRIORITY(p) \
((p) >= MPC55XX_INTC_DISABLED_PRIORITY && (p) <= MPC55XX_INTC_MAX_PRIORITY)
rtems_status_code mpc55xx_interrupt_handler_install(
rtems_vector_number vector,
const char *info,
rtems_option options,
unsigned priority,
rtems_interrupt_handler handler,
void *arg
rtems_vector_number vector,
const char *info,
rtems_option options,
unsigned priority,
rtems_interrupt_handler handler,
void *arg
);
rtems_status_code mpc55xx_intc_get_priority( rtems_vector_number vector, unsigned *priority);
rtems_status_code mpc55xx_intc_get_priority(
rtems_vector_number vector,
unsigned *priority
);
rtems_status_code mpc55xx_intc_set_priority( rtems_vector_number vector, unsigned priority);
rtems_status_code mpc55xx_intc_set_priority(
rtems_vector_number vector,
unsigned priority
);
rtems_status_code mpc55xx_intc_raise_software_irq( rtems_vector_number vector);
rtems_status_code mpc55xx_intc_raise_software_irq(rtems_vector_number vector);
rtems_status_code mpc55xx_intc_clear_software_irq( rtems_vector_number vector);
rtems_status_code mpc55xx_intc_clear_software_irq(rtems_vector_number vector);
/**
* @addtogroup bsp_interrupt

88
c/src/lib/libcpu/powerpc/mpc83xx/i2c/mpc83xx_i2cdrv.c
View File

@@ -19,8 +19,11 @@
#include <stdlib.h>
#include <bsp.h>
#include <bsp/irq.h>
#include <mpc83xx/mpc83xx.h>
#include <mpc83xx/mpc83xx_i2cdrv.h>
#if defined(__GEN83xx_BSP_h)
#include <mpc83xx/mpc83xx_i2cdrv.h>
#elif defined(LIBBSP_POWERPC_MPC55XXEVB_BSP_H)
#include <bsp/mpc83xx_i2cdrv.h>
#endif
#include <rtems/error.h>
#include <rtems/bspIo.h>
#include <errno.h>
@@ -28,6 +31,27 @@
#undef DEBUG
#if defined(__GEN83xx_BSP_h)
#define I2CCR_MEN (1 << 7) /* module enable */
#elif defined(LIBBSP_POWERPC_MPC55XXEVB_BSP_H)
#define I2CCR_MDIS (1 << 7) /* module disable */
#endif
#define I2CCR_MIEN (1 << 6) /* module interrupt enable */
#define I2CCR_MSTA (1 << 5) /* 0->1 generates a start condiiton, 1->0 a stop */
#define I2CCR_MTX (1 << 4) /* 0 = receive mode, 1 = transmit mode */
#define I2CCR_TXAK (1 << 3) /* 0 = send ack 1 = send nak during receive */
#define I2CCR_RSTA (1 << 2) /* 1 = send repeated start condition */
#define I2CCR_BCST (1 << 0) /* 0 = disable 1 = enable broadcast accept */
#define I2CSR_MCF (1 << 7) /* data transfer (0=transfer in progres) */
#define I2CSR_MAAS (1 << 6) /* addessed as slave */
#define I2CSR_MBB (1 << 5) /* bus busy */
#define I2CSR_MAL (1 << 4) /* arbitration lost */
#define I2CSR_BCSTM (1 << 3) /* broadcast match */
#define I2CSR_SRW (1 << 2) /* slave read/write */
#define I2CSR_MIF (1 << 1) /* module interrupt */
#define I2CSR_RXAK (1 << 0) /* receive acknowledge */
/*=========================================================================*\
| Function: |
\*-------------------------------------------------------------------------*/
@@ -54,6 +78,7 @@ static rtems_status_code mpc83xx_i2c_find_clock_divider
int divider;
int fdr_val;
} dividers[] ={
#if defined(__GEN83xx_BSP_h)
{ 256,0x20 }, { 288,0x21 }, { 320,0x22 }, { 352,0x23 },
{ 384,0x00 }, { 416,0x01 }, { 448,0x25 }, { 480,0x02 },
{ 512,0x26 }, { 576,0x03 }, { 640,0x04 }, { 704,0x05 },
@@ -67,6 +92,9 @@ static rtems_status_code mpc83xx_i2c_find_clock_divider
{18432,0x18 }, {20480,0x19 }, {24576,0x1A }, {28672,0x3E },
{30720,0x1B }, {32768,0x3F }, {36864,0x1C }, {40960,0x1D },
{49152,0x1E }, {61440,0x1F }
#elif defined(LIBBSP_POWERPC_MPC55XXEVB_BSP_H)
{ 768, 0x31 }
#endif
};
if (divider <= 0) {
@@ -120,7 +148,7 @@ static int mpc83xx_i2c_wait
/*
* enable interrupt mask
*/
softc_ptr->reg_ptr->i2ccr |= MPC83XX_I2CCR_MIEN;
softc_ptr->reg_ptr->i2ccr |= I2CCR_MIEN;
rc = rtems_semaphore_obtain(softc_ptr->irq_sema_id,RTEMS_WAIT,100);
if (rc != RTEMS_SUCCESSFUL) {
return rc;
@@ -135,9 +163,9 @@ static int mpc83xx_i2c_wait
#endif
return RTEMS_TIMEOUT;
}
} while (!(softc_ptr->reg_ptr->i2csr & MPC83XX_I2CSR_MIF));
} while (!(softc_ptr->reg_ptr->i2csr & I2CSR_MIF));
}
softc_ptr->reg_ptr->i2ccr &= ~MPC83XX_I2CCR_MIEN;
softc_ptr->reg_ptr->i2ccr &= ~I2CCR_MIEN;
act_status = softc_ptr->reg_ptr->i2csr;
if ((act_status & status_mask) != desired_status) {
@@ -175,12 +203,12 @@ static void mpc83xx_i2c_irq_handler
/*
* clear IRQ flag
*/
softc_ptr->reg_ptr->i2csr &= ~MPC83XX_I2CSR_MIF;
softc_ptr->reg_ptr->i2csr &= ~I2CSR_MIF;
/*
* disable interrupt mask
*/
softc_ptr->reg_ptr->i2ccr &= ~MPC83XX_I2CCR_MIEN;
softc_ptr->reg_ptr->i2ccr &= ~I2CCR_MIEN;
if (softc_ptr->initialized) {
rtems_semaphore_release(softc_ptr->irq_sema_id);
}
@@ -344,7 +372,11 @@ static rtems_status_code mpc83xx_i2c_init
/*
* set control register to module enable
*/
softc_ptr->reg_ptr->i2ccr = MPC83XX_I2CCR_MEN;
#if defined(__GEN83xx_BSP_h)
softc_ptr->reg_ptr->i2ccr = I2CCR_MEN;
#elif defined(LIBBSP_POWERPC_MPC55XXEVB_BSP_H)
softc_ptr->reg_ptr->i2ccr = 0;
#endif
/*
* init interrupt stuff
@@ -384,14 +416,14 @@ static rtems_status_code mpc83xx_i2c_send_start
#if defined(DEBUG)
printk("mpc83xx_i2c_send_start called... ");
#endif
if (0 != (softc_ptr->reg_ptr->i2ccr & MPC83XX_I2CCR_MSTA)) {
if (0 != (softc_ptr->reg_ptr->i2ccr & I2CCR_MSTA)) {
/*
* already started, so send a "repeated start"
*/
softc_ptr->reg_ptr->i2ccr |= MPC83XX_I2CCR_RSTA;
softc_ptr->reg_ptr->i2ccr |= I2CCR_RSTA;
}
else {
softc_ptr->reg_ptr->i2ccr |= MPC83XX_I2CCR_MSTA;
softc_ptr->reg_ptr->i2ccr |= I2CCR_MSTA;
}
#if defined(DEBUG)
@@ -423,11 +455,11 @@ static rtems_status_code mpc83xx_i2c_send_stop
#if defined(DEBUG)
printk("mpc83xx_i2c_send_stop called... ");
#endif
softc_ptr->reg_ptr->i2ccr &= ~MPC83XX_I2CCR_MSTA;
softc_ptr->reg_ptr->i2ccr &= ~I2CCR_MSTA;
/*
* wait, 'til stop has been executed
*/
while (0 != (softc_ptr->reg_ptr->i2csr & MPC83XX_I2CSR_MBB)) {
while (0 != (softc_ptr->reg_ptr->i2csr & I2CSR_MBB)) {
rtems_task_wake_after(RTEMS_YIELD_PROCESSOR);
}
#if defined(DEBUG)
@@ -464,7 +496,7 @@ static rtems_status_code mpc83xx_i2c_send_addr
#if defined(DEBUG)
printk("mpc83xx_i2c_send_addr called... ");
#endif
softc_ptr->reg_ptr->i2ccr |= MPC83XX_I2CCR_MTX;
softc_ptr->reg_ptr->i2ccr |= I2CCR_MTX;
/*
* determine, whether short or long address is needed, determine rd/wr
*/
@@ -480,9 +512,7 @@ static rtems_status_code mpc83xx_i2c_send_addr
/*
* wait for successful transfer
*/
rc = mpc83xx_i2c_wait(softc_ptr,
MPC83XX_I2CSR_MCF,
MPC83XX_I2CSR_MCF);
rc = mpc83xx_i2c_wait(softc_ptr, I2CSR_MCF, I2CSR_MCF | I2CSR_RXAK);
if (rc != RTEMS_SUCCESSFUL) {
#if defined(DEBUG)
printk("... exit rc=%d\r\n",rc);
@@ -500,9 +530,7 @@ static rtems_status_code mpc83xx_i2c_send_addr
/*
* wait for successful transfer
*/
rc = mpc83xx_i2c_wait(softc_ptr,
MPC83XX_I2CSR_MCF,
MPC83XX_I2CSR_MCF);
rc = mpc83xx_i2c_wait(softc_ptr, I2CSR_MCF, I2CSR_MCF | I2CSR_RXAK);
#if defined(DEBUG)
printk("... exit rc=%d\r\n",rc);
@@ -538,8 +566,8 @@ static int mpc83xx_i2c_read_bytes
#if defined(DEBUG)
printk("mpc83xx_i2c_read_bytes called... ");
#endif
softc_ptr->reg_ptr->i2ccr &= ~MPC83XX_I2CCR_MTX;
softc_ptr->reg_ptr->i2ccr &= ~MPC83XX_I2CCR_TXAK;
softc_ptr->reg_ptr->i2ccr &= ~I2CCR_MTX;
softc_ptr->reg_ptr->i2ccr &= ~I2CCR_TXAK;
/*
* FIXME: do we need to deactivate TXAK from the start,
* when only one byte is to be received?
@@ -554,14 +582,12 @@ static int mpc83xx_i2c_read_bytes
/*
* last byte is not acknowledged
*/
softc_ptr->reg_ptr->i2ccr |= MPC83XX_I2CCR_TXAK;
softc_ptr->reg_ptr->i2ccr |= I2CCR_TXAK;
}
/*
* wait 'til end of transfer
*/
rc = mpc83xx_i2c_wait(softc_ptr,
MPC83XX_I2CSR_MCF,
MPC83XX_I2CSR_MCF);
rc = mpc83xx_i2c_wait(softc_ptr, I2CSR_MCF, I2CSR_MCF);
if (rc != RTEMS_SUCCESSFUL) {
#if defined(DEBUG)
printk("... exit rc=%d\r\n",-rc);
@@ -575,7 +601,7 @@ static int mpc83xx_i2c_read_bytes
/*
* wait 'til end of last transfer
*/
rc = mpc83xx_i2c_wait(softc_ptr, MPC83XX_I2CSR_MCF, MPC83XX_I2CSR_MCF);
rc = mpc83xx_i2c_wait(softc_ptr, I2CSR_MCF, I2CSR_MCF);
#if defined(DEBUG)
printk("... exit OK, rc=%d\r\n",p-buf);
@@ -612,15 +638,15 @@ static int mpc83xx_i2c_write_bytes
printk("mpc83xx_i2c_write_bytes called... ");
#endif
softc_ptr->reg_ptr->i2ccr =
(softc_ptr->reg_ptr->i2ccr & ~MPC83XX_I2CCR_TXAK) | MPC83XX_I2CCR_MTX;
(softc_ptr->reg_ptr->i2ccr & ~I2CCR_TXAK) | I2CCR_MTX;
while (len-- > 0) {
int rxack = len != 0 ? I2CSR_RXAK : 0;
softc_ptr->reg_ptr->i2cdr = *p++;
/*
* wait 'til end of transfer
*/
rc = mpc83xx_i2c_wait(softc_ptr,
MPC83XX_I2CSR_MCF,
MPC83XX_I2CSR_MCF);
rc = mpc83xx_i2c_wait(softc_ptr, I2CSR_MCF, I2CSR_MCF | rxack);
if (rc != RTEMS_SUCCESSFUL) {
#if defined(DEBUG)
printk("... exit rc=%d\r\n",-rc);

18
c/src/lib/libcpu/powerpc/mpc83xx/i2c/mpc83xx_i2cdrv.h
View File

@@ -19,14 +19,30 @@
#ifndef _MPC83XX_I2CDRV_H
#define _MPC83XX_I2CDRV_H
#include <mpc83xx/mpc83xx.h>
#include <rtems/libi2c.h>
#include <rtems/irq.h>
#include <bsp.h>
#ifdef __GEN83xx_BSP_h
#include <mpc83xx/mpc83xx.h>
#endif
#ifdef __cplusplus
extern "C" {
#endif
#ifdef LIBBSP_POWERPC_MPC55XXEVB_BSP_H
typedef struct {
volatile uint8_t i2cadr;
volatile uint8_t i2cfdr;
volatile uint8_t i2ccr;
volatile uint8_t i2csr;
volatile uint8_t i2cdr;
volatile uint8_t i2cdfsrr;
} m83xxI2CRegisters_t;
#endif
typedef struct mpc83xx_i2c_softc {
m83xxI2CRegisters_t *reg_ptr; /* ptr to HW registers */
int initialized; /* TRUE: module is initialized */

18
c/src/lib/libcpu/powerpc/mpc83xx/include/mpc83xx.h
View File

@@ -295,24 +295,6 @@ typedef struct m83xxI2CRegisters_ {
uint8_t reserved0_3018[0x03100-0x03018]; /* 0x0_3018-30FF Reserved, should be cleared */
} m83xxI2CRegisters_t;
#define MPC83XX_I2CCR_MEN (1 << 7) /* module enable */
#define MPC83XX_I2CCR_MIEN (1 << 6) /* module interrupt enable */
#define MPC83XX_I2CCR_MSTA (1 << 5) /* 0->1 generates a start condiiton, 1->0 a stop */
#define MPC83XX_I2CCR_MTX (1 << 4) /* 0 = receive mode, 1 = transmit mode */
#define MPC83XX_I2CCR_TXAK (1 << 3) /* 0 = send ack 1 = send nak during receive */
#define MPC83XX_I2CCR_RSTA (1 << 2) /* 1 = send repeated start condition */
#define MPC83XX_I2CCR_BCST (1 << 0) /* 0 = disable 1 = enable broadcast accept */
#define MPC83XX_I2CSR_MCF (1 << 7) /* data transfer (0=transfer in progres) */
#define MPC83XX_I2CSR_MAAS (1 << 6) /* addessed as slave */
#define MPC83XX_I2CSR_MBB (1 << 5) /* bus busy */
#define MPC83XX_I2CSR_MAL (1 << 4) /* arbitration lost */
#define MPC83XX_I2CSR_BCSTM (1 << 3) /* broadcast match */
#define MPC83XX_I2CSR_SRW (1 << 2) /* slave read/write */
#define MPC83XX_I2CSR_MIF (1 << 1) /* module interrupt */
#define MPC83XX_I2CSR_RXAK (1 << 0) /* receive acknowledge */
/* DUART */
typedef struct m83xxDUARTRegisters_ {
union {