forked from Imagelibrary/rtems
smp: Add and use _Per_CPU_Get()
Add and use _Per_CPU_Get_by_index() and _Per_CPU_Get_index(). Add _Per_CPU_Send_interrupt(). This avoids direct access of _Per_CPU_Information.
This commit is contained in:
@@ -269,7 +269,7 @@ boot_cpu(imps_processor *proc)
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);
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);
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reset[1] = (uint32_t)secondary_cpu_initialize;
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reset[1] = (uint32_t)secondary_cpu_initialize;
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reset[2] = (uint32_t)_Per_CPU_Information[apicid].interrupt_stack_high;
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reset[2] = (uint32_t)_Per_CPU_Get_by_index(apicid)->interrupt_stack_high;
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/*
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/*
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* Generic CPU startup sequence starts here.
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* Generic CPU startup sequence starts here.
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@@ -87,6 +87,7 @@ static void mmu_config_undo(void)
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static void release_core_1(void)
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static void release_core_1(void)
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{
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{
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const Per_CPU_Control *second_cpu = _Per_CPU_Get_by_index(1);
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uboot_spin_table *spin_table = (uboot_spin_table *) SPIN_TABLE;
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uboot_spin_table *spin_table = (uboot_spin_table *) SPIN_TABLE;
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qoriq_mmu_context mmu_context;
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qoriq_mmu_context mmu_context;
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@@ -96,7 +97,7 @@ static void release_core_1(void)
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qoriq_mmu_write_to_tlb1(&mmu_context, TLB_BEGIN);
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qoriq_mmu_write_to_tlb1(&mmu_context, TLB_BEGIN);
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spin_table->pir = 1;
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spin_table->pir = 1;
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spin_table->r3_lower = (uint32_t) _Per_CPU_Information[1].interrupt_stack_high;
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spin_table->r3_lower = (uint32_t) second_cpu->interrupt_stack_high;
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spin_table->addr_upper = 0;
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spin_table->addr_upper = 0;
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rtems_cache_flush_multiple_data_lines(spin_table, sizeof(*spin_table));
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rtems_cache_flush_multiple_data_lines(spin_table, sizeof(*spin_table));
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ppc_synchronize_data();
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ppc_synchronize_data();
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@@ -108,13 +109,15 @@ static void release_core_1(void)
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void qoriq_secondary_cpu_initialize(void)
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void qoriq_secondary_cpu_initialize(void)
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{
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{
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const Per_CPU_Control *second_cpu = _Per_CPU_Get_by_index(1);
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/* Disable decrementer */
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/* Disable decrementer */
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PPC_CLEAR_SPECIAL_PURPOSE_REGISTER_BITS(BOOKE_TCR, BOOKE_TCR_DIE);
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PPC_CLEAR_SPECIAL_PURPOSE_REGISTER_BITS(BOOKE_TCR, BOOKE_TCR_DIE);
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/* Initialize exception handler */
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/* Initialize exception handler */
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ppc_exc_initialize_with_vector_base(
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ppc_exc_initialize_with_vector_base(
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PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
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PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
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(uintptr_t) _Per_CPU_Information[1].interrupt_stack_low,
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(uintptr_t) second_cpu->interrupt_stack_low,
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rtems_configuration_get_interrupt_stack_size(),
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rtems_configuration_get_interrupt_stack_size(),
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bsp_exc_vector_base
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bsp_exc_vector_base
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);
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);
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@@ -86,12 +86,13 @@ uint32_t bsp_smp_initialize( uint32_t configured_cpu_count )
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return 1;
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return 1;
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for ( cpu=1 ; cpu < found_cpus ; cpu++ ) {
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for ( cpu=1 ; cpu < found_cpus ; cpu++ ) {
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const Per_CPU_Control *per_cpu = _Per_CPU_Get_by_index( cpu );
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#if defined(RTEMS_DEBUG)
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#if defined(RTEMS_DEBUG)
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printk( "Waking CPU %d\n", cpu );
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printk( "Waking CPU %d\n", cpu );
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#endif
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#endif
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bsp_ap_stack = _Per_CPU_Information[cpu].interrupt_stack_high -
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bsp_ap_stack = per_cpu->interrupt_stack_high -
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CPU_MINIMUM_STACK_FRAME_SIZE;
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CPU_MINIMUM_STACK_FRAME_SIZE;
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bsp_ap_entry = leon3_secondary_cpu_initialize;
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bsp_ap_entry = leon3_secondary_cpu_initialize;
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@@ -101,9 +102,8 @@ uint32_t bsp_smp_initialize( uint32_t configured_cpu_count )
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printk(
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printk(
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"CPU %d is %s\n",
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"CPU %d is %s\n",
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cpu,
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cpu,
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_Per_CPU_Information[cpu].state
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per_cpu->state == PER_CPU_STATE_READY_TO_BEGIN_MULTITASKING ?
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== PER_CPU_STATE_READY_TO_BEGIN_MULTITASKING ?
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"online" : "offline"
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"online" : "offline"
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);
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);
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#endif
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#endif
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}
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}
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@@ -47,7 +47,7 @@ void rtems_cpu_usage_reset( void )
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processor_count = rtems_smp_get_processor_count();
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processor_count = rtems_smp_get_processor_count();
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for ( processor = 0 ; processor < processor_count ; ++processor ) {
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for ( processor = 0 ; processor < processor_count ; ++processor ) {
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Per_CPU_Control *per_cpu = &_Per_CPU_Information[ processor ];
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Per_CPU_Control *per_cpu = _Per_CPU_Get_by_index( processor );
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per_cpu->time_of_last_context_switch = CPU_usage_Uptime_at_last_reset;
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per_cpu->time_of_last_context_switch = CPU_usage_Uptime_at_last_reset;
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}
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}
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@@ -233,7 +233,31 @@ typedef struct {
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*/
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*/
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extern Per_CPU_Control _Per_CPU_Information[] CPU_STRUCTURE_ALIGNMENT;
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extern Per_CPU_Control _Per_CPU_Information[] CPU_STRUCTURE_ALIGNMENT;
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#if defined( RTEMS_SMP )
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static inline Per_CPU_Control *_Per_CPU_Get( void )
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{
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return &_Per_CPU_Information[ _SMP_Get_current_processor() ];
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}
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#else
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#define _Per_CPU_Get() ( &_Per_CPU_Information[ 0 ] )
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#endif
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static inline Per_CPU_Control *_Per_CPU_Get_by_index( uint32_t index )
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{
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return &_Per_CPU_Information[ index ];
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}
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static inline uint32_t _Per_CPU_Get_index( const Per_CPU_Control *per_cpu )
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{
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return ( uint32_t ) ( per_cpu - &_Per_CPU_Information[ 0 ] );
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}
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#if defined(RTEMS_SMP)
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#if defined(RTEMS_SMP)
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static inline void _Per_CPU_Send_interrupt( const Per_CPU_Control *per_cpu )
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{
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_CPU_SMP_Send_interrupt( _Per_CPU_Get_index( per_cpu ) );
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}
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/**
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/**
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* @brief Set of Pointers to Per CPU Core Information
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* @brief Set of Pointers to Per CPU Core Information
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*
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*
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@@ -280,19 +304,19 @@ void _Per_CPU_Wait_for_state(
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* Thus when built for non-SMP, there should be no performance penalty.
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* Thus when built for non-SMP, there should be no performance penalty.
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*/
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*/
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#define _Thread_Heir \
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#define _Thread_Heir \
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_Per_CPU_Information[_SMP_Get_current_processor()].heir
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_Per_CPU_Get()->heir
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#define _Thread_Executing \
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#define _Thread_Executing \
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_Per_CPU_Information[_SMP_Get_current_processor()].executing
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_Per_CPU_Get()->executing
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#define _ISR_Nest_level \
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#define _ISR_Nest_level \
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_Per_CPU_Information[_SMP_Get_current_processor()].isr_nest_level
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_Per_CPU_Get()->isr_nest_level
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#define _CPU_Interrupt_stack_low \
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#define _CPU_Interrupt_stack_low \
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_Per_CPU_Information[_SMP_Get_current_processor()].interrupt_stack_low
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_Per_CPU_Get()->interrupt_stack_low
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#define _CPU_Interrupt_stack_high \
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#define _CPU_Interrupt_stack_high \
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_Per_CPU_Information[_SMP_Get_current_processor()].interrupt_stack_high
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_Per_CPU_Get()->interrupt_stack_high
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#define _Thread_Dispatch_necessary \
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#define _Thread_Dispatch_necessary \
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_Per_CPU_Information[_SMP_Get_current_processor()].dispatch_necessary
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_Per_CPU_Get()->dispatch_necessary
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#define _Thread_Time_of_last_context_switch \
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#define _Thread_Time_of_last_context_switch \
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_Per_CPU_Information[_SMP_Get_current_processor()].time_of_last_context_switch
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_Per_CPU_Get()->time_of_last_context_switch
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#endif /* ASM */
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#endif /* ASM */
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@@ -39,10 +39,10 @@
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/*
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/*
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* Initialize per cpu pointer table
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* Initialize per cpu pointer table
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*/
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*/
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_Per_CPU_Information_p[0] = &_Per_CPU_Information[0];
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_Per_CPU_Information_p[0] = _Per_CPU_Get_by_index( 0 );
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for ( cpu = 1 ; cpu < max_cpus; ++cpu ) {
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for ( cpu = 1 ; cpu < max_cpus; ++cpu ) {
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Per_CPU_Control *p = &_Per_CPU_Information[cpu];
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Per_CPU_Control *p = _Per_CPU_Get_by_index( cpu );
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_Per_CPU_Information_p[cpu] = p;
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_Per_CPU_Information_p[cpu] = p;
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@@ -68,8 +68,10 @@
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_SMP_Processor_count = max_cpus;
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_SMP_Processor_count = max_cpus;
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for ( cpu = 1 ; cpu < max_cpus; ++cpu ) {
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for ( cpu = 1 ; cpu < max_cpus; ++cpu ) {
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const Per_CPU_Control *per_cpu = _Per_CPU_Get_by_index( cpu );
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_Per_CPU_Wait_for_state(
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_Per_CPU_Wait_for_state(
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&_Per_CPU_Information[ cpu ],
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per_cpu,
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PER_CPU_STATE_READY_TO_BEGIN_MULTITASKING
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PER_CPU_STATE_READY_TO_BEGIN_MULTITASKING
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);
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);
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}
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}
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@@ -85,8 +85,8 @@ void _Scheduler_default_Tick( void )
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uint32_t processor;
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uint32_t processor;
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for ( processor = 0 ; processor < processor_count ; ++processor ) {
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for ( processor = 0 ; processor < processor_count ; ++processor ) {
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_Scheduler_default_Tick_for_executing(
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const Per_CPU_Control *per_cpu = _Per_CPU_Get_by_index( processor );
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_Per_CPU_Information[ processor ].executing
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);
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_Scheduler_default_Tick_for_executing( per_cpu->executing );
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}
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}
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}
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}
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@@ -30,19 +30,18 @@
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void rtems_smp_secondary_cpu_initialize( void )
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void rtems_smp_secondary_cpu_initialize( void )
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{
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{
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uint32_t self = _SMP_Get_current_processor();
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Per_CPU_Control *self_cpu = _Per_CPU_Get();
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Per_CPU_Control *per_cpu = &_Per_CPU_Information[ self ];
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Thread_Control *heir;
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Thread_Control *heir;
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#if defined(RTEMS_DEBUG)
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#if defined(RTEMS_DEBUG)
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printk( "Made it to %d -- ", self );
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printk( "Made it to %d -- ", _Per_CPU_Get_index( self_cpu ) );
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#endif
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#endif
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_Per_CPU_Change_state( per_cpu, PER_CPU_STATE_READY_TO_BEGIN_MULTITASKING );
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_Per_CPU_Change_state( self_cpu, PER_CPU_STATE_READY_TO_BEGIN_MULTITASKING );
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_Per_CPU_Wait_for_state( per_cpu, PER_CPU_STATE_BEGIN_MULTITASKING );
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_Per_CPU_Wait_for_state( self_cpu, PER_CPU_STATE_BEGIN_MULTITASKING );
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_Per_CPU_Change_state( per_cpu, PER_CPU_STATE_UP );
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_Per_CPU_Change_state( self_cpu, PER_CPU_STATE_UP );
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/*
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/*
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* The Scheduler will have selected the heir thread for each CPU core.
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* The Scheduler will have selected the heir thread for each CPU core.
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@@ -50,11 +49,11 @@ void rtems_smp_secondary_cpu_initialize( void )
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* force a switch to the designated heir and make it executing on
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* force a switch to the designated heir and make it executing on
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* THIS core.
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* THIS core.
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*/
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*/
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heir = per_cpu->heir;
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heir = self_cpu->heir;
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heir->is_executing = true;
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heir->is_executing = true;
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per_cpu->executing->is_executing = false;
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self_cpu->executing->is_executing = false;
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per_cpu->executing = heir;
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self_cpu->executing = heir;
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per_cpu->dispatch_necessary = false;
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self_cpu->dispatch_necessary = false;
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/*
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/*
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* Threads begin execution in the _Thread_Handler() function. This function
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* Threads begin execution in the _Thread_Handler() function. This function
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@@ -67,24 +66,28 @@ void rtems_smp_secondary_cpu_initialize( void )
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void rtems_smp_process_interrupt( void )
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void rtems_smp_process_interrupt( void )
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{
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{
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uint32_t self = _SMP_Get_current_processor();
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Per_CPU_Control *self_cpu = _Per_CPU_Get();
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Per_CPU_Control *per_cpu = &_Per_CPU_Information[ self ];
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if ( per_cpu->message != 0 ) {
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if ( self_cpu->message != 0 ) {
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uint32_t message;
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uint32_t message;
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ISR_Level level;
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ISR_Level level;
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_Per_CPU_Lock_acquire( per_cpu, level );
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_Per_CPU_Lock_acquire( self_cpu, level );
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message = per_cpu->message;
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message = self_cpu->message;
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per_cpu->message = 0;
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self_cpu->message = 0;
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_Per_CPU_Lock_release( per_cpu, level );
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_Per_CPU_Lock_release( self_cpu, level );
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#if defined(RTEMS_DEBUG)
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#if defined(RTEMS_DEBUG)
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{
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{
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void *sp = __builtin_frame_address(0);
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void *sp = __builtin_frame_address(0);
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if ( !(message & RTEMS_BSP_SMP_SHUTDOWN) ) {
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if ( !(message & RTEMS_BSP_SMP_SHUTDOWN) ) {
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printk( "ISR on CPU %d -- (0x%02x) (0x%p)\n", self, message, sp );
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printk(
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"ISR on CPU %d -- (0x%02x) (0x%p)\n",
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_Per_CPU_Get_index( self_cpu ),
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message,
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sp
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);
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if ( message & RTEMS_BSP_SMP_SIGNAL_TO_SELF )
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if ( message & RTEMS_BSP_SMP_SIGNAL_TO_SELF )
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printk( "signal to self\n" );
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printk( "signal to self\n" );
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if ( message & RTEMS_BSP_SMP_SHUTDOWN )
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if ( message & RTEMS_BSP_SMP_SHUTDOWN )
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@@ -99,9 +102,9 @@ void rtems_smp_process_interrupt( void )
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_Thread_Dispatch_set_disable_level( 0 );
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_Thread_Dispatch_set_disable_level( 0 );
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_Per_CPU_Change_state( per_cpu, PER_CPU_STATE_SHUTDOWN );
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_Per_CPU_Change_state( self_cpu, PER_CPU_STATE_SHUTDOWN );
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_CPU_Fatal_halt( self );
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_CPU_Fatal_halt( _Per_CPU_Get_index( self_cpu ) );
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/* does not continue past here */
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/* does not continue past here */
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}
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}
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}
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}
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@@ -109,7 +112,7 @@ void rtems_smp_process_interrupt( void )
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|
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void _SMP_Send_message( uint32_t cpu, uint32_t message )
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void _SMP_Send_message( uint32_t cpu, uint32_t message )
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{
|
{
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Per_CPU_Control *per_cpu = &_Per_CPU_Information[ cpu ];
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Per_CPU_Control *per_cpu = _Per_CPU_Get_by_index( cpu );
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ISR_Level level;
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ISR_Level level;
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#if defined(RTEMS_DEBUG)
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#if defined(RTEMS_DEBUG)
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@@ -132,7 +135,7 @@ void _SMP_Broadcast_message( uint32_t message )
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|
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for ( cpu = 0 ; cpu < ncpus ; ++cpu ) {
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for ( cpu = 0 ; cpu < ncpus ; ++cpu ) {
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if ( cpu != self ) {
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if ( cpu != self ) {
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Per_CPU_Control *per_cpu = &_Per_CPU_Information[ cpu ];
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Per_CPU_Control *per_cpu = _Per_CPU_Get_by_index( cpu );
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ISR_Level level;
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ISR_Level level;
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_Per_CPU_Lock_acquire( per_cpu, level );
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_Per_CPU_Lock_acquire( per_cpu, level );
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@@ -151,7 +154,7 @@ void _SMP_Request_other_cores_to_perform_first_context_switch( void )
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uint32_t cpu;
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uint32_t cpu;
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|
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for ( cpu = 0 ; cpu < ncpus ; ++cpu ) {
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for ( cpu = 0 ; cpu < ncpus ; ++cpu ) {
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Per_CPU_Control *per_cpu = &_Per_CPU_Information[ cpu ];
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Per_CPU_Control *per_cpu = _Per_CPU_Get_by_index( cpu );
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|
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if ( cpu != self ) {
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if ( cpu != self ) {
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_Per_CPU_Change_state( per_cpu, PER_CPU_STATE_BEGIN_MULTITASKING );
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_Per_CPU_Change_state( per_cpu, PER_CPU_STATE_BEGIN_MULTITASKING );
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@@ -194,7 +197,7 @@ void _SMP_Request_other_cores_to_shutdown( void )
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for ( cpu = 0 ; cpu < ncpus ; ++cpu ) {
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for ( cpu = 0 ; cpu < ncpus ; ++cpu ) {
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if ( cpu != self ) {
|
if ( cpu != self ) {
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_Per_CPU_Wait_for_state(
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_Per_CPU_Wait_for_state(
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&_Per_CPU_Information[ cpu ],
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_Per_CPU_Get_by_index( cpu ),
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PER_CPU_STATE_SHUTDOWN
|
PER_CPU_STATE_SHUTDOWN
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);
|
);
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}
|
}
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@@ -73,7 +73,7 @@ void _Thread_Create_idle( void )
|
|||||||
uint32_t processor;
|
uint32_t processor;
|
||||||
|
|
||||||
for ( processor = 0 ; processor < processor_count ; ++processor ) {
|
for ( processor = 0 ; processor < processor_count ; ++processor ) {
|
||||||
Per_CPU_Control *per_cpu = &_Per_CPU_Information[ processor ];
|
Per_CPU_Control *per_cpu = _Per_CPU_Get_by_index( processor );
|
||||||
|
|
||||||
_Thread_Create_idle_for_cpu( per_cpu );
|
_Thread_Create_idle_for_cpu( per_cpu );
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -71,12 +71,12 @@ static bool is_per_cpu_state_ok(void)
|
|||||||
uint32_t i;
|
uint32_t i;
|
||||||
|
|
||||||
for (i = 0; i < n; ++i) {
|
for (i = 0; i < n; ++i) {
|
||||||
const Thread_Control *thread = _Per_CPU_Information[i].executing;
|
const Thread_Control *thread = _Per_CPU_Get_by_index(i)->executing;
|
||||||
uint32_t count = 0;
|
uint32_t count = 0;
|
||||||
uint32_t j;
|
uint32_t j;
|
||||||
|
|
||||||
for (j = 0; j < n; ++j) {
|
for (j = 0; j < n; ++j) {
|
||||||
const Per_CPU_Control *cpu = &_Per_CPU_Information[j];
|
const Per_CPU_Control *cpu = _Per_CPU_Get_by_index(j);
|
||||||
const Thread_Control *executing = cpu->executing;
|
const Thread_Control *executing = cpu->executing;
|
||||||
const Thread_Control *heir = cpu->heir;
|
const Thread_Control *heir = cpu->heir;
|
||||||
|
|
||||||
|
|||||||
Reference in New Issue
Block a user