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2010-04-05 Thomas Znidar <t.znidar@embed-it.com>

Browse Source 
* ChangeLog, Makefile.am, README, bsp_specs, configure.ac, gdb-init,
	preinstall.am, clock/clock.c, console/console.c, console/debugio.c,
	include/bsp.h, include/tm27.h, make/custom/mcf5225x.cfg,
	start/start.S, startup/bspclean.c, startup/bspstart.c,
	startup/init5225x.c, startup/linkcmds, timer/timer.c: New files.
This commit is contained in:
Joel Sherrill
2010-04-05 17:06:57 +00:00
parent fae31effdf
commit fe32208840
19 changed files with 2218 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

11
c/src/lib/libbsp/m68k/mcf5225x/ChangeLog Normal file
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2010-04-05 Thomas Znidar <t.znidar@embed-it.com>
* ChangeLog, Makefile.am, README, bsp_specs, configure.ac, gdb-init,
preinstall.am, clock/clock.c, console/console.c, console/debugio.c,
include/bsp.h, include/tm27.h, make/custom/mcf5225x.cfg,
start/start.S, startup/bspclean.c, startup/bspstart.c,
startup/init5225x.c, startup/linkcmds, timer/timer.c: New files.
Thomas Znidar <t.znidar@embed-it.com>

52
c/src/lib/libbsp/m68k/mcf5225x/Makefile.am Normal file
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##
## $Id$
##
ACLOCAL_AMFLAGS = -I ../../../../aclocal
include $(top_srcdir)/../../../../automake/compile.am
include_bspdir = $(includedir)/bsp
dist_project_lib_DATA = bsp_specs
include_HEADERS = include/bsp.h
include_HEADERS += include/tm27.h
nodist_include_HEADERS = include/bspopts.h
nodist_include_bsp_HEADERS = ../../shared/include/bootcard.h
DISTCLEANFILES = include/bspopts.h
noinst_PROGRAMS =
include_HEADERS += ../../shared/include/coverhd.h
noinst_LIBRARIES = libbspstart.a
libbspstart_a_SOURCES = start/start.S
project_lib_DATA = start.$(OBJEXT)
dist_project_lib_DATA += startup/linkcmds
noinst_LIBRARIES += libbsp.a
libbsp_a_SOURCES = \
../../shared/bspclean.c \
../../shared/bspreset_loop.c \
../../shared/bsppredriverhook.c \
../../shared/bsplibc.c \
../../shared/bsppost.c \
../../shared/bsppretaskinghook.c \
../../shared/bspgetworkarea.c \
startup/init5225x.c startup/bspstart.c \
../../shared/bootcard.c \
../../shared/sbrk.c ../../m68k/shared/setvec.c \
../../shared/gnatinstallhandler.c
libbsp_a_SOURCES += clock/clock.c
libbsp_a_SOURCES += console/console.c
libbsp_a_SOURCES += console/debugio.c
libbsp_a_SOURCES += timer/timer.c
libbsp_a_LIBADD = \
../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
../../../libcpu/@RTEMS_CPU@/shared/misc.rel
include $(srcdir)/preinstall.am
include $(top_srcdir)/../../../../automake/local.am

166
c/src/lib/libbsp/m68k/mcf5225x/README Normal file
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#
# $Id:
#
Description: embed-it dpu
============================================================================
CPU: MCF52259, ??MHz
SRAM: 64K
FLASH: 512K
This is a embed-it board that uses the MCF52258 Coldfire CPU.
This board is running at ??MHz scaled from the internal relocation 8MHz oscillator.
OLD-STUFF from MCF52235 EVB ... we have to change it ...
============================================================================
NOTES:
Currently this BSP must be configured with most RTEMS features turned
off as RAM usage is too high.
Configure as follows:
configure --target=m68k-rtems4.9 --enable-rtemsbsp=mcf52235 \
--disable-networking --disable-posix --disable-itron --disable-cxx \
--disable-tests
To get the tests to compile (but not run) change the linkcmds to specify
a larger sram memory region (256K works). This of course will let you
compile all tests, but many or most of them wont run.
See testsuites/samples/minumum for an example of what type of config flags
you need for this BSP!
In you project before you include confdefs.h, define some or all of the
following:
#define CONFIGURE_DISABLE_CLASSIC_API_NOTEPADS
#define CONFIGURE_DISABLE_CLASSIC_NOTEPADS
#define CONFIGURE_INIT_TASK_STACK_SIZE x
#define CONFIGURE_MINIMUM_TASK_STACK_SIZE x
#define CONFIGURE_INTERRUPT_STACK_SIZE x
Note that the default stack size is 1K
Note that the default number of priorities is 15
============================================================================
TODO:
*) Add drivers for I2C, ADC, FEC
*) Support for LWIP
*) Update the coverhd.h (calling overheads) page 21 of the BSP guide
*) Recover the 1K stack space reserved in linkcmds used for board startup.
============================================================================
Interrupt map
+-----+-----------------------------------------------------------------------+
| | PRIORITY |
+-----+--------+--------+--------+--------+--------+--------+--------+--------+
|LEVEL| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
+-----+--------+--------+--------+--------+--------+--------+--------+--------+
| 7 | | | | | | | | |
+-----+--------+--------+--------+--------+--------+--------+--------+--------+
| 6 | | | | | | | | |
+-----+--------+--------+--------+--------+--------+--------+--------+--------+
| 5 | | | | | | | | |
+-----+--------+--------+--------+--------+--------+--------+--------+--------+
| 4 | | | | | | | | PIT |
+-----+--------+--------+--------+--------+--------+--------+--------+--------+
| 3 | UART 0 | UART 1 | UART 2 | | | | | |
+-----+--------+--------+--------+--------+--------+--------+--------+--------+
| 2 | | | | | | | | |
+-----+--------+--------+--------+--------+--------+--------+--------+--------+
| 1 | | | | | | | | |
+-----+--------+--------+--------+--------+--------+--------+--------+--------+
============================================================================
*** TIME TEST 1 ***
rtems_semaphore_create 8
rtems_semaphore_delete 10
rtems_semaphore_obtain: available 3
rtems_semaphore_obtain: not available -- NO_WAIT 3
rtems_semaphore_release: no waiting tasks 7
*** END OF TEST 1 ***
*** TIME TEST OVERHEAD ***
rtems_shutdown_executive 0
rtems_task_create 0
rtems_task_ident 0
rtems_task_start 0
rtems_task_restart 0
rtems_task_delete 0
rtems_task_suspend 0
rtems_task_resume 0
rtems_task_set_priority 0
rtems_task_mode 0
rtems_task_get_note 0
rtems_task_set_note 0
rtems_task_wake_when 0
rtems_task_wake_after 0
rtems_interrupt_catch 0
rtems_clock_get 0
rtems_clock_set 0
rtems_clock_tick 0
<pause>
rtems_timer_create 0
rtems_timer_delete 0
rtems_timer_ident 0
rtems_timer_fire_after 0
rtems_timer_fire_when 1
rtems_timer_reset 0
rtems_timer_cancel 0
rtems_semaphore_create 0
rtems_semaphore_delete 0
rtems_semaphore_ident 0
rtems_semaphore_obtain 0
rtems_semaphore_release 0
rtems_message_queue_create 0
rtems_message_queue_ident 0
rtems_message_queue_delete 0
rtems_message_queue_send 0
rtems_message_queue_urgent 0
rtems_message_queue_broadcast 0
rtems_message_queue_receive 0
rtems_message_queue_flush 0
<pause>
rtems_event_send 0
rtems_event_receive 0
rtems_signal_catch 0
rtems_signal_send 0
rtems_partition_create 0
rtems_partition_ident 0
rtems_partition_delete 0
rtems_partition_get_buffer 0
rtems_partition_return_buffer 0
rtems_region_create 0
rtems_region_ident 0
rtems_region_delete 0
rtems_region_get_segment 0
rtems_region_return_segment 0
rtems_port_create 0
rtems_port_ident 0
rtems_port_delete 0
rtems_port_external_to_internal 0
rtems_port_internal_to_external 0
<pause>
rtems_io_initialize 0
rtems_io_open 0
rtems_io_close 0
rtems_io_read 0
rtems_io_write 0
rtems_io_control 0
rtems_fatal_error_occurred 0
rtems_rate_monotonic_create 0
rtems_rate_monotonic_ident 0
rtems_rate_monotonic_delete 0
rtems_rate_monotonic_cancel 0
rtems_rate_monotonic_period 0
rtems_multiprocessing_announce 0
*** END OF TIME OVERHEAD ***

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c/src/lib/libbsp/m68k/mcf5225x/bsp_specs Normal file
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%rename endfile old_endfile
%rename startfile old_startfile
%rename link old_link
*startfile:
%{!qrtems: %(old_startfile)} \
%{!nostdlib: %{qrtems: start.o%s crti.o%s crtbegin.o%s -e start}}
*link:
%{!qrtems: %(old_link)} %{qrtems: -dc -dp -N}
*endfile:
%{!qrtems: %(old_endfile)} %{qrtems: crtend.o%s crtn.o%s}

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c/src/lib/libbsp/m68k/mcf5225x/clock/clock.c Normal file
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/*
* Use the last periodic interval timer (PIT2) as the system clock.
*
* $Id$
*/
#include <rtems.h>
#include <bsp.h>
/*
* Use INTC0 base
*/
#define CLOCK_VECTOR (64+56)
static uint32_t s_pcntrAtTick = 0;
static uint32_t s_nanoScale = 0;
/*
* Provide nanosecond extension
* Interrupts are disabled when this is called
*/
static uint32_t bsp_clock_nanoseconds_since_last_tick(void)
{
return MCF_PIT1_PCSR & MCF_PIT_PCSR_PIF ? (s_pcntrAtTick + (MCF_PIT1_PMR - MCF_PIT1_PCNTR)) * s_nanoScale : (s_pcntrAtTick - MCF_PIT1_PCNTR) * s_nanoScale;
}
#define Clock_driver_nanoseconds_since_last_tick bsp_clock_nanoseconds_since_last_tick
/*
* Periodic interval timer interrupt handler
*/
#define Clock_driver_support_at_tick() \
do { \
s_pcntrAtTick = MCF_PIT1_PCNTR; \
MCF_PIT1_PCSR |= MCF_PIT_PCSR_PIF; \
} while (0) \
/*
* Attach clock interrupt handler
*/
#define Clock_driver_support_install_isr( _new, _old ) \
do { \
_old = (rtems_isr_entry)set_vector(_new, CLOCK_VECTOR, 1); \
} while(0)
/*
* Turn off the clock
*/
static void Clock_driver_support_shutdown_hardware(void)
{
MCF_PIT1_PCSR &= ~MCF_PIT_PCSR_EN;
}
/*
* Set up the clock hardware
*
* We need to have 1 interrupt every BSP_Configuration.microseconds_per_tick
*/
static void Clock_driver_support_initialize_hardware(void)
{
int level;
uint32_t pmr;
uint32_t preScaleCode = 0;
uint32_t clk = bsp_get_CPU_clock_speed() >> 1;
uint32_t tps = 1000000 / Configuration.microseconds_per_tick;
while (preScaleCode < 15) {
pmr = (clk >> preScaleCode) / tps;
if (pmr < (1 << 15))
break;
preScaleCode++;
}
s_nanoScale = 1000000000 / (clk >> preScaleCode);
MCF_INTC0_ICR56 = MCF_INTC_ICR_IL(PIT3_IRQ_LEVEL) |
MCF_INTC_ICR_IP(PIT3_IRQ_PRIORITY);
rtems_interrupt_disable(level);
MCF_INTC0_IMRH &= ~MCF_INTC_IMRH_MASK56;
MCF_PIT1_PCSR &= ~MCF_PIT_PCSR_EN;
rtems_interrupt_enable(level);
MCF_PIT1_PCSR = MCF_PIT_PCSR_PRE(preScaleCode) |
MCF_PIT_PCSR_OVW | MCF_PIT_PCSR_PIE | MCF_PIT_PCSR_RLD;
MCF_PIT1_PMR = pmr;
MCF_PIT1_PCSR = MCF_PIT_PCSR_PRE(preScaleCode) |
MCF_PIT_PCSR_PIE | MCF_PIT_PCSR_RLD | MCF_PIT_PCSR_EN;
s_pcntrAtTick = MCF_PIT1_PCNTR;
}
#include "../../../shared/clockdrv_shell.h"

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c/src/lib/libbsp/m68k/mcf5225x/configure.ac Normal file
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## Process this file with autoconf to produce a configure script.
##
## $Id$
AC_PREREQ(2.60)
AC_INIT([rtems-c-src-lib-libbsp-m68k-dpu],[_RTEMS_VERSION],[http://www.rtems.org/bugzilla])
AC_CONFIG_SRCDIR([bsp_specs])
RTEMS_TOP(../../../../../..)
RTEMS_CANONICAL_TARGET_CPU
AM_INIT_AUTOMAKE([no-define nostdinc foreign 1.10])
RTEMS_BSP_CONFIGURE
RTEMS_PROG_CC_FOR_TARGET
RTEMS_CANONICALIZE_TOOLS
RTEMS_PROG_CCAS
RTEMS_BSP_BOOTCARD_HANDLES_RAM_ALLOCATION
RTEMS_BSP_BOOTCARD_OPTIONS
RTEMS_BSP_CLEANUP_OPTIONS(0, 1)
RTEMS_CHECK_NETWORKING
AM_CONDITIONAL(HAS_NETWORKING,test "$HAS_NETWORKING" = "lwip")
# Explicitly list all Makefiles here
AC_CONFIG_FILES([Makefile])
AC_OUTPUT

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c/src/lib/libbsp/m68k/mcf5225x/console/console.c Normal file
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/*
* Multi UART console serial I/O.
*
* TO DO: Add DMA input/output
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*
*
* $Id$
*/
#include <stdio.h>
#include <fcntl.h>
#include <rtems/libio.h>
#include <rtems/termiostypes.h>
#include <termios.h>
#include <bsp.h>
#include <malloc.h>
#include <rtems/mw_uid.h>
#include <rtems/bspIo.h>
#define UART_INTC0_IRQ_VECTOR(x) (64+13+(x))
#define MCF_UART_USR_ERROR ( MCF_UART_USR_RB | \
MCF_UART_USR_FE | \
MCF_UART_USR_PE | \
MCF_UART_USR_OE )
static int IntUartPollWrite(int minor, const char *buf, int len);
static int IntUartInterruptWrite(int minor, const char *buf, int len);
#define MAX_UART_INFO 3
#define RX_BUFFER_SIZE 512
struct IntUartInfoStruct
{
int iomode;
volatile int uimr;
int baud;
int databits;
int parity;
int stopbits;
int hwflow;
int rx_in;
int rx_out;
char rx_buffer[RX_BUFFER_SIZE];
void *ttyp;
};
struct IntUartInfoStruct IntUartInfo[MAX_UART_INFO];
/***************************************************************************
Function : IntUartSet
Description : This updates the hardware UART settings.
***************************************************************************/
static void
IntUartSet(int minor, int baud, int databits, int parity, int stopbits,
int hwflow)
{
int divisor;
uint32_t clock_speed;
uint8_t umr1 = 0;
uint8_t umr2 = 0;
struct IntUartInfoStruct *info = &IntUartInfo[minor];
rtems_interrupt_level level=UART0_IRQ_LEVEL;
rtems_interrupt_disable(level);
/* disable interrupts, clear RTS line, and disable the UARTS */
MCF_UART_UIMR(minor) = 0;
MCF_UART_UOP0(minor) = 1;
MCF_UART_UCR(minor) = (MCF_UART_UCR_TX_DISABLED | MCF_UART_UCR_RX_DISABLED);
/* save the current values */
info->uimr = 0;
info->baud = baud;
info->databits = databits;
info->parity = parity;
info->stopbits = stopbits;
info->hwflow = hwflow;
clock_speed = bsp_get_CPU_clock_speed();
/* determine the baud divisor value */
divisor = ((clock_speed) / (32 * baud));
if (divisor < 2)
divisor = 2;
/* check to see if doing hardware flow control */
if (hwflow) {
/* set hardware flow options */
umr1 |= MCF_UART_UMR_RXRTS;
umr2 |= MCF_UART_UMR_TXCTS;
}
/* determine the new umr values */
umr1 |= (parity | databits);
#if 1 /* TZN: maybe needed for santec bus modul handling */
if (minor==STATIONS_PORT)
umr2 |= (stopbits) | 0x20; /* 0x20 ... set TXRTS just4testing */
else
umr2 |= (stopbits);
#else
umr2 |= (stopbits);
#endif
/* reset the uart */
MCF_UART_UCR(minor) = MCF_UART_UCR_RESET_ERROR;
MCF_UART_UCR(minor) = MCF_UART_UCR_RESET_RX;
MCF_UART_UCR(minor) = MCF_UART_UCR_RESET_TX;
/* reset the uart mode register and update values */
MCF_UART_UCR(minor) = MCF_UART_UCR_RESET_MR;
MCF_UART_UMR(minor) = umr1;
MCF_UART_UMR(minor) = umr2;
/* set the baud rate values */
MCF_UART_UCSR(minor) =
(MCF_UART_UCSR_RCS_SYS_CLK | MCF_UART_UCSR_TCS_SYS_CLK);
MCF_UART_UBG1(minor) = (divisor & 0xff00) >> 8;
MCF_UART_UBG2(minor) = (divisor & 0x00ff);
/* enable the uart */
MCF_UART_UCR(minor) = (MCF_UART_UCR_TX_ENABLED | MCF_UART_UCR_RX_ENABLED);
/* check to see if interrupts need to be enabled */
if (info->iomode != TERMIOS_POLLED) {
/* enable rx interrupts */
info->uimr |= MCF_UART_UIMR_RXRDY_FU;
MCF_UART_UIMR(minor) = info->uimr;
}
/* check to see if doing hardware flow control */
if (hwflow) {
/* assert the RTS line */
MCF_UART_UOP1(minor) = 1;
}
if (minor==STATIONS_PORT) //maybe needed for santec handling
MCF_UART_UOP0(minor) = 1;
rtems_interrupt_enable(level);
}
/***************************************************************************
Function : IntUartSetAttributes
Description : This provides the hardware-dependent portion of tcsetattr().
value and sets it. At the moment this just sets the baud rate.
Note: The highest baudrate is 115200 as this stays within
an error of +/- 5% at 25MHz processor clock
***************************************************************************/
static int IntUartSetAttributes(int minor, const struct termios *t)
{
/* set default index values */
int baud = (int) 19200;
int databits = (int) MCF_UART_UMR_BC_8;
int parity = (int) MCF_UART_UMR_PM_NONE;
int stopbits = (int) MCF_UART_UMR_SB_STOP_BITS_1;
int hwflow = (int) 0;
struct IntUartInfoStruct *info = &IntUartInfo[minor];
/* check to see if input is valid */
if (t != (const struct termios *) 0) {
/* determine baud rate index */
baud = rtems_termios_baud_to_number(t->c_cflag & CBAUD);
/* determine data bits */
switch (t->c_cflag & CSIZE) {
case CS5:
databits = (int) MCF_UART_UMR_BC_5;
break;
case CS6:
databits = (int) MCF_UART_UMR_BC_6;
break;
case CS7:
databits = (int) MCF_UART_UMR_BC_7;
break;
case CS8:
databits = (int) MCF_UART_UMR_BC_8;
break;
}
/* determine if parity is enabled */
if (t->c_cflag & PARENB) {
if (t->c_cflag & PARODD) {
/* odd parity */
parity = (int) MCF_UART_UMR_PM_ODD;
} else {
/* even parity */
parity = (int) MCF_UART_UMR_PM_EVEN;
}
}
/* determine stop bits */
if (t->c_cflag & CSTOPB) {
/* two stop bits */
stopbits = (int) MCF_UART_UMR_SB_STOP_BITS_2;
}
/* check to see if hardware flow control */
if (t->c_cflag & CRTSCTS) {
hwflow = 1;
}
}
/* check to see if values have changed */
if ((baud != info->baud) ||
(databits != info->databits) ||
(parity != info->parity) ||
(stopbits != info->stopbits) || (hwflow != info->hwflow)) {
/* call function to set values */
IntUartSet(minor, baud, databits, parity, stopbits, hwflow);
}
return (RTEMS_SUCCESSFUL);
}
/***************************************************************************
Function : IntUartInterruptHandler
Description : This is the interrupt handler for the internal uart. It
determines which channel caused the interrupt before queueing any received
chars and dequeueing chars waiting for transmission.
***************************************************************************/
static rtems_isr IntUartInterruptHandler(rtems_vector_number v)
{
unsigned int chan = v - UART_INTC0_IRQ_VECTOR(0);
struct IntUartInfoStruct *info = &IntUartInfo[chan];
/* check to see if received data */
if (MCF_UART_UISR(chan) & MCF_UART_UISR_RXRDY_FU) {
#if 0 /* TZN ... just4testing */
if (MCF_GPIO_PORTTC&MCF_GPIO_PORTTC_PORTTC0)
MCF_GPIO_PORTTC &= ~MCF_GPIO_PORTTC_PORTTC0;
else
MCF_GPIO_PORTTC |= MCF_GPIO_PORTTC_PORTTC0;
#endif
/* read data and put into the receive buffer */
while (MCF_UART_USR(chan) & MCF_UART_USR_RXRDY) {
if (MCF_UART_USR(chan) & MCF_UART_USR_ERROR) {
/* clear the error */
MCF_UART_UCR(chan) = MCF_UART_UCR_RESET_ERROR;
}
/* put data in rx buffer and check for errors */
info->rx_buffer[info->rx_in] = MCF_UART_URB(chan);
/* update buffer values */
info->rx_in++;
if (info->rx_in >= RX_BUFFER_SIZE) {
info->rx_in = 0;
}
}
/* Make sure the port has been opened */
if (info->ttyp) {
/* check to see if task driven */
if (info->iomode == TERMIOS_TASK_DRIVEN) {
/* notify rx task that rx buffer has data */
rtems_termios_rxirq_occured(info->ttyp);
} else {
/* Push up the received data */
rtems_termios_enqueue_raw_characters(info->ttyp, info->rx_buffer,
info->rx_in);
info->rx_in = 0;
}
}
}
/* check to see if data needs to be transmitted */
if ((info->uimr & MCF_UART_UIMR_TXRDY) &&
(MCF_UART_UISR(chan) & MCF_UART_UISR_TXRDY)) {
/* disable tx interrupts */
info->uimr &= ~MCF_UART_UIMR_TXRDY;
MCF_UART_UIMR(chan) = info->uimr;
/* tell upper level that character has been sent */
if (info->ttyp)
rtems_termios_dequeue_characters(info->ttyp, 1);
}
}
/***************************************************************************
Function : IntUartInitialize
Description : This initialises the internal uart hardware for all
internal uarts. If the internal uart is to be interrupt driven then the
interrupt vectors are hooked.
***************************************************************************/
static void IntUartInitialize(void)
{
unsigned int chan;
struct IntUartInfoStruct *info;
rtems_isr_entry old_handler;
rtems_interrupt_level level=UART0_IRQ_LEVEL;
for (chan = 0; chan < MAX_UART_INFO; chan++) {
info = &IntUartInfo[chan];
info->ttyp = NULL;
info->rx_in = 0;
info->rx_out = 0;
info->baud = -1;
info->databits = -1;
info->parity = -1;
info->stopbits = -1;
info->hwflow = -1;
info->iomode = TERMIOS_IRQ_DRIVEN; /*TZN, irq driven console io */
//info->iomode = TERMIOS_POLLED; /*TZN, just4testint, use polling mode for all UARTS */
MCF_UART_UACR(chan) = 0;
MCF_UART_UIMR(chan) = 0;
if (info->iomode != TERMIOS_POLLED) {
rtems_interrupt_catch(IntUartInterruptHandler,
UART_INTC0_IRQ_VECTOR(chan), &old_handler);
}
/* set uart default values */
IntUartSetAttributes(chan, NULL);
/* unmask interrupt */
rtems_interrupt_disable(level);
switch (chan) {
case 0:
MCF_INTC0_ICR13 = MCF_INTC_ICR_IL(UART0_IRQ_LEVEL) |
MCF_INTC_ICR_IP(UART0_IRQ_PRIORITY);
MCF_INTC0_IMRL &= ~(MCF_INTC_IMRL_MASK13 | MCF_INTC_IMRL_MASKALL);
break;
case 1:
MCF_INTC0_ICR14 = MCF_INTC_ICR_IL(UART1_IRQ_LEVEL) |
MCF_INTC_ICR_IP(UART1_IRQ_PRIORITY);
MCF_INTC0_IMRL &= ~(MCF_INTC_IMRL_MASK14 | MCF_INTC_IMRL_MASKALL);
break;
case 2:
MCF_INTC0_ICR15 = MCF_INTC_ICR_IL(UART2_IRQ_LEVEL) |
MCF_INTC_ICR_IP(UART2_IRQ_PRIORITY);
MCF_INTC0_IMRL &= ~(MCF_INTC_IMRL_MASK15 | MCF_INTC_IMRL_MASKALL);
break;
}
rtems_interrupt_enable(level);
} /* of chan loop */
} /* IntUartInitialise */
/***************************************************************************
Function : IntUartInterruptWrite
Description : This writes a single character to the appropriate uart
channel. This is either called during an interrupt or in the user's task
to initiate a transmit sequence. Calling this routine enables Tx
interrupts.
***************************************************************************/
static int IntUartInterruptWrite(int minor, const char *buf, int len)
{
rtems_interrupt_level level=UART0_IRQ_LEVEL;
rtems_interrupt_disable(level);
/* write out character */
MCF_UART_UTB(minor) = *buf;
/* enable tx interrupt */
IntUartInfo[minor].uimr |= MCF_UART_UIMR_TXRDY;
MCF_UART_UIMR(minor) = IntUartInfo[minor].uimr;
rtems_interrupt_enable(level);
return (0);
}
/***************************************************************************
Function : IntUartInterruptOpen
Description : This enables interrupts when the tty is opened.
***************************************************************************/
static int IntUartInterruptOpen(int major, int minor, void *arg)
{
struct IntUartInfoStruct *info = &IntUartInfo[minor];
/* enable the uart */
MCF_UART_UCR(minor) = (MCF_UART_UCR_TX_ENABLED | MCF_UART_UCR_RX_ENABLED);
/* check to see if interrupts need to be enabled */
if (info->iomode != TERMIOS_POLLED) {
/* enable rx interrupts */
info->uimr |= MCF_UART_UIMR_RXRDY_FU;
MCF_UART_UIMR(minor) = info->uimr;
}
/* check to see if doing hardware flow control */
if (info->hwflow) {
/* assert the RTS line */
MCF_UART_UOP1(minor) = 1;
}
return (0);
}
/***************************************************************************
Function : IntUartInterruptClose
Description : This disables interrupts when the tty is closed.
***************************************************************************/
static int IntUartInterruptClose(int major, int minor, void *arg)
{
struct IntUartInfoStruct *info = &IntUartInfo[minor];
/* disable the interrupts and the uart */
MCF_UART_UIMR(minor) = 0;
MCF_UART_UCR(minor) = (MCF_UART_UCR_TX_DISABLED | MCF_UART_UCR_RX_DISABLED);
/* reset values */
info->ttyp = NULL;
info->uimr = 0;
info->rx_in = 0;
info->rx_out = 0;
return (0);
}
/***************************************************************************
Function : IntUartTaskRead
Description : This reads all available characters from the internal uart
and places them into the termios buffer. The rx interrupts will be
re-enabled after all data has been read.
***************************************************************************/
static int IntUartTaskRead(int minor)
{
char buffer[RX_BUFFER_SIZE];
int count;
int rx_in;
int index = 0;
struct IntUartInfoStruct *info = &IntUartInfo[minor];
/* determine number of values to copy out */
rx_in = info->rx_in;
if (info->rx_out <= rx_in) {
count = rx_in - info->rx_out;
} else {
count = (RX_BUFFER_SIZE - info->rx_out) + rx_in;
}
/* copy data into local buffer from rx buffer */
while ((index < count) && (index < RX_BUFFER_SIZE)) {
/* copy data byte */
buffer[index] = info->rx_buffer[info->rx_out];
index++;
/* increment rx buffer values */
info->rx_out++;
if (info->rx_out >= RX_BUFFER_SIZE) {
info->rx_out = 0;
}
}
/* check to see if buffer is not empty */
if (count > 0) {
/* set characters into termios buffer */
rtems_termios_enqueue_raw_characters(info->ttyp, buffer, count);
}
return (EOF);
}
/***************************************************************************
Function : IntUartPollRead
Description : This reads a character from the internal uart. It returns
to the caller without blocking if not character is waiting.
***************************************************************************/
/*static*/
int IntUartPollRead(int minor)
{
if ((MCF_UART_USR(minor) & MCF_UART_USR_RXRDY) == 0)
return (-1);
return (MCF_UART_URB(minor));
}
/***************************************************************************
Function : IntUartPollWrite
Description : This writes out each character in the buffer to the
appropriate internal uart channel waiting till each one is sucessfully
transmitted.
***************************************************************************/
static int IntUartPollWrite(int minor, const char *buf, int len)
{
/* loop over buffer */
while (len--) {
/* block until we can transmit */
while ((MCF_UART_USR(minor) & MCF_UART_USR_TXRDY) == 0)
continue;
/* transmit data byte */
MCF_UART_UTB(minor) = *buf++;
}
return (0);
}
/***************************************************************************
Function : console_initialize
Description : This initialises termios, both sets of uart hardware before
registering /dev/tty devices for each channel and the system /dev/console.
***************************************************************************/
rtems_device_driver console_initialize(rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg)
{
rtems_status_code status;
/* Set up TERMIOS */
rtems_termios_initialize();
/* set io modes for the different channels and initialize device */
IntUartInitialize();
/* Register the console port */
status = rtems_io_register_name("/dev/console", major, CONSOLE_PORT);
if (status != RTEMS_SUCCESSFUL) {
rtems_fatal_error_occurred(status);
}
/* Register the RS485 port to communicate with SANTEC stations */
if ((STATIONS_PORT!=CONSOLE_PORT) && (STATIONS_PORT!=BLUETOOTH_PORT)) {
status = rtems_io_register_name("/dev/tty00", major,STATIONS_PORT);
if (status != RTEMS_SUCCESSFUL) {
rtems_fatal_error_occurred(status);
}
}
else {
status=RTEMS_TOO_MANY;
rtems_fatal_error_occurred(status);
}
/* Register the Bluetooth port */
if ((BLUETOOTH_PORT!=CONSOLE_PORT) && (BLUETOOTH_PORT!=STATIONS_PORT)) {
status = rtems_io_register_name("/dev/tty01", major, BLUETOOTH_PORT);
if (status != RTEMS_SUCCESSFUL) {
rtems_fatal_error_occurred(status);
}
}
else {
status=RTEMS_TOO_MANY;
rtems_fatal_error_occurred(status);
}
return (RTEMS_SUCCESSFUL);
}
/***************************************************************************
Function : console_open
Description : This actually opens the device depending on the minor
number set during initialisation. The device specific access routines are
passed to termios when the devices is opened depending on whether it is
polled or not.
***************************************************************************/
rtems_device_driver console_open(rtems_device_major_number major,
rtems_device_minor_number minor, void *arg)
{
rtems_status_code status = RTEMS_INVALID_NUMBER;
rtems_libio_open_close_args_t *args = (rtems_libio_open_close_args_t *) arg;
struct IntUartInfoStruct *info;
static const rtems_termios_callbacks IntUartPollCallbacks = {
NULL, /* firstOpen */
NULL, /* lastClose */
IntUartPollRead, /* pollRead */
IntUartPollWrite, /* write */
IntUartSetAttributes, /* setAttributes */
NULL, /* stopRemoteTx */
NULL, /* startRemoteTx */
TERMIOS_POLLED /* mode */
};
static const rtems_termios_callbacks IntUartIntrCallbacks = {
IntUartInterruptOpen, /* firstOpen */
IntUartInterruptClose, /* lastClose */
NULL, /* pollRead */
IntUartInterruptWrite, /* write */
IntUartSetAttributes, /* setAttributes */
NULL, /* stopRemoteTx */
NULL, /* startRemoteTx */
TERMIOS_IRQ_DRIVEN /* mode */
};
static const rtems_termios_callbacks IntUartTaskCallbacks = {
IntUartInterruptOpen, /* firstOpen */
IntUartInterruptClose, /* lastClose */
IntUartTaskRead, /* pollRead */
IntUartInterruptWrite, /* write */
IntUartSetAttributes, /* setAttributes */
NULL, /* stopRemoteTx */
NULL, /* startRemoteTx */
TERMIOS_TASK_DRIVEN /* mode */
};
/* open the port depending on the minor device number */
if ((minor >= 0) && (minor < MAX_UART_INFO)) {
info = &IntUartInfo[minor];
switch (info->iomode) {
case TERMIOS_POLLED:
status = rtems_termios_open(major, minor, arg, &IntUartPollCallbacks);
break;
case TERMIOS_IRQ_DRIVEN:
status = rtems_termios_open(major, minor, arg, &IntUartIntrCallbacks);
info->ttyp = args->iop->data1;
break;
case TERMIOS_TASK_DRIVEN:
status = rtems_termios_open(major, minor, arg, &IntUartTaskCallbacks);
info->ttyp = args->iop->data1;
break;
}
}
if (status == RTEMS_SUCCESSFUL) {
/*
* Reset the default baudrate.
*/
struct termios term;
if (tcgetattr(STDIN_FILENO, &term) >= 0) {
term.c_cflag &= ~(CBAUD | CSIZE);
term.c_cflag |= CS8 | B115200;
tcsetattr(STDIN_FILENO, TCSANOW, &term);
}
}
return (status);
}
/***************************************************************************
Function : console_close
Description : This closes the device via termios
***************************************************************************/
rtems_device_driver console_close(rtems_device_major_number major,
rtems_device_minor_number minor, void *arg)
{
return (rtems_termios_close(arg));
}
/******************
*********************************************************
Function : console_read
Description : Read from the device via termios
***************************************************************************/
rtems_device_driver console_read(rtems_device_major_number major,
rtems_device_minor_number minor, void *arg)
{
return (rtems_termios_read(arg));
}
/***************************************************************************
Function : console_write
Description : Write to the device via termios
***************************************************************************/
rtems_device_driver console_write(rtems_device_major_number major,
rtems_device_minor_number minor, void *arg)
{
return (rtems_termios_write(arg));
}
/***************************************************************************
Function : console_ioctl
Description : Pass the IOCtl call to termios
***************************************************************************/
rtems_device_driver console_control(rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg)
{
return (rtems_termios_ioctl(arg));
}

40
c/src/lib/libbsp/m68k/mcf5225x/console/debugio.c Normal file
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@@ -0,0 +1,40 @@
/*
* Multi UART console serial I/O.
*
* TO DO: Add DMA input/output
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*
* $Id$
*/
#include <stdio.h>
#include <fcntl.h>
#include <rtems/libio.h>
#include <rtems/termiostypes.h>
#include <termios.h>
#include <bsp.h>
#include <malloc.h>
#include <rtems/mw_uid.h>
#include <rtems/bspIo.h>
static void _BSP_null_char(char c)
{
rtems_interrupt_level level=UART0_IRQ_LEVEL;
if (c == '\n')
_BSP_null_char('\r');
rtems_interrupt_disable(level);
while ((MCF_UART_USR(CONSOLE_PORT) & MCF_UART_USR_TXRDY) == 0)
continue;
MCF_UART_UTB(CONSOLE_PORT) = c;
while ((MCF_UART_USR(CONSOLE_PORT) & MCF_UART_USR_TXRDY) == 0)
continue;
rtems_interrupt_enable(level);
}
BSP_output_char_function_type BSP_output_char = _BSP_null_char;

48
c/src/lib/libbsp/m68k/mcf5225x/gdb-init Normal file
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@@ -0,0 +1,48 @@
#
# Show the exception stack frame.
#
define show-exception-sframe
set $frsr = *(unsigned short *)((unsigned long)$sp + 2)
set $frpc = *(unsigned long *)((unsigned long)$sp + 4)
set $frfvo = *(unsigned short *)((unsigned long)$sp + 0)
set $frcode = $frfvo >> 12
set $frvect = ($frfvo & 0xFFF) >> 2
set $frstatus = ((($frfvo >> 10) & 3) << 2) | ($frfvo & 3)
printf "EXCEPTION -- SR:0x%X PC:0x%X FRAME:0x%x VECTOR:%d STATUS:%d\n", $frsr, $frpc, $frcode, $frvect, $frstatus
if $frstatus == 4
printf " Fault Type: Error on instruction fetch"
end
if $frstatus == 8
printf " Fault Type: Error on operand write"
end
if $frstatus == 12
printf " Fault Type: Error on operand read"
end
if $frstatus == 9
printf " Fault Type: Attempted write to write-protected space"
end
end
# Add -v and -d flags for bdm info
# Add -B flags to utilize hardware breakpoints when they are availiable
#target remote | m68k-bdm-gdbserver pipe /dev/bdmcf0
target remote | m68k-bdm-gdbserver pipe /dev/tblcf2 -B
#monitor set remote-debug 1
monitor bdm-reset
# Set VBR to the beginning of what will be SRAM
monitor bdm-ctl-set 0x0801 0x20000000
# Set RAMBAR1
monitor bdm-ctl-set 0x0C05 0x20000021
# Set FLASHBAR
monitor bdm-ctl-set 0x0C04 0x00000061
# Enable PST[3:0] signals
set *((char*) 0x40100074) = 0x0F
# Add the load when debugging from ram which won't happen with rtems!
#load

92
c/src/lib/libbsp/m68k/mcf5225x/include/bsp.h Normal file
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@@ -0,0 +1,92 @@
/*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*
* $Id$
*/
#ifndef _BSP_H
#define _BSP_H
#ifdef __cplusplus
extern "C" {
#endif
#include <bspopts.h>
#include <rtems.h>
#include <rtems/iosupp.h>
#include <rtems/console.h>
#include <rtems/clockdrv.h>
#include <rtems/iosupp.h>
#include <rtems/bspIo.h>
/***************************************************************************/
/** Hardware data structure headers **/
#include <mcf5225x/mcf5225x.h>
/* Declare base address of peripherals area */
#define __IPSBAR ((vuint8 *) 0x40000000)
/***************************************************************************/
/** Network driver configuration **/
/***************************************************************************/
/** User Definable configuration **/
/* define ports for console and DPU specific for BLUETOOTH and STATIONS */
#define STATIONS_PORT 0
#define CONSOLE_PORT 1
#define BLUETOOTH_PORT 2
/* externals */
/* constants */
/* miscellaneous stuff assumed to exist */
/*
* Device Driver Table Entries
*/
/*
* NOTE: Use the standard Console driver entry
*/
/*
* NOTE: Use the standard Clock driver entry
*/
/* functions */
uint32_t bsp_get_CPU_clock_speed(void);
void bsp_cleanup(void);
m68k_isr_entry set_vector(
rtems_isr_entry handler,
rtems_vector_number vector,
int type
);
/*
* Interrupt assignments
* Highest-priority listed first
*/
#define PIT3_IRQ_LEVEL 4
#define PIT3_IRQ_PRIORITY 0
#define UART0_IRQ_LEVEL 3
#define UART0_IRQ_PRIORITY 7
#define UART1_IRQ_LEVEL 3
#define UART1_IRQ_PRIORITY 6
#define UART2_IRQ_LEVEL 3
#define UART2_IRQ_PRIORITY 5
#ifdef __cplusplus
}
#endif
#endif

31
c/src/lib/libbsp/m68k/mcf5225x/include/tm27.h Normal file
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@@ -0,0 +1,31 @@
/*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*
* $Id$
*/
#ifndef _RTEMS_TMTEST27
#error "This is an RTEMS internal file you must not include directly."
#endif
#ifndef __tm27_h
#define __tm27_h
/*
* Stuff for Time Test 27
* Don't bother with hardware -- just use a software-interrupt
*/
#define MUST_WAIT_FOR_INTERRUPT 0
#define Install_tm27_vector( handler ) set_vector( (handler), 35, 1 )
#define Cause_tm27_intr() asm volatile ("trap #3");
#define Clear_tm27_intr() /* empty */
#define Lower_tm27_intr() /* empty */
#endif

33
c/src/lib/libbsp/m68k/mcf5225x/make/custom/mcf5225x.cfg Normal file
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@@ -0,0 +1,33 @@
#
# Config file for the mcf5225x BSP
#
#Based on:
# $Id$
#
# A0.01 Initial Version BDS 07/26/01
#
RTEMS_CPU=m68k
RTEMS_CPU_MODEL=mcf52258
include $(RTEMS_ROOT)/make/custom/default.cfg
# This is the actual bsp directory used during the build process.
RTEMS_BSP_FAMILY=mcf5225x
# This contains the compiler options necessary to select the CPU model
# and (hopefully) optimize for it.
CPU_CFLAGS = -mcpu=52235 $(PROJECT_FLAGS)
# optimize flag: typically -O2
CFLAGS_OPTIMIZE_V = -O2 -fomit-frame-pointer
#CFLAGS_OPTIMIZE_V = -g
# This defines the operations performed on the linked executable.
# is currently required.
define bsp-post-link
$(OBJCOPY) -O binary --strip-all \
$(basename $@).exe $(basename $@)$(DOWNEXT)
$(SIZE) $(basename $@).exe
endef

67
c/src/lib/libbsp/m68k/mcf5225x/preinstall.am Normal file
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@@ -0,0 +1,67 @@
## Automatically generated by ampolish3 - Do not edit
if AMPOLISH3
$(srcdir)/preinstall.am: Makefile.am
$(AMPOLISH3) $(srcdir)/Makefile.am > $(srcdir)/preinstall.am
endif
PREINSTALL_DIRS =
DISTCLEANFILES += $(PREINSTALL_DIRS)
all-local: $(TMPINSTALL_FILES)
TMPINSTALL_FILES =
CLEANFILES = $(TMPINSTALL_FILES)
all-am: $(PREINSTALL_FILES)
PREINSTALL_FILES =
CLEANFILES += $(PREINSTALL_FILES)
$(PROJECT_LIB)/$(dirstamp):
@$(MKDIR_P) $(PROJECT_LIB)
@: > $(PROJECT_LIB)/$(dirstamp)
PREINSTALL_DIRS += $(PROJECT_LIB)/$(dirstamp)
$(PROJECT_INCLUDE)/$(dirstamp):
@$(MKDIR_P) $(PROJECT_INCLUDE)
@: > $(PROJECT_INCLUDE)/$(dirstamp)
PREINSTALL_DIRS += $(PROJECT_INCLUDE)/$(dirstamp)
$(PROJECT_INCLUDE)/bsp/$(dirstamp):
@$(MKDIR_P) $(PROJECT_INCLUDE)/bsp
@: > $(PROJECT_INCLUDE)/bsp/$(dirstamp)
PREINSTALL_DIRS += $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(PROJECT_LIB)/bsp_specs: bsp_specs $(PROJECT_LIB)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_LIB)/bsp_specs
PREINSTALL_FILES += $(PROJECT_LIB)/bsp_specs
$(PROJECT_INCLUDE)/bsp.h: include/bsp.h $(PROJECT_INCLUDE)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp.h
$(PROJECT_INCLUDE)/tm27.h: include/tm27.h $(PROJECT_INCLUDE)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/tm27.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/tm27.h
$(PROJECT_INCLUDE)/bspopts.h: include/bspopts.h $(PROJECT_INCLUDE)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bspopts.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bspopts.h
$(PROJECT_INCLUDE)/bsp/bootcard.h: ../../shared/include/bootcard.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bootcard.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bootcard.h
$(PROJECT_INCLUDE)/coverhd.h: ../../shared/include/coverhd.h $(PROJECT_INCLUDE)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/coverhd.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/coverhd.h
$(PROJECT_LIB)/start.$(OBJEXT): start.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_LIB)/start.$(OBJEXT)
TMPINSTALL_FILES += $(PROJECT_LIB)/start.$(OBJEXT)
$(PROJECT_LIB)/linkcmds: startup/linkcmds $(PROJECT_LIB)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds
PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds

453
c/src/lib/libbsp/m68k/mcf5225x/start/start.S Normal file
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@@ -0,0 +1,453 @@
/*
* dpu-mcf52258 startup code
*
* This file contains the entry point for the application.
* The name of this entry point is compiler dependent.
* It jumps to the BSP which is responsible for performing
* all initialization.
*
* COPYRIGHT (c) 1989-1998.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
*
* http://www.rtems.com/license/LICENSE.
*
* $Id$
*/
#include <rtems/asm.h>
.extern _StackInit
BEGIN_CODE
PUBLIC (_INTERRUPT_VECTOR)
SYM(_INTERRUPT_VECTOR):
.long _StackInit /* 00 Initial 'SSP' */
.long SYM(start) /* 01 Initial PC */
.long SYM(_uhoh) /* 02 Access Error */
.long SYM(_uhoh) /* 03 Address Error */
.long SYM(_uhoh) /* 04 Illegal Instruction */
.long SYM(_uhoh) /* 05 Divide by Zero */
.long SYM(_uhoh) /* 06 Reserved */
.long SYM(_uhoh) /* 07 Reserved */
.long SYM(_uhoh) /* 08 Privilege Violation */
.long SYM(_uhoh) /* 09 Trace */
.long SYM(_uhoh) /* 10 Unimplemented A-Line */
.long SYM(_uhoh) /* 11 Unimplemented F-Line */
.long SYM(_uhoh) /* 12 Debug Interrupt */
.long SYM(_uhoh) /* 13 Reserved */
.long SYM(_uhoh) /* 14 Format Error */
.long SYM(_uhoh) /* 15 Reserved */
.long SYM(_uhoh) /* 16 Reserved */
.long SYM(_uhoh) /* 17 Reserved */
.long SYM(_uhoh) /* 18 Reserved */
.long SYM(_uhoh) /* 19 Reserved */
.long SYM(_uhoh) /* 20 Reserved */
.long SYM(_uhoh) /* 21 Reserved */
.long SYM(_uhoh) /* 22 Reserved */
.long SYM(_uhoh) /* 23 Reserved */
.long SYM(_spuriousInterrupt) /* 24 Spurious Interrupt */
.long SYM(_uhoh) /* 25 Reserved */
.long SYM(_uhoh) /* 26 Reserved */
.long SYM(_uhoh) /* 27 Reserved */
.long SYM(_uhoh) /* 28 Reserved */
.long SYM(_uhoh) /* 29 Reserved */
.long SYM(_uhoh) /* 30 Reserved */
.long SYM(_uhoh) /* 31 Reserved */
.long SYM(_uhoh) /* 32 TRAP #0 */
.long SYM(_uhoh) /* 33 TRAP #1 */
.long SYM(_uhoh) /* 34 TRAP #2 */
.long SYM(_uhoh) /* 35 TRAP #3 */
.long SYM(_uhoh) /* 36 TRAP #4 */
.long SYM(_uhoh) /* 37 TRAP #5 */
.long SYM(_uhoh) /* 38 TRAP #6 */
.long SYM(_uhoh) /* 39 TRAP #7 */
.long SYM(_uhoh) /* 40 TRAP #8 */
.long SYM(_uhoh) /* 41 TRAP #9 */
.long SYM(_uhoh) /* 42 TRAP #10 */
.long SYM(_uhoh) /* 43 TRAP #11 */
.long SYM(_uhoh) /* 44 TRAP #12 */
.long SYM(_uhoh) /* 45 TRAP #13 */
.long SYM(_uhoh) /* 46 TRAP #14 */
.long SYM(_uhoh) /* 47 TRAP #15 */
.long SYM(_uhoh) /* 48 Reserved */
.long SYM(_uhoh) /* 49 Reserved */
.long SYM(_uhoh) /* 50 Reserved */
.long SYM(_uhoh) /* 51 Reserved */
.long SYM(_uhoh) /* 52 Reserved */
.long SYM(_uhoh) /* 53 Reserved */
.long SYM(_uhoh) /* 54 Reserved */
.long SYM(_uhoh) /* 55 Reserved */
.long SYM(_uhoh) /* 56 Reserved */
.long SYM(_uhoh) /* 57 Reserved */
.long SYM(_uhoh) /* 58 Reserved */
.long SYM(_uhoh) /* 59 Reserved */
.long SYM(_uhoh) /* 60 Reserved */
.long SYM(_uhoh) /* 61 Reserved */
.long SYM(_uhoh) /* 62 Reserved */
.long SYM(_uhoh) /* 63 Reserved */
/* INTC0 */
.long SYM(_uhoh) /* 64*/
.long SYM(_uhoh) /* 65*/
.long SYM(_uhoh) /* 66*/
.long SYM(_uhoh) /* 67*/
.long SYM(_uhoh) /* 68*/
.long SYM(_uhoh) /* 69*/
.long SYM(_uhoh) /* 70*/
.long SYM(_uhoh) /* 71*/
.long SYM(_uhoh) /* 72*/
.long SYM(_uhoh) /* 73*/
.long SYM(_uhoh) /* 74*/
.long SYM(_uhoh) /* 75*/
.long SYM(_uhoh) /* 76*/
.long SYM(_uhoh) /* 77*/
.long SYM(_uhoh) /* 78*/
.long SYM(_uhoh) /* 79*/
.long SYM(_uhoh) /* 80*/
.long SYM(_uhoh) /* 81*/
.long SYM(_uhoh) /* 82*/
.long SYM(_uhoh) /* 83*/
.long SYM(_uhoh) /* 84*/
.long SYM(_uhoh) /* 85*/
.long SYM(_uhoh) /* 86*/
.long SYM(_uhoh) /* 87*/
.long SYM(_uhoh) /* 88*/
.long SYM(_uhoh) /* 89*/
.long SYM(_uhoh) /* 90*/
.long SYM(_uhoh) /* 91*/
.long SYM(_uhoh) /* 92*/
.long SYM(_uhoh) /* 93*/
.long SYM(_uhoh) /* 94*/
.long SYM(_uhoh) /* 95*/
.long SYM(_uhoh) /* 96*/
.long SYM(_uhoh) /* 97*/
.long SYM(_uhoh) /* 98*/
.long SYM(_uhoh) /* 99*/
.long SYM(_uhoh) /* 100*/
.long SYM(_uhoh) /* 101*/
.long SYM(_uhoh) /* 102*/
.long SYM(_uhoh) /* 103*/
.long SYM(_uhoh) /* 104*/
.long SYM(_uhoh) /* 105*/
.long SYM(_uhoh) /* 106*/
.long SYM(_uhoh) /* 107*/
.long SYM(_uhoh) /* 108*/
.long SYM(_uhoh) /* 109*/
.long SYM(_uhoh) /* 110*/
.long SYM(_uhoh) /* 111*/
.long SYM(_uhoh) /* 112*/
.long SYM(_uhoh) /* 113*/
.long SYM(_uhoh) /* 114*/
.long SYM(_uhoh) /* 115*/
.long SYM(_uhoh) /* 116*/
.long SYM(_uhoh) /* 117*/
.long SYM(_uhoh) /* 118*/
.long SYM(_uhoh) /* 119*/
.long SYM(_uhoh) /* 120*/
.long SYM(_uhoh) /* 121*/
.long SYM(_uhoh) /* 122*/
.long SYM(_uhoh) /* 123*/
.long SYM(_uhoh) /* 124*/
.long SYM(_uhoh) /* 125*/
.long SYM(_uhoh) /* 126*/
.long SYM(_uhoh) /* 127*/
/* INTC1 */
.long SYM(_uhoh) /* 128*/
.long SYM(_uhoh) /* 129*/
.long SYM(_uhoh) /* 130*/
.long SYM(_uhoh) /* 131*/
.long SYM(_uhoh) /* 132*/
.long SYM(_uhoh) /* 133*/
.long SYM(_uhoh) /* 134*/
.long SYM(_uhoh) /* 135*/
.long SYM(_uhoh) /* 136*/
.long SYM(_uhoh) /* 137*/
.long SYM(_uhoh) /* 138*/
.long SYM(_uhoh) /* 139*/
.long SYM(_uhoh) /* 140*/
.long SYM(_uhoh) /* 141*/
.long SYM(_uhoh) /* 142*/
.long SYM(_uhoh) /* 143*/
.long SYM(_uhoh) /* 144*/
.long SYM(_uhoh) /* 145*/
.long SYM(_uhoh) /* 146*/
.long SYM(_uhoh) /* 147*/
.long SYM(_uhoh) /* 148*/
.long SYM(_uhoh) /* 149*/
.long SYM(_uhoh) /* 150*/
.long SYM(_uhoh) /* 151*/
.long SYM(_uhoh) /* 152*/
.long SYM(_uhoh) /* 153*/
.long SYM(_uhoh) /* 154*/
.long SYM(_uhoh) /* 155*/
.long SYM(_uhoh) /* 156*/
.long SYM(_uhoh) /* 157*/
.long SYM(_uhoh) /* 158*/
.long SYM(_uhoh) /* 159*/
.long SYM(_uhoh) /* 160*/
.long SYM(_uhoh) /* 161*/
.long SYM(_uhoh) /* 162*/
.long SYM(_uhoh) /* 163*/
.long SYM(_uhoh) /* 164*/
.long SYM(_uhoh) /* 165*/
.long SYM(_uhoh) /* 166*/
.long SYM(_uhoh) /* 167*/
.long SYM(_uhoh) /* 168*/
.long SYM(_uhoh) /* 169*/
.long SYM(_uhoh) /* 170*/
.long SYM(_uhoh) /* 171*/
.long SYM(_uhoh) /* 172*/
.long SYM(_uhoh) /* 173*/
.long SYM(_uhoh) /* 174*/
.long SYM(_uhoh) /* 175*/
.long SYM(_uhoh) /* 176*/
.long SYM(_uhoh) /* 177*/
.long SYM(_uhoh) /* 178*/
.long SYM(_uhoh) /* 179*/
.long SYM(_uhoh) /* 180*/
.long SYM(_uhoh) /* 181*/
.long SYM(_uhoh) /* 182*/
.long SYM(_uhoh) /* 183*/
.long SYM(_uhoh) /* 184*/
.long SYM(_uhoh) /* 185*/
.long SYM(_uhoh) /* 186*/
.long SYM(_uhoh) /* 187*/
.long SYM(_uhoh) /* 188*/
.long SYM(_uhoh) /* 189*/
.long SYM(_uhoh) /* 190*/
.long SYM(_uhoh) /* 191*/
.long SYM(_uhoh) /* 192*/
/* */
.long SYM(_uhoh) /* 193*/
.long SYM(_uhoh) /* 194*/
.long SYM(_uhoh) /* 195*/
.long SYM(_uhoh) /* 196*/
.long SYM(_uhoh) /* 197*/
.long SYM(_uhoh) /* 198*/
.long SYM(_uhoh) /* 199*/
.long SYM(_uhoh) /* 200*/
.long SYM(_uhoh) /* 201*/
.long SYM(_uhoh) /* 202*/
.long SYM(_uhoh) /* 203*/
.long SYM(_uhoh) /* 204*/
.long SYM(_uhoh) /* 205*/
.long SYM(_uhoh) /* 206*/
.long SYM(_uhoh) /* 207*/
.long SYM(_uhoh) /* 208*/
.long SYM(_uhoh) /* 209*/
.long SYM(_uhoh) /* 210*/
.long SYM(_uhoh) /* 211*/
.long SYM(_uhoh) /* 212*/
.long SYM(_uhoh) /* 213*/
.long SYM(_uhoh) /* 214*/
.long SYM(_uhoh) /* 215*/
.long SYM(_uhoh) /* 216*/
.long SYM(_uhoh) /* 217*/
.long SYM(_uhoh) /* 218*/
.long SYM(_uhoh) /* 219*/
.long SYM(_uhoh) /* 220*/
.long SYM(_uhoh) /* 221*/
.long SYM(_uhoh) /* 222*/
.long SYM(_uhoh) /* 223*/
.long SYM(_uhoh) /* 224*/
.long SYM(_uhoh) /* 225*/
.long SYM(_uhoh) /* 226*/
.long SYM(_uhoh) /* 227*/
.long SYM(_uhoh) /* 228*/
.long SYM(_uhoh) /* 229*/
.long SYM(_uhoh) /* 230*/
.long SYM(_uhoh) /* 231*/
.long SYM(_uhoh) /* 232*/
.long SYM(_uhoh) /* 233*/
.long SYM(_uhoh) /* 234*/
.long SYM(_uhoh) /* 235*/
.long SYM(_uhoh) /* 236*/
.long SYM(_uhoh) /* 237*/
.long SYM(_uhoh) /* 238*/
.long SYM(_uhoh) /* 239*/
.long SYM(_uhoh) /* 240*/
.long SYM(_uhoh) /* 241*/
.long SYM(_uhoh) /* 242*/
.long SYM(_uhoh) /* 243*/
.long SYM(_uhoh) /* 244*/
.long SYM(_uhoh) /* 245*/
.long SYM(_uhoh) /* 246*/
.long SYM(_uhoh) /* 247*/
.long SYM(_uhoh) /* 248*/
.long SYM(_uhoh) /* 249*/
.long SYM(_uhoh) /* 250*/
.long SYM(_uhoh) /* 251*/
.long SYM(_uhoh) /* 252*/
.long SYM(_uhoh) /* 253*/
.long SYM(_uhoh) /* 254*/
.long SYM(_uhoh) /* 255*/
/*
* We must write the flash configuration here.
This portion of RAM is shadowed
* by some flash registers, so we can't put code here!
*/
PUBLIC (_FLASH_CONFIGURATION_FIELD)
SYM(_FLASH_CONFIGURATION_FIELD):
_key_upper: .long 0x5a5a5a5a
_key_lower: .long 0x5a5a5a5a
_cfm_prot: .long 0x00000000
_cfm_sacc: .long 0x00000000
_cfm_dacc: .long 0x00000000
_cfm_msec: .long 0x80000000 //enable the KEYEN bit to bypass security in backdoor mode
/*
* Default trap handler
* With an oscilloscope you can see AS* stop
*/
.align 4
PUBLIC (_uhoh)
SYM(_uhoh):
nop | Leave spot for breakpoint
stop #0x2700 | Stop with interrupts disabled
bra.w SYM(_uhoh) | Stuck forever
/*
* Spurious Interrupt Handler
*/
.align 4
PUBLIC (_spuriousInterrupt)
SYM(_spuriousInterrupt):
addql #1, SYM(_M68kSpuriousInterruptCount)
rte
/*
* Write VBR Register
*/
/*
.align 4
PUBLIC (_wr_vbr)
SYM(_wr_vbr):
move.l 4(sp), d0
movec d0, vbr
nop
rts
*/
/*
* Board startup
* Disable watchdog, interrupts
* Enable sram
*/
.align 4
PUBLIC (start)
SYM(start):
/* Mask off interupts */
move.w #0x2700, sr
/* Save off intial D0 and D1 to NOT scratched registers conforming to ABI C calling convention */
move.l d0,d5;
move.l d1,d6;
/* Initialize RAMBAR: locate SRAM and validate it */
move.l #RamBase, d7
add.l #0x21, d7
movec d7, %rambar
/* Locate Stack Pointer */
move.l #_StackInit, sp
/* Initialize FLASHBAR */
move.l #_FlashBase, d7
cmp.l #0x00000000, d7
bne _change_flashbar
add.l #0x61, d7
movec d7, %flashbar
_continue_startup:
/* Locate Stack Pointer */
// move.l #_StackInit, sp //is done automatically by the CPU
/*
* Remainder of the startup code is handled by C code
* This never returns
*/
jmp SYM(Init5225x)
_change_flashbar:
/*
* The following sequence is used to set FLASHBAR. Since we may
* be executing from Flash, we must put the routine into SRAM for
* execution and then jump back to Flash using the new address.
*
* The following instructions are coded into the SRAM:
*
* move.l #(__FLASH + 0x61),d0
* movec d0, FLASHBAR
* jmp _continue_startup
*
* An arbitrary SRAM address is chosen until the real address
* can be loaded.
*
* This routine is not necessary if the default Flash address
* (0x00000000) is used.
*
* If running in SRAM, change_flashbar should not be executed
*/
move.l #RamBase, a0
/* Code "move.l #(__FLASH + 0x61),d0" into SRAM */
move.w #0x203C, d0
move.w d0, (a0)+
move.l #_FlashBase, d0
add.l #0x61, d0
move.l d0, (a0)+
/* Code "movec d0,FLASHBAR" into SRAM */
move.l #0x4e7b0C04, d0
move.l d0, (a0)+
/* Code "jmp _continue_startup" into SRAM */
move.w #0x4EF9, d0
move.w d0, (a0)+
move.l #_continue_startup, d0
move.l d0, (a0)+
/* Jump to code segment in internal SRAM */
jmp RamBase
END_CODE
BEGIN_DATA_DCL
.align 4
PUBLIC (_M68kSpuriousInterruptCount)
SYM (_M68kSpuriousInterruptCount):
.long 0
PUBLIC (_d0_reset)
SYM (_d0_reset):
.long 0
PUBLIC (_d1_reset)
SYM (_d1_reset):
.long 0
END_DATA_DCL
END

32
c/src/lib/libbsp/m68k/mcf5225x/startup/bspclean.c Normal file
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/*
* SBC5206 bsp_cleanup
*
* This routine returns control from RTEMS to the monitor.
*
* Author:
* David Fiddes, D.J@fiddes.surfaid.org
* http://www.calm.hw.ac.uk/davidf/coldfire/
*
* COPYRIGHT (c) 1989-1998.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
*
* http://www.rtems.com/license/LICENSE.
*
* $Id$
*/
#include <rtems.h>
#include <bsp.h>
#include <rtems/bspIo.h>
void __attribute__((weak)) bsp_cleanup(void)
{
printk("\nRTEMS exited!\n");
for (;;) {
asm volatile (" nop ");
asm volatile (" nop ");
}
}

69
c/src/lib/libbsp/m68k/mcf5225x/startup/bspstart.c Normal file
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/*
* BSP startup
*
* This routine starts the application. It includes application,
* board, and monitor specific initialization and configuration.
* The generic CPU dependent initialization has been performed
* before this routine is invoked.
*
* Author:
* David Fiddes, D.J@fiddes.surfaid.org
* http://www.calm.hw.ac.uk/davidf/coldfire/
*
* COPYRIGHT (c) 1989-1998.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
*
* http://www.rtems.com/license/LICENSE.
*
* $Id$
*/
#include <bsp.h>
/*
* Cannot be frozen
*/
void _CPU_cache_freeze_data(void) {}
void _CPU_cache_unfreeze_data(void) {}
void _CPU_cache_freeze_instruction(void) {}
void _CPU_cache_unfreeze_instruction(void) {}
/*
* Write-through data cache -- flushes are unnecessary
*/
void _CPU_cache_flush_1_data_line(const void *d_addr) {}
void _CPU_cache_flush_entire_data(void) {}
void _CPU_cache_enable_instruction(void) {}
void _CPU_cache_disable_instruction(void) {}
void _CPU_cache_invalidate_entire_instruction(void) {}
void _CPU_cache_invalidate_1_instruction_line(const void *addr) {}
void _CPU_cache_enable_data(void) {}
void _CPU_cache_disable_data(void) {}
void _CPU_cache_invalidate_entire_data(void) {}
void _CPU_cache_invalidate_1_data_line(const void *addr) {}
/*
* bsp_start
*
* This routine does the bulk of the system initialisation.
*/
void __attribute__((weak)) bsp_start(void)
{
}
uint32_t __attribute__((weak)) bsp_get_CPU_clock_speed(void)
{
#define DEF_CLOCK_SPEED 8000000.0F //8.0 MHz
#define MCF_MFD0_2_MASK 0x7000U
#define MCF_RFD0_2_MASK 0x0700U
#define MCF_MFD0_2_OFFSET 4U
#define SPEED_BIAS ((((MCF_CLOCK_SYNCR & MCF_MFD0_2_MASK) >> 11) + MCF_MFD0_2_OFFSET) / (float)(((MCF_CLOCK_SYNCR & MCF_RFD0_2_MASK)>>7) ? : 1.0F))
return MCF_CLOCK_SYNCR & MCF_CLOCK_SYNCR_PLLEN ? SPEED_BIAS * DEF_CLOCK_SPEED : DEF_CLOCK_SPEED;
}

87
c/src/lib/libbsp/m68k/mcf5225x/startup/init5225x.c Normal file
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/*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*
* This is where the real hardware setup is done. A minimal stack
* has been provided by the start.S code. No normal C or RTEMS
* functions can be called from here.
*
* $Id$
*/
#include <stdint.h>
extern void _wr_vbr(uint32_t);
extern int boot_card(int, char **, char **);
extern long _d0_reset,_d1_reset,_M68kSpuriousInterruptCount;
/*
* From linkcmds
*/
extern uint8_t _VBR[];
extern uint8_t _INTERRUPT_VECTOR[];
extern uint8_t _clear_start[];
extern uint8_t _clear_end[];
extern uint8_t _data_src_start[];
extern uint8_t _data_dest_start[];
extern uint8_t _data_dest_end[];
void Init5225x(void)
{
register uint32_t i;
register uint32_t *dp, *sp;
register uint8_t *dbp, *sbp;
/*
* Copy the vector table to RAM
*/
if (_VBR != _INTERRUPT_VECTOR) {
sp = (uint32_t *) _INTERRUPT_VECTOR;
dp = (uint32_t *) _VBR;
for (i = 0; i < 256; i++) {
*dp++ = *sp++;
}
}
/*
* Move initialized data from ROM to RAM.
*/
if (_data_src_start != _data_dest_start) {
dbp = (uint8_t *) _data_dest_start;
sbp = (uint8_t *) _data_src_start;
i = _data_dest_end - _data_dest_start;
while (i--)
*dbp++ = *sbp++;
}
asm __volatile__ ("move.l %%d5,%0\n\t":"=r" (_d0_reset));
asm __volatile__ ("move.l %%d6,%0\n\t":"=r" (_d1_reset));
/*
* Zero uninitialized data
*/
if (_clear_start != _clear_end) {
sbp = _clear_start;
dbp = _clear_end;
i = dbp - sbp;
while (i--)
*sbp++ = 0;
}
//_wr_vbr((uint32_t) _VBR);
asm volatile("move.l %0,%%d7;movec %%d7,%%vbr\n\t"::"i"(_VBR): "cc");
/*
* We have to call some kind of RTEMS function here!
*/
boot_card(0, 0, 0);
for (;;) ;
}

174
c/src/lib/libbsp/m68k/mcf5225x/startup/linkcmds Normal file
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/*
* This file contains directives for the GNU linker which are specific
* to the Freescale ColdFire mcf52258
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.e
*
* $Id$
*/
/*
* Declare some sizes.
*/
RamBase = DEFINED(RamBase) ? RamBase : 0x20000000;
RamSize = DEFINED(RamSize) ? RamSize : 64K;
HeapSize = DEFINED(HeapSize) ? HeapSize : 0x0;
_StackSize = DEFINED(_StackSize) ? _StackSize : 0x400;
_FlashBase = DEFINED(_FlashBase) ? _FlashBase : 0x00000000;
_VBR = 0x20000000;
ENTRY(start)
MEMORY
{
sram : ORIGIN = 0x20000000, LENGTH = 64K
flash : ORIGIN = 0x00000000, LENGTH = 512K
}
SECTIONS
{
/*
* Text, data and bss segments
*/
.text : {
*(.text*)
*(.ram_code)
/*
* C++ constructors/destructors
*/
*(.gnu.linkonce.t.*)
/*
* Initialization and finalization code.
*
* Various files can provide initialization and finalization
* functions. crtbegin.o and crtend.o are two instances. The
* body of these functions are in .init and .fini sections. We
* accumulate the bodies here, and prepend function prologues
* from crti.o and function epilogues from crtn.o. crti.o must
* be linked first; crtn.o must be linked last. Because these
* are wildcards, it doesn't matter if the user does not
* actually link against crti.o and crtn.o; the linker won't
* look for a file to match a wildcard. The wildcard also
* means that it doesn't matter which directory crti.o and
* crtn.o are in.
*/
PROVIDE (_init = .);
*crti.o(.init)
*(.init)
*crtn.o(.init)
PROVIDE (_fini = .);
*crti.o(.fini)
*(.fini)
*crtn.o(.fini)
/*
* Special FreeBSD sysctl sections.
*/
. = ALIGN (16);
__start_set_sysctl_set = .;
*(set_sysctl_*);
__stop_set_sysctl_set = ABSOLUTE(.);
*(set_domain_*);
*(set_pseudo_*);
/*
* C++ constructors/destructors
*
* gcc uses crtbegin.o to find the start of the constructors
* and destructors so we make sure it is first. Because this
* is a wildcard, it doesn't matter if the user does not
* actually link against crtbegin.o; the linker won't look for
* a file to match a wildcard. The wildcard also means that
* it doesn't matter which directory crtbegin.o is in. The
* constructor and destructor list are terminated in
* crtend.o. The same comments apply to it.
*/
. = ALIGN (16);
*crtbegin.o(.ctors)
*(.ctors)
*crtend.o(.ctors)
*crtbegin.o(.dtors)
*(.dtors)
*crtend.o(.dtors)
/*
* Exception frame info
*/
. = ALIGN (16);
*(.eh_frame)
/*
* Read-only data
*/
. = ALIGN (16);
_rodata_start = . ;
*(.rodata*)
*(.gnu.linkonce.r*)
. = ALIGN (16);
*(.console_gdb_xfer)
*(.bootstrap_data)
. = ALIGN(16);
_estuff = .;
PROVIDE (_etext = .);
} >flash
.data 0x20000400 : AT (_estuff)
{
PROVIDE( _data_dest_start = . );
PROVIDE( _copy_start = .);
*(.data)
*(.gnu.linkonce.d*)
*(.gcc_except_table*)
*(.jcr)
. = ALIGN (16);
PROVIDE (_edata = .);
PROVIDE (_copy_end = .);
PROVIDE (_data_dest_end = . );
} >sram
_data_src_start = _estuff;
_data_src_end = _data_dest_start + SIZEOF(.data);
.bss :
{
PROVIDE (_clear_start = .);
*(.bss*)
*(COMMON)
. = ALIGN (16);
PROVIDE (_end = .);
PROVIDE (_clear_end = .);
} >sram
.stack :
{
/*
* Starting Stack
*/
. += _StackSize;
. = ALIGN (16);
PROVIDE(_StackInit = .);
PROVIDE(WorkAreaBase = .);
} >sram
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
PROVIDE (end_of_all = .);
}

40
c/src/lib/libbsp/m68k/mcf5225x/timer/timer.c Normal file
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@@ -0,0 +1,40 @@
/*
* Timer Init
*
* Use the last DMA timer (DTIM3) as the diagnostic timer.
*
* Author: W. Eric Norum <norume@aps.anl.gov>
*
* COPYRIGHT (c) 2005-2010.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*
* $Id$
*/
#include <rtems.h>
#include <bsp.h>
void benchmark_timer_initialize(void)
{
uint32_t preScaleDivisor = bsp_get_CPU_clock_speed() / 1000000;
MCF_DTIM3_DTMR = 0;
MCF_DTIM3_DTMR = MCF_DTIM_DTMR_PS(preScaleDivisor - 1) |
MCF_DTIM_DTMR_CLK_DIV1 | MCF_DTIM_DTMR_RST;
}
/*
* Return timer value in microsecond units
*/
int benchmark_timer_read(void)
{
return MCF_DTIM3_DTCN;
}
void benchmark_timer_disable_subtracting_average_overhead(bool find_flag)
{
}