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Patch from Eric Valette <valette@crf.canon.fr> to clean up the

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previous submission.
This commit is contained in:
Joel Sherrill
1999-07-01 23:39:13 +00:00
parent 2a6a029ff4
commit fcee56c0b1
77 changed files with 751 additions and 709 deletions
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2
c/src/lib/libbsp/powerpc/mcp750/Makefile.in
View File

@@ -17,4 +17,4 @@ all: $(SRCS)
# wrapup is the one that actually builds and installs the library
# from the individual .rel files built in other directories
SUB_DIRS= console include pci residual openpic irq vectors start startup bootloader wrapup
SUB_DIRS= console include pci residual openpic irq vectors start startup bootloader dec21140 wrapup

2
c/src/lib/libbsp/powerpc/mcp750/bootloader/Makefile.in
View File

@@ -1,5 +1,5 @@
#
# $Id:
# $Id$
#
@SET_MAKE@

17
c/src/lib/libbsp/powerpc/mcp750/bootloader/bootldr.h
View File

@@ -1,11 +1,18 @@
/*
* include/asm-ppc/bloader.h -- Include file for bootloader.
* bootldr.h -- Include file for bootloader.
*
* Copyright (C) 1998 Gabriel Paubert, paubert@iram.es
* Copyright (C) 1998, 1999 Gabriel Paubert, paubert@iram.es
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file COPYING in the main directory of this archive
* for more details.
* Modified to compile in RTEMS development environment
* by Eric Valette
*
* Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
*
* The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#ifndef _PPC_BOOTLDR_H

17
c/src/lib/libbsp/powerpc/mcp750/bootloader/em86.c
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@@ -1,3 +1,20 @@
/*
* em86.c -- Include file for bootloader.
*
* Copyright (C) 1998, 1999 Gabriel Paubert, paubert@iram.es
*
* Modified to compile in RTEMS development environment
* by Eric Valette
*
* Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
*
* The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
/*****************************************************************************
*
* Code to interpret Video BIOS ROM routines.

17
c/src/lib/libbsp/powerpc/mcp750/bootloader/em86real.S
View File

@@ -1,11 +1,18 @@
/*
* arch/ppc/boot/em86real.S -- Small x86 emulator for video board setup
* em86real.S
*
* Copyright (C) 1998 Gabriel Paubert, paubert@iram.es
* Copyright (C) 1998, 1999 Gabriel Paubert, paubert@iram.es
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file COPYING in the main directory of this archive
* for more details.
* Modified to compile in RTEMS development environment
* by Eric Valette
*
* Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
*
* The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
/* If the symbol __BOOT__ is defined, a slightly different version is

17
c/src/lib/libbsp/powerpc/mcp750/bootloader/exception.S
View File

@@ -1,11 +1,18 @@
/*
* arch/ppc/loader/exceotion.S -- Exception handlers for early boot.
* exception.S -- Exception handlers for early boot.
*
* Copyright (C) 1998 Gabriel Paubert, paubert@iram.es
* Copyright (C) 1998, 1999 Gabriel Paubert, paubert@iram.es
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file COPYING in the main directory of this archive
* for more details.
* Modified to compile in RTEMS development environment
* by Eric Valette
*
* Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
*
* The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
/* This is an improved version of the TLB interrupt handling code from

17
c/src/lib/libbsp/powerpc/mcp750/bootloader/head.S
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@@ -1,9 +1,18 @@
/*
* $Id$
*
* This code is loaded by the ROM loader at some arbitrary location.
* Move it to high memory so that it can load the kernel at 0x0000.
* head.S -- Bootloader Entry point
*
* Copyright (C) 1998, 1999 Gabriel Paubert, paubert@iram.es
*
* Modified to compile in RTEMS development environment
* by Eric Valette
*
* Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
*
* The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#include "bootldr.h"

19
c/src/lib/libbsp/powerpc/mcp750/bootloader/misc.c
View File

@@ -1,15 +1,18 @@
/*
* arch/ppc/prepboot/misc.c
* head.S -- Bootloader Entry point
*
* Copyright (C) 1998 Gabriel Paubert, paubert@iram.es
* Copyright (C) 1998, 1999 Gabriel Paubert, paubert@iram.es
*
* This file is based on arch/ppc/boot misc.c in previous versions of
* Linux/PPC but has been so extensively changed that only a few lines
* remain from the original.
* Modified to compile in RTEMS development environment
* by Eric Valette
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file COPYING in the main directory of this archive
* for more details.
* Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
*
* The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#include <sys/types.h>

17
c/src/lib/libbsp/powerpc/mcp750/bootloader/mm.c
View File

@@ -1,11 +1,18 @@
/*
* arch/ppc/prepboot/mm.c -- Crude memory management for early boot.
* mm.c -- Crude memory management for early boot.
*
* Copyright (C) 1998 Gabriel Paubert, paubert@iram.es
* Copyright (C) 1998, 1999 Gabriel Paubert, paubert@iram.es
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file COPYING in the main directory of this archive
* for more details.
* Modified to compile in RTEMS development environment
* by Eric Valette
*
* Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
*
* The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
/* This code is a crude memory manager for early boot for LinuxPPC.

19
c/src/lib/libbsp/powerpc/mcp750/bootloader/pci.c
View File

@@ -1,15 +1,18 @@
/*
* arch/ppc/prepboot/pci.c -- Crude pci handling for early boot.
* pci.c -- Crude pci handling for early boot.
*
* Copyright (C) 1998 Gabriel Paubert, paubert@iram.es
* Copyright (C) 1998, 1999 Gabriel Paubert, paubert@iram.es
*
* The pci_scan_bus and pci_read_bases functions are slightly modified
* versions of functions with the same name in linux/drivers/pci.c by
* Martin Mares (mj@ucw.cz) and others (taken around linux-2.1.120).
* Modified to compile in RTEMS development environment
* by Eric Valette
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file COPYING in the main directory of this archive
* for more details.
* Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
*
* The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/

55
c/src/lib/libbsp/powerpc/mcp750/console/console.c
View File

@@ -1,37 +1,24 @@
/*-------------------------------------------------------------------------+
| console.c v1.1 - PC386 BSP - 1997/08/07
+--------------------------------------------------------------------------+
| This file contains the PC386 console I/O package.
+--------------------------------------------------------------------------+
| (C) Copyright 1997 -
| - NavIST Group - Real-Time Distributed Systems and Industrial Automation
|
| http://pandora.ist.utl.pt
|
| Instituto Superior Tecnico * Lisboa * PORTUGAL
+--------------------------------------------------------------------------+
| Disclaimer:
|
| This file is provided "AS IS" without warranty of any kind, either
| expressed or implied.
+--------------------------------------------------------------------------+
| This code is based on:
| console.c,v 1.4 1995/12/19 20:07:23 joel Exp - go32 BSP
| With the following copyright notice:
| **************************************************************************
| * COPYRIGHT (c) 1989-1998.
| * On-Line Applications Research Corporation (OAR).
| * Copyright assigned to U.S. Government, 1994.
| *
| * The license and distribution terms for this file may be
| * found in found in the file LICENSE in this distribution or at
| * http://www.OARcorp.com/rtems/license.html.
| **************************************************************************
|
| $Id$
+--------------------------------------------------------------------------*/
#include <stdio.h>
/*
* console.c -- console I/O package
*
* Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
*
* This code is based on the pc386 BSP console.c so the following
* copyright also applies :
*
* (C) Copyright 1997 -
* - NavIST Group - Real-Time Distributed Systems and Industrial Automation
*
* http://pandora.ist.utl.pt
*
* Instituto Superior Tecnico * Lisboa * PORTUGAL
* The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#include <stdlib.h>
#include <assert.h>
#undef __assert

12
c/src/lib/libbsp/powerpc/mcp750/console/consoleIo.h
View File

@@ -1,3 +1,15 @@
/*
* consoleIo.h -- console I/O package interface
*
* Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
*
* The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#ifndef __CONSOLE_IO_H
#define __CONSOLE_IO_H

14
c/src/lib/libbsp/powerpc/mcp750/console/consoleLib.S
View File

@@ -1,11 +1,17 @@
/*
* $Id$
*
* This code is loaded by the ROM loader at some arbitrary location.
* Move it to high memory so that it can load the kernel at 0x0000.
* consoleLib.S -- console I/O package utility functions.
*
* Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
*
* The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
/* A few utility functions, some copied from arch/ppc/lib/string.S */
#include <libcpu/cpu.h>
#include <rtems/score/targopts.h>
#include "asm.h"

51
c/src/lib/libbsp/powerpc/mcp750/console/inch.c
View File

@@ -1,34 +1,23 @@
/*-------------------------------------------------------------------------+
| inch.c v1.1 - PC386 BSP - 1997/08/07
+--------------------------------------------------------------------------+
| (C) Copyright 1997 -
| - NavIST Group - Real-Time Distributed Systems and Industrial Automation
|
| http://pandora.ist.utl.pt
|
| Instituto Superior Tecnico * Lisboa * PORTUGAL
+--------------------------------------------------------------------------+
| Disclaimer:
|
| This file is provided "AS IS" without warranty of any kind, either
| expressed or implied.
+--------------------------------------------------------------------------+
| This code is based on:
| inch.c,v 1.3 1995/12/19 20:07:25 joel Exp - go32 BSP
| With the following copyright notice:
| With the following copyright notice:
| **************************************************************************
| * COPYRIGHT (c) 1989-1998.
| * On-Line Applications Research Corporation (OAR).
| * Copyright assigned to U.S. Government, 1994.
| *
| * The license and distribution terms for this file may be
| * found in found in the file LICENSE in this distribution or at
| * http://www.OARcorp.com/rtems/license.html.
| **************************************************************************
|
| $Id$
+--------------------------------------------------------------------------*/
/*
* inch.c -- keyboard minimal driver
*
* Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
*
* This code is based on the pc386 BSP inch.c so the following
* copyright also applies :
*
* (C) Copyright 1997 -
* - NavIST Group - Real-Time Distributed Systems and Industrial Automation
*
* http://pandora.ist.utl.pt
*
* Instituto Superior Tecnico * Lisboa * PORTUGAL
* The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#include <bsp.h>
#include <bsp/irq.h>

12
c/src/lib/libbsp/powerpc/mcp750/console/keyboard.h
View File

@@ -1,3 +1,15 @@
/*
* keyboard.h -- keyboard definitions.
*
* Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
*
* The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#ifndef __LINUX_KEYBOARD_H
#define __LINUX_KEYBOARD_H

18
c/src/lib/libbsp/powerpc/mcp750/console/polled_io.c
View File

@@ -1,14 +1,18 @@
/*
* arch/ppc/prepboot/console.c
* polled_io.c -- Basic input/output for early boot
*
* Copyright (C) 1998 Gabriel Paubert, paubert@iram.es
* Copyright (C) 1998, 1999 Gabriel Paubert, paubert@iram.es
*
* This file is based on arch/ppc/boot/{kbd,vreset}.c in previous versions
* of Linux/PPC, mostly contributed by Gary Thomas and Cort Dougan.
* Modified to compile in RTEMS development environment
* by Eric Valette
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file COPYING in the main directory of this archive
* for more details.
* Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
*
* The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#include <sys/types.h>

10
c/src/lib/libbsp/powerpc/mcp750/include/bsp.h
View File

@@ -1,5 +1,13 @@
/*
* empty file. Just because referenced by portable application layer.
* bsp.h -- contain BSP API definition.
*
* Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
*
* The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#ifndef LIBBSP_POWERPC_MCP750_BSP_H
#define LIBBSP_POWERPC_MCP750_BSP_H

4
c/src/lib/libbsp/powerpc/mcp750/include/nvram.h
View File

@@ -1,5 +1,9 @@
/*
* PreP compliant NVRAM access
*
* This file can be found in motorla or IBP PPC site.
*
* $Id$
*/
#ifndef _PPC_NVRAM_H

9
c/src/lib/libbsp/powerpc/mcp750/irq/i8259.c
View File

@@ -1,9 +1,9 @@
/* i8259.c
*
/*
* This file contains the implementation of the function described in irq.h
* related to Intel 8259 Programmable Interrupt controller.
*
* CopyRight (C) 1998 valette@crf.canon.fr
* Copyright (C) 1998, 1999 valette@crf.canon.fr
*
* The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at
@@ -11,8 +11,7 @@
*
* $Id$
*/
#include <bsp.h>
#include <bsp/irq.h>

9
c/src/lib/libbsp/powerpc/mcp750/irq/irq.c
View File

@@ -1,8 +1,8 @@
/* irq.c
/*
*
* This file contains the implementation of the function described in irq.h
*
* CopyRight (C) 1998 valette@crf.canon.fr
* Copyright (C) 1998, 1999 valette@crf.canon.fr
*
* The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at
@@ -10,8 +10,7 @@
*
* $Id$
*/
#include <bsp.h>
#include <bsp/irq.h>
#include <bsp/openpic.h>
@@ -19,7 +18,7 @@
#include <rtems/score/apiext.h>
#include <libcpu/raw_exception.h>
#include <bsp/vectors.h>
#include <libcpu/processor.h>
#include <libcpu/cpu.h>
#define RAVEN_INTR_ACK_REG 0xfeff0030

11
c/src/lib/libbsp/powerpc/mcp750/irq/irq_asm.S
View File

@@ -1,15 +1,14 @@
/*
* (c) 1999, Eric Valette valette@crf.canon.fr
*
*
* This file contains the assembly code for the PowerPC
* IRQ veneers for RTEMS.
*
* The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#include <bsp/vectors.h>
#include <libcpu/cpu.h>
#include <libcpu/raw_exception.h>

18
c/src/lib/libbsp/powerpc/mcp750/openpic/openpic.c
View File

@@ -1,14 +1,20 @@
/*
* arch/ppc/kernel/openpic.c -- OpenPIC Interrupt Handling
* openpic.c -- OpenPIC Interrupt Handling
*
* Copyright (C) 1997 Geert Uytterhoeven
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file COPYING in the main directory of this archive
* for more details.
* Modified to compile in RTEMS development environment
* by Eric Valette
*
* Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
*
* The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
/*
* Note: Interprocessor Interrupt (IPI) and Timer support is incomplete
*/
@@ -20,8 +26,6 @@
#include <libcpu/io.h>
#include <libcpu/byteorder.h>
/* #include <asm/irq.h> */
#define NULL 0
#define REGISTER_DEBUG
#undef REGISTER_DEBUG

13
c/src/lib/libbsp/powerpc/mcp750/openpic/openpic.h
View File

@@ -1,5 +1,5 @@
/*
* linux/openpic.h -- OpenPIC definitions
* openpic.h -- OpenPIC definitions
*
* Copyright (C) 1997 Geert Uytterhoeven
*
@@ -21,6 +21,17 @@
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file COPYING in the main directory of this archive
* for more details.
*
* Modified to compile in RTEMS development environment
* by Eric Valette
*
* Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
*
* The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#ifndef _RTEMS_OPENPIC_H

18
c/src/lib/libbsp/powerpc/mcp750/pci/pci.c
View File

@@ -1,3 +1,21 @@
/*
* pci.c : this file contains basic PCI Io functions.
*
* CopyRight (C) 1999 valette@crf.canon.fr
*
* This code is heavilly inspired by the public specification of STREAM V2
* that can be found at :
*
* <http://www.chorus.com/Documentation/index.html> by following
* the STREAM API Specification Document link.
*
* The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#include <bsp/consoleIo.h>
#include <libcpu/io.h>
#include <bsp/pci.h>

2
c/src/lib/libbsp/powerpc/mcp750/pci/pci.h
View File

@@ -11,6 +11,8 @@
* PCI Local Bus Specification
* PCI to PCI Bridge Specification
* PCI System Design Guide
*
* $Id$
*/
#ifndef RTEMS_PCI_H

4
c/src/lib/libbsp/powerpc/mcp750/residual/pnp.h
View File

@@ -14,6 +14,10 @@
/* For enum's: if given in hex then they are bit significant, i.e. */
/* only one bit is on for each enum */
/*
* $Id$
*/
#ifndef _PNP_
#define _PNP_

15
c/src/lib/libbsp/powerpc/mcp750/residual/residual.c
View File

@@ -1,3 +1,18 @@
/*
* residual.c : function used to parse residual data.
*
* CopyRight (C) 1999 valette@crf.canon.fr
*
* This code is heavilly inspired by the public specification of STREAM V2
* that can be found at :
*
* The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#include <bsp/residual.h>
#include <libcpu/io.h>
#include <libcpu/byteorder.h>

4
c/src/lib/libbsp/powerpc/mcp750/residual/residual.h
View File

@@ -10,6 +10,10 @@
/* i.e. only one bit is on for each enum */
/* Reserved fields must be filled with zeros. */
/*
* $Id$
*/
#ifndef _RESIDUAL_
#define _RESIDUAL_

11
c/src/lib/libbsp/powerpc/mcp750/startup/bspstart.c
View File

@@ -12,6 +12,9 @@
* found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* Modified to support the MCP750.
* Modifications Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
*
* $Id$
*/
@@ -119,13 +122,17 @@ void bsp_libc_init( void *, unsigned32, int );
void bsp_pretasking_hook(void)
{
extern int end;
rtems_unsigned32 heap_start;
rtems_unsigned32 heap_start;
rtems_unsigned32 heap_size;
heap_start = ((rtems_unsigned32) &__rtems_end) +INIT_STACK_SIZE + INTR_STACK_SIZE;
if (heap_start & (CPU_ALIGNMENT-1))
heap_start = (heap_start + CPU_ALIGNMENT) & ~(CPU_ALIGNMENT-1);
bsp_libc_init((void *) heap_start, 64 * 1024, 0);
heap_size = (BSP_mem_size - heap_start) - BSP_Configuration.work_space_size;
printk(" HEAP start %x size %x\n", heap_start, heap_size);
bsp_libc_init((void *) heap_start, heap_size, 0);
#ifdef RTEMS_DEBUG
rtems_debug_enable( RTEMS_DEBUG_ALL_MASK );

121
c/src/lib/libbsp/powerpc/mcp750/startup/cEntry.c
View File

@@ -1,121 +0,0 @@
/*
*
*/
#include <bsp/consoleIo.h>
#include <libcpu/spr.h>
#include <bsp/residual.h>
#include <bsp/pci.h>
#include <bsp/openpic.h>
#include <bsp/irq.h>
#include <bsp.h>
#include <libcpu/bat.h>
extern void _return_to_ppcbug();
extern unsigned long __rtems_end;
RESIDUAL residualCopy;
#define INIT_STACK_SIZE 0x1000
#define INTR_STACK_SIZE 0x4000
void BSP_panic(char *s)
{
printk("RTEMS 4.x PANIC %s\n", s);
_return_to_ppcbug();
}
void _BSP_Fatal_error(unsigned int v)
{
printk("RTEMS 4.x PANIC ERROR %x\n", v);
_return_to_ppcbug();
}
void
boot_card(RESIDUAL* r3, void *r4, void* r5, char *additional_boot_options)
{
int err;
unsigned char *stack;
unsigned l2cr;
register unsigned char* intrStack;
register unsigned int intrNestingLevel = 0;
L1_caches_enables();
stack = ((unsigned char*) &__rtems_end) + INIT_STACK_SIZE;
intrStack = ((unsigned char*) &__rtems_end) + INIT_STACK_SIZE + INTR_STACK_SIZE;
asm volatile ("mtspr 273, %0" : "=r" (intrStack) : "0" (intrStack));
asm volatile ("mtspr 272, %0" : "=r" (intrNestingLevel) : "0" (intrNestingLevel));
residualCopy = *r3;
#define NO_DYNAMIC_EXCEPTION_VECTOR_INSTALL
#undef NO_DYNAMIC_EXCEPTION_VECTOR_INSTALL
#ifndef NO_DYNAMIC_EXCEPTION_VECTOR_INSTALL
initialize_exceptions();
#endif
select_console(CONSOLE_LOG);
/* We check that the keyboard is present and immediately
* select the serial console if not.
*/
err = kbdreset();
if (err) select_console(CONSOLE_SERIAL);
printk("Welcome to RTEMS 4.0.2 on Motorola MCP750\n\n\n");
printk("-----------------------------------------\n");
printk("Residuals are located at %x\n", (unsigned) r3);
printk("Additionnal boot options are %s\n", additional_boot_options);
printk("-----------------------------------------\n");
printk("Initial system stack at %x\n",stack);
l2cr = get_L2CR();
printk("Initial L2CR value = %x\n", l2cr);
if (! (l2cr & 0x80000000))
set_L2CR(0xb9A14000);
#ifdef TEST_RETURN_TO_PPCBUG
printk("Hit <Enter> to return to PPCBUG monitor\n");
printk("When Finished hit GO. It should print <Back from monitor>\n");
debug_getc();
_return_to_ppcbug();
printk("Back from monitor\n");
_return_to_ppcbug();
#endif /* TEST_RETURN_TO_PPCBUG */
/*
* Init MMU block address translation to enable hardware
* access
*/
/*
* PC legacy IO space used for inb/outb and all PC
* compatible hardware
*/
setdbat(1, 0x80000000, 0x80000000, 0x10000000, IO_PAGE);
/*
* PCI devices memory area. Needed to access OPENPIC features
* provided by the RAVEN
*/
setdbat(2, 0xc0000000, 0xc0000000, 0x08000000, IO_PAGE);
/*
* Must have acces to open pic PCI ACK registers
* provided by the RAVEN
*/
setdbat(3, 0xfeff0000, 0xfeff0000, 0x10000, IO_PAGE);
printk("Going to start PCI buses scanning and initialization\n");
InitializePCI();
printk("Number of PCI buses is found : %d\n", BusCountPCI());
#ifdef TEST_RAW_EXCEPTION_CODE
printk("Testing exception handling Part 1\n");
/*
* Cause a software exception
*/
__asm__ __volatile ("sc");
/*
* Check we can still catch exceptions
*/
printk("Testing exception handling Part 2\n");
__asm__ __volatile ("sc");
#endif
BSP_rtems_irq_mng_init(0);
printk("Init done\n");
debug_getc();
while(1);
}

14
c/src/lib/libbsp/powerpc/mcp750/vectors/vectors.h
View File

@@ -1,3 +1,17 @@
/*
* vectors.h Exception frame related contant and API.
*
* This include file describe the data structure and the functions implemented
* by rtems to handle exceptions.
*
* CopyRight (C) 1999 valette@crf.canon.fr
*
* The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#ifndef LIBBSP_POWERPC_MCP750_VECTORS_H
#define LIBBSP_POWERPC_MCP750_VECTORS_H

13
c/src/lib/libbsp/powerpc/mcp750/vectors/vectors_init.c
View File

@@ -1,5 +1,16 @@
/*
/*
* vectors_init.c Exception hanlding initialisation (and generic handler).
*
* This include file describe the data structure and the functions implemented
* by rtems to handle exceptions.
*
* CopyRight (C) 1999 valette@crf.canon.fr
*
* The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#include <bsp/vectors.h>
#include <libcpu/raw_exception.h>

2
c/src/lib/libbsp/powerpc/mcp750/wrapup/Makefile.in
View File

@@ -15,7 +15,7 @@ PROJECT_ROOT = @PROJECT_ROOT@
VPATH = @srcdir@
BSP_PIECES=console irq openpic pci residual startup vectors
BSP_PIECES=console irq openpic pci residual startup dec21140 vectors
GENERIC_PIECES=
# bummer; have to use $foreach since % pattern subst rules only replace 1x

2
c/src/lib/libbsp/powerpc/motorola_powerpc/Makefile.in
View File

@@ -17,4 +17,4 @@ all: $(SRCS)
# wrapup is the one that actually builds and installs the library
# from the individual .rel files built in other directories
SUB_DIRS= console include pci residual openpic irq vectors start startup bootloader wrapup
SUB_DIRS= console include pci residual openpic irq vectors start startup bootloader dec21140 wrapup

2
c/src/lib/libbsp/powerpc/motorola_powerpc/bootloader/Makefile.in
View File

@@ -1,5 +1,5 @@
#
# $Id:
# $Id$
#
@SET_MAKE@

17
c/src/lib/libbsp/powerpc/motorola_powerpc/bootloader/bootldr.h
View File

@@ -1,11 +1,18 @@
/*
* include/asm-ppc/bloader.h -- Include file for bootloader.
* bootldr.h -- Include file for bootloader.
*
* Copyright (C) 1998 Gabriel Paubert, paubert@iram.es
* Copyright (C) 1998, 1999 Gabriel Paubert, paubert@iram.es
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file COPYING in the main directory of this archive
* for more details.
* Modified to compile in RTEMS development environment
* by Eric Valette
*
* Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
*
* The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#ifndef _PPC_BOOTLDR_H

17
c/src/lib/libbsp/powerpc/motorola_powerpc/bootloader/em86.c
View File

@@ -1,3 +1,20 @@
/*
* em86.c -- Include file for bootloader.
*
* Copyright (C) 1998, 1999 Gabriel Paubert, paubert@iram.es
*
* Modified to compile in RTEMS development environment
* by Eric Valette
*
* Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
*
* The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
/*****************************************************************************
*
* Code to interpret Video BIOS ROM routines.

17
c/src/lib/libbsp/powerpc/motorola_powerpc/bootloader/em86real.S
View File

@@ -1,11 +1,18 @@
/*
* arch/ppc/boot/em86real.S -- Small x86 emulator for video board setup
* em86real.S
*
* Copyright (C) 1998 Gabriel Paubert, paubert@iram.es
* Copyright (C) 1998, 1999 Gabriel Paubert, paubert@iram.es
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file COPYING in the main directory of this archive
* for more details.
* Modified to compile in RTEMS development environment
* by Eric Valette
*
* Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
*
* The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
/* If the symbol __BOOT__ is defined, a slightly different version is

17
c/src/lib/libbsp/powerpc/motorola_powerpc/bootloader/exception.S
View File

@@ -1,11 +1,18 @@
/*
* arch/ppc/loader/exceotion.S -- Exception handlers for early boot.
* exception.S -- Exception handlers for early boot.
*
* Copyright (C) 1998 Gabriel Paubert, paubert@iram.es
* Copyright (C) 1998, 1999 Gabriel Paubert, paubert@iram.es
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file COPYING in the main directory of this archive
* for more details.
* Modified to compile in RTEMS development environment
* by Eric Valette
*
* Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
*
* The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
/* This is an improved version of the TLB interrupt handling code from

17
c/src/lib/libbsp/powerpc/motorola_powerpc/bootloader/head.S
View File

@@ -1,9 +1,18 @@
/*
* $Id$
*
* This code is loaded by the ROM loader at some arbitrary location.
* Move it to high memory so that it can load the kernel at 0x0000.
* head.S -- Bootloader Entry point
*
* Copyright (C) 1998, 1999 Gabriel Paubert, paubert@iram.es
*
* Modified to compile in RTEMS development environment
* by Eric Valette
*
* Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
*
* The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#include "bootldr.h"

19
c/src/lib/libbsp/powerpc/motorola_powerpc/bootloader/misc.c
View File

@@ -1,15 +1,18 @@
/*
* arch/ppc/prepboot/misc.c
* head.S -- Bootloader Entry point
*
* Copyright (C) 1998 Gabriel Paubert, paubert@iram.es
* Copyright (C) 1998, 1999 Gabriel Paubert, paubert@iram.es
*
* This file is based on arch/ppc/boot misc.c in previous versions of
* Linux/PPC but has been so extensively changed that only a few lines
* remain from the original.
* Modified to compile in RTEMS development environment
* by Eric Valette
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file COPYING in the main directory of this archive
* for more details.
* Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
*
* The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#include <sys/types.h>

17
c/src/lib/libbsp/powerpc/motorola_powerpc/bootloader/mm.c
View File

@@ -1,11 +1,18 @@
/*
* arch/ppc/prepboot/mm.c -- Crude memory management for early boot.
* mm.c -- Crude memory management for early boot.
*
* Copyright (C) 1998 Gabriel Paubert, paubert@iram.es
* Copyright (C) 1998, 1999 Gabriel Paubert, paubert@iram.es
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file COPYING in the main directory of this archive
* for more details.
* Modified to compile in RTEMS development environment
* by Eric Valette
*
* Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
*
* The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
/* This code is a crude memory manager for early boot for LinuxPPC.

19
c/src/lib/libbsp/powerpc/motorola_powerpc/bootloader/pci.c
View File

@@ -1,15 +1,18 @@
/*
* arch/ppc/prepboot/pci.c -- Crude pci handling for early boot.
* pci.c -- Crude pci handling for early boot.
*
* Copyright (C) 1998 Gabriel Paubert, paubert@iram.es
* Copyright (C) 1998, 1999 Gabriel Paubert, paubert@iram.es
*
* The pci_scan_bus and pci_read_bases functions are slightly modified
* versions of functions with the same name in linux/drivers/pci.c by
* Martin Mares (mj@ucw.cz) and others (taken around linux-2.1.120).
* Modified to compile in RTEMS development environment
* by Eric Valette
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file COPYING in the main directory of this archive
* for more details.
* Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
*
* The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/

55
c/src/lib/libbsp/powerpc/motorola_powerpc/console/console.c
View File

@@ -1,37 +1,24 @@
/*-------------------------------------------------------------------------+
| console.c v1.1 - PC386 BSP - 1997/08/07
+--------------------------------------------------------------------------+
| This file contains the PC386 console I/O package.
+--------------------------------------------------------------------------+
| (C) Copyright 1997 -
| - NavIST Group - Real-Time Distributed Systems and Industrial Automation
|
| http://pandora.ist.utl.pt
|
| Instituto Superior Tecnico * Lisboa * PORTUGAL
+--------------------------------------------------------------------------+
| Disclaimer:
|
| This file is provided "AS IS" without warranty of any kind, either
| expressed or implied.
+--------------------------------------------------------------------------+
| This code is based on:
| console.c,v 1.4 1995/12/19 20:07:23 joel Exp - go32 BSP
| With the following copyright notice:
| **************************************************************************
| * COPYRIGHT (c) 1989-1998.
| * On-Line Applications Research Corporation (OAR).
| * Copyright assigned to U.S. Government, 1994.
| *
| * The license and distribution terms for this file may be
| * found in found in the file LICENSE in this distribution or at
| * http://www.OARcorp.com/rtems/license.html.
| **************************************************************************
|
| $Id$
+--------------------------------------------------------------------------*/
#include <stdio.h>
/*
* console.c -- console I/O package
*
* Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
*
* This code is based on the pc386 BSP console.c so the following
* copyright also applies :
*
* (C) Copyright 1997 -
* - NavIST Group - Real-Time Distributed Systems and Industrial Automation
*
* http://pandora.ist.utl.pt
*
* Instituto Superior Tecnico * Lisboa * PORTUGAL
* The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#include <stdlib.h>
#include <assert.h>
#undef __assert

12
c/src/lib/libbsp/powerpc/motorola_powerpc/console/consoleIo.h
View File

@@ -1,3 +1,15 @@
/*
* consoleIo.h -- console I/O package interface
*
* Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
*
* The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#ifndef __CONSOLE_IO_H
#define __CONSOLE_IO_H

14
c/src/lib/libbsp/powerpc/motorola_powerpc/console/consoleLib.S
View File

@@ -1,11 +1,17 @@
/*
* $Id$
*
* This code is loaded by the ROM loader at some arbitrary location.
* Move it to high memory so that it can load the kernel at 0x0000.
* consoleLib.S -- console I/O package utility functions.
*
* Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
*
* The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
/* A few utility functions, some copied from arch/ppc/lib/string.S */
#include <libcpu/cpu.h>
#include <rtems/score/targopts.h>
#include "asm.h"

51
c/src/lib/libbsp/powerpc/motorola_powerpc/console/inch.c
View File

@@ -1,34 +1,23 @@
/*-------------------------------------------------------------------------+
| inch.c v1.1 - PC386 BSP - 1997/08/07
+--------------------------------------------------------------------------+
| (C) Copyright 1997 -
| - NavIST Group - Real-Time Distributed Systems and Industrial Automation
|
| http://pandora.ist.utl.pt
|
| Instituto Superior Tecnico * Lisboa * PORTUGAL
+--------------------------------------------------------------------------+
| Disclaimer:
|
| This file is provided "AS IS" without warranty of any kind, either
| expressed or implied.
+--------------------------------------------------------------------------+
| This code is based on:
| inch.c,v 1.3 1995/12/19 20:07:25 joel Exp - go32 BSP
| With the following copyright notice:
| With the following copyright notice:
| **************************************************************************
| * COPYRIGHT (c) 1989-1998.
| * On-Line Applications Research Corporation (OAR).
| * Copyright assigned to U.S. Government, 1994.
| *
| * The license and distribution terms for this file may be
| * found in found in the file LICENSE in this distribution or at
| * http://www.OARcorp.com/rtems/license.html.
| **************************************************************************
|
| $Id$
+--------------------------------------------------------------------------*/
/*
* inch.c -- keyboard minimal driver
*
* Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
*
* This code is based on the pc386 BSP inch.c so the following
* copyright also applies :
*
* (C) Copyright 1997 -
* - NavIST Group - Real-Time Distributed Systems and Industrial Automation
*
* http://pandora.ist.utl.pt
*
* Instituto Superior Tecnico * Lisboa * PORTUGAL
* The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#include <bsp.h>
#include <bsp/irq.h>

12
c/src/lib/libbsp/powerpc/motorola_powerpc/console/keyboard.h
View File

@@ -1,3 +1,15 @@
/*
* keyboard.h -- keyboard definitions.
*
* Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
*
* The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#ifndef __LINUX_KEYBOARD_H
#define __LINUX_KEYBOARD_H

18
c/src/lib/libbsp/powerpc/motorola_powerpc/console/polled_io.c
View File

@@ -1,14 +1,18 @@
/*
* arch/ppc/prepboot/console.c
* polled_io.c -- Basic input/output for early boot
*
* Copyright (C) 1998 Gabriel Paubert, paubert@iram.es
* Copyright (C) 1998, 1999 Gabriel Paubert, paubert@iram.es
*
* This file is based on arch/ppc/boot/{kbd,vreset}.c in previous versions
* of Linux/PPC, mostly contributed by Gary Thomas and Cort Dougan.
* Modified to compile in RTEMS development environment
* by Eric Valette
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file COPYING in the main directory of this archive
* for more details.
* Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
*
* The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#include <sys/types.h>

10
c/src/lib/libbsp/powerpc/motorola_powerpc/include/bsp.h
View File

@@ -1,5 +1,13 @@
/*
* empty file. Just because referenced by portable application layer.
* bsp.h -- contain BSP API definition.
*
* Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
*
* The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#ifndef LIBBSP_POWERPC_MCP750_BSP_H
#define LIBBSP_POWERPC_MCP750_BSP_H

4
c/src/lib/libbsp/powerpc/motorola_powerpc/include/nvram.h
View File

@@ -1,5 +1,9 @@
/*
* PreP compliant NVRAM access
*
* This file can be found in motorla or IBP PPC site.
*
* $Id$
*/
#ifndef _PPC_NVRAM_H

9
c/src/lib/libbsp/powerpc/motorola_powerpc/irq/i8259.c
View File

@@ -1,9 +1,9 @@
/* i8259.c
*
/*
* This file contains the implementation of the function described in irq.h
* related to Intel 8259 Programmable Interrupt controller.
*
* CopyRight (C) 1998 valette@crf.canon.fr
* Copyright (C) 1998, 1999 valette@crf.canon.fr
*
* The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at
@@ -11,8 +11,7 @@
*
* $Id$
*/
#include <bsp.h>
#include <bsp/irq.h>

9
c/src/lib/libbsp/powerpc/motorola_powerpc/irq/irq.c
View File

@@ -1,8 +1,8 @@
/* irq.c
/*
*
* This file contains the implementation of the function described in irq.h
*
* CopyRight (C) 1998 valette@crf.canon.fr
* Copyright (C) 1998, 1999 valette@crf.canon.fr
*
* The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at
@@ -10,8 +10,7 @@
*
* $Id$
*/
#include <bsp.h>
#include <bsp/irq.h>
#include <bsp/openpic.h>
@@ -19,7 +18,7 @@
#include <rtems/score/apiext.h>
#include <libcpu/raw_exception.h>
#include <bsp/vectors.h>
#include <libcpu/processor.h>
#include <libcpu/cpu.h>
#define RAVEN_INTR_ACK_REG 0xfeff0030

11
c/src/lib/libbsp/powerpc/motorola_powerpc/irq/irq_asm.S
View File

@@ -1,15 +1,14 @@
/*
* (c) 1999, Eric Valette valette@crf.canon.fr
*
*
* This file contains the assembly code for the PowerPC
* IRQ veneers for RTEMS.
*
* The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#include <bsp/vectors.h>
#include <libcpu/cpu.h>
#include <libcpu/raw_exception.h>

18
c/src/lib/libbsp/powerpc/motorola_powerpc/openpic/openpic.c
View File

@@ -1,14 +1,20 @@
/*
* arch/ppc/kernel/openpic.c -- OpenPIC Interrupt Handling
* openpic.c -- OpenPIC Interrupt Handling
*
* Copyright (C) 1997 Geert Uytterhoeven
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file COPYING in the main directory of this archive
* for more details.
* Modified to compile in RTEMS development environment
* by Eric Valette
*
* Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
*
* The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
/*
* Note: Interprocessor Interrupt (IPI) and Timer support is incomplete
*/
@@ -20,8 +26,6 @@
#include <libcpu/io.h>
#include <libcpu/byteorder.h>
/* #include <asm/irq.h> */
#define NULL 0
#define REGISTER_DEBUG
#undef REGISTER_DEBUG

13
c/src/lib/libbsp/powerpc/motorola_powerpc/openpic/openpic.h
View File

@@ -1,5 +1,5 @@
/*
* linux/openpic.h -- OpenPIC definitions
* openpic.h -- OpenPIC definitions
*
* Copyright (C) 1997 Geert Uytterhoeven
*
@@ -21,6 +21,17 @@
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file COPYING in the main directory of this archive
* for more details.
*
* Modified to compile in RTEMS development environment
* by Eric Valette
*
* Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
*
* The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#ifndef _RTEMS_OPENPIC_H

18
c/src/lib/libbsp/powerpc/motorola_powerpc/pci/pci.c
View File

@@ -1,3 +1,21 @@
/*
* pci.c : this file contains basic PCI Io functions.
*
* CopyRight (C) 1999 valette@crf.canon.fr
*
* This code is heavilly inspired by the public specification of STREAM V2
* that can be found at :
*
* <http://www.chorus.com/Documentation/index.html> by following
* the STREAM API Specification Document link.
*
* The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#include <bsp/consoleIo.h>
#include <libcpu/io.h>
#include <bsp/pci.h>

2
c/src/lib/libbsp/powerpc/motorola_powerpc/pci/pci.h
View File

@@ -11,6 +11,8 @@
* PCI Local Bus Specification
* PCI to PCI Bridge Specification
* PCI System Design Guide
*
* $Id$
*/
#ifndef RTEMS_PCI_H

4
c/src/lib/libbsp/powerpc/motorola_powerpc/residual/pnp.h
View File

@@ -14,6 +14,10 @@
/* For enum's: if given in hex then they are bit significant, i.e. */
/* only one bit is on for each enum */
/*
* $Id$
*/
#ifndef _PNP_
#define _PNP_

15
c/src/lib/libbsp/powerpc/motorola_powerpc/residual/residual.c
View File

@@ -1,3 +1,18 @@
/*
* residual.c : function used to parse residual data.
*
* CopyRight (C) 1999 valette@crf.canon.fr
*
* This code is heavilly inspired by the public specification of STREAM V2
* that can be found at :
*
* The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#include <bsp/residual.h>
#include <libcpu/io.h>
#include <libcpu/byteorder.h>

4
c/src/lib/libbsp/powerpc/motorola_powerpc/residual/residual.h
View File

@@ -10,6 +10,10 @@
/* i.e. only one bit is on for each enum */
/* Reserved fields must be filled with zeros. */
/*
* $Id$
*/
#ifndef _RESIDUAL_
#define _RESIDUAL_

11
c/src/lib/libbsp/powerpc/motorola_powerpc/startup/bspstart.c
View File

@@ -12,6 +12,9 @@
* found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* Modified to support the MCP750.
* Modifications Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
*
* $Id$
*/
@@ -119,13 +122,17 @@ void bsp_libc_init( void *, unsigned32, int );
void bsp_pretasking_hook(void)
{
extern int end;
rtems_unsigned32 heap_start;
rtems_unsigned32 heap_start;
rtems_unsigned32 heap_size;
heap_start = ((rtems_unsigned32) &__rtems_end) +INIT_STACK_SIZE + INTR_STACK_SIZE;
if (heap_start & (CPU_ALIGNMENT-1))
heap_start = (heap_start + CPU_ALIGNMENT) & ~(CPU_ALIGNMENT-1);
bsp_libc_init((void *) heap_start, 64 * 1024, 0);
heap_size = (BSP_mem_size - heap_start) - BSP_Configuration.work_space_size;
printk(" HEAP start %x size %x\n", heap_start, heap_size);
bsp_libc_init((void *) heap_start, heap_size, 0);
#ifdef RTEMS_DEBUG
rtems_debug_enable( RTEMS_DEBUG_ALL_MASK );

121
c/src/lib/libbsp/powerpc/motorola_powerpc/startup/cEntry.c
View File

@@ -1,121 +0,0 @@
/*
*
*/
#include <bsp/consoleIo.h>
#include <libcpu/spr.h>
#include <bsp/residual.h>
#include <bsp/pci.h>
#include <bsp/openpic.h>
#include <bsp/irq.h>
#include <bsp.h>
#include <libcpu/bat.h>
extern void _return_to_ppcbug();
extern unsigned long __rtems_end;
RESIDUAL residualCopy;
#define INIT_STACK_SIZE 0x1000
#define INTR_STACK_SIZE 0x4000
void BSP_panic(char *s)
{
printk("RTEMS 4.x PANIC %s\n", s);
_return_to_ppcbug();
}
void _BSP_Fatal_error(unsigned int v)
{
printk("RTEMS 4.x PANIC ERROR %x\n", v);
_return_to_ppcbug();
}
void
boot_card(RESIDUAL* r3, void *r4, void* r5, char *additional_boot_options)
{
int err;
unsigned char *stack;
unsigned l2cr;
register unsigned char* intrStack;
register unsigned int intrNestingLevel = 0;
L1_caches_enables();
stack = ((unsigned char*) &__rtems_end) + INIT_STACK_SIZE;
intrStack = ((unsigned char*) &__rtems_end) + INIT_STACK_SIZE + INTR_STACK_SIZE;
asm volatile ("mtspr 273, %0" : "=r" (intrStack) : "0" (intrStack));
asm volatile ("mtspr 272, %0" : "=r" (intrNestingLevel) : "0" (intrNestingLevel));
residualCopy = *r3;
#define NO_DYNAMIC_EXCEPTION_VECTOR_INSTALL
#undef NO_DYNAMIC_EXCEPTION_VECTOR_INSTALL
#ifndef NO_DYNAMIC_EXCEPTION_VECTOR_INSTALL
initialize_exceptions();
#endif
select_console(CONSOLE_LOG);
/* We check that the keyboard is present and immediately
* select the serial console if not.
*/
err = kbdreset();
if (err) select_console(CONSOLE_SERIAL);
printk("Welcome to RTEMS 4.0.2 on Motorola MCP750\n\n\n");
printk("-----------------------------------------\n");
printk("Residuals are located at %x\n", (unsigned) r3);
printk("Additionnal boot options are %s\n", additional_boot_options);
printk("-----------------------------------------\n");
printk("Initial system stack at %x\n",stack);
l2cr = get_L2CR();
printk("Initial L2CR value = %x\n", l2cr);
if (! (l2cr & 0x80000000))
set_L2CR(0xb9A14000);
#ifdef TEST_RETURN_TO_PPCBUG
printk("Hit <Enter> to return to PPCBUG monitor\n");
printk("When Finished hit GO. It should print <Back from monitor>\n");
debug_getc();
_return_to_ppcbug();
printk("Back from monitor\n");
_return_to_ppcbug();
#endif /* TEST_RETURN_TO_PPCBUG */
/*
* Init MMU block address translation to enable hardware
* access
*/
/*
* PC legacy IO space used for inb/outb and all PC
* compatible hardware
*/
setdbat(1, 0x80000000, 0x80000000, 0x10000000, IO_PAGE);
/*
* PCI devices memory area. Needed to access OPENPIC features
* provided by the RAVEN
*/
setdbat(2, 0xc0000000, 0xc0000000, 0x08000000, IO_PAGE);
/*
* Must have acces to open pic PCI ACK registers
* provided by the RAVEN
*/
setdbat(3, 0xfeff0000, 0xfeff0000, 0x10000, IO_PAGE);
printk("Going to start PCI buses scanning and initialization\n");
InitializePCI();
printk("Number of PCI buses is found : %d\n", BusCountPCI());
#ifdef TEST_RAW_EXCEPTION_CODE
printk("Testing exception handling Part 1\n");
/*
* Cause a software exception
*/
__asm__ __volatile ("sc");
/*
* Check we can still catch exceptions
*/
printk("Testing exception handling Part 2\n");
__asm__ __volatile ("sc");
#endif
BSP_rtems_irq_mng_init(0);
printk("Init done\n");
debug_getc();
while(1);
}

14
c/src/lib/libbsp/powerpc/motorola_powerpc/vectors/vectors.h
View File

@@ -1,3 +1,17 @@
/*
* vectors.h Exception frame related contant and API.
*
* This include file describe the data structure and the functions implemented
* by rtems to handle exceptions.
*
* CopyRight (C) 1999 valette@crf.canon.fr
*
* The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#ifndef LIBBSP_POWERPC_MCP750_VECTORS_H
#define LIBBSP_POWERPC_MCP750_VECTORS_H

13
c/src/lib/libbsp/powerpc/motorola_powerpc/vectors/vectors_init.c
View File

@@ -1,5 +1,16 @@
/*
/*
* vectors_init.c Exception hanlding initialisation (and generic handler).
*
* This include file describe the data structure and the functions implemented
* by rtems to handle exceptions.
*
* CopyRight (C) 1999 valette@crf.canon.fr
*
* The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#include <bsp/vectors.h>
#include <libcpu/raw_exception.h>

2
c/src/lib/libbsp/powerpc/motorola_powerpc/wrapup/Makefile.in
View File

@@ -15,7 +15,7 @@ PROJECT_ROOT = @PROJECT_ROOT@
VPATH = @srcdir@
BSP_PIECES=console irq openpic pci residual startup vectors
BSP_PIECES=console irq openpic pci residual startup dec21140 vectors
GENERIC_PIECES=
# bummer; have to use $foreach since % pattern subst rules only replace 1x

3
c/src/lib/libcpu/powerpc/mpc750/clock/c_clock.c
View File

@@ -14,6 +14,9 @@
* the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* Modified to support the MPC750.
* Modifications Copyright (c) 1999 Eric Valette valette@crf.canon.fr
*
* $Id$
*/

8
c/src/lib/libcpu/powerpc/mpc750/mmu/mmuAsm.S
View File

@@ -8,15 +8,13 @@
* This file contains the low-level support for various MMU
* features.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
* The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
*/
#include <libcpu/cpu.h>
#include <libcpu/processor.h>
#include <libcpu/io.h>
#include <rtems/score/targopts.h>
#include "asm.h"

2
c/src/lib/libcpu/powerpc/shared/Makefile.in
View File

@@ -14,7 +14,7 @@ C_PIECES=
C_FILES=$(C_PIECES:%=%.c)
C_O_FILES=$(C_PIECES:%=${ARCH}/%.o)
H_FILES=$(srcdir)/cpu.h $(srcdir)/spr.h $(srcdir)/io.h $(srcdir)/mmu.h $(srcdir)/page.h $(srcdir)/byteorder.h $(srcdir)/pgtable.h $(srcdir)/processor.h
H_FILES=$(srcdir)/cpu.h $(srcdir)/spr.h $(srcdir)/io.h $(srcdir)/mmu.h $(srcdir)/page.h $(srcdir)/byteorder.h $(srcdir)/pgtable.h
# Assembly source names, if any, go here -- minus the .s
S_PIECES=

18
c/src/lib/libcpu/powerpc/shared/byteorder.h
View File

@@ -1,3 +1,21 @@
/*
* byteorder.h
*
* This file contains inline implementation of function to
* deal with endian conversion.
*
* It is a stripped down version of linux ppc file...
*
* Copyright (C) 1999 Eric Valette (valette@crf.canon.fr)
* Canon Centre Recherche France.
*
* The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#ifndef _PPC_BYTEORDER_H
#define _PPC_BYTEORDER_H

17
c/src/lib/libcpu/powerpc/shared/cpu.h
View File

@@ -1,3 +1,20 @@
/*
* cpu.h
*
* This file contains some powerpc MSR and registers access definitions.
*
* It is a stripped down version of linux ppc processor.h file...
*
* Copyright (C) 1999 Eric Valette (valette@crf.canon.fr)
* Canon Centre Recherche France.
*
* The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#ifndef __ASM_PPC_PROCESSOR_H
#define __ASM_PPC_PROCESSOR_H

17
c/src/lib/libcpu/powerpc/shared/io.h
View File

@@ -1,3 +1,20 @@
/*
* io.h
*
* This file contains inline implementation of function to
* deal with IO.
*
* It is a stripped down version of linux ppc file...
*
* Copyright (C) 1999 Eric Valette (valette@crf.canon.fr)
* Canon Centre Recherche France.
*
* The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#ifndef _LIBCPU_IO_H_
#define _LIBCPU_IO_H_

15
c/src/lib/libcpu/powerpc/shared/mmu.h
View File

@@ -1,5 +1,18 @@
/*
* PowerPC memory management structures
* mmu.h
*
* PowerPC memory management structures
*
* It is a stripped down version of linux ppc file...
*
* Copyright (C) 1999 Eric Valette (valette@crf.canon.fr)
* Canon Centre Recherche France.
*
* The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#ifndef _PPC_MMU_H_

17
c/src/lib/libcpu/powerpc/shared/page.h
View File

@@ -1,3 +1,20 @@
/*
* page.h
*
* PowerPC memory management structures
*
* It is a stripped down version of linux ppc file...
*
* Copyright (C) 1999 Eric Valette (valette@crf.canon.fr)
* Canon Centre Recherche France.
*
* The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#ifndef _PPC_PAGE_H
#define _PPC_PAGE_H

17
c/src/lib/libcpu/powerpc/shared/pgtable.h
View File

@@ -1,3 +1,20 @@
/*
* pgtable.h
*
* PowerPC memory management structures
*
* It is a stripped down version of linux ppc file...
*
* Copyright (C) 1999 Eric Valette (valette@crf.canon.fr)
* Canon Centre Recherche France.
*
* The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#ifndef _PPC_PGTABLE_H
#define _PPC_PGTABLE_H

162
c/src/lib/libcpu/powerpc/shared/processor.h
View File

@@ -1,162 +0,0 @@
#ifndef __ASM_PPC_PROCESSOR_H
#define __ASM_PPC_PROCESSOR_H
#include <bsp/residual.h>
/* Bit encodings for Machine State Register (MSR) */
#define MSR_POW (1<<18) /* Enable Power Management */
#define MSR_TGPR (1<<17) /* TLB Update registers in use */
#define MSR_ILE (1<<16) /* Interrupt Little-Endian enable */
#define MSR_EE (1<<15) /* External Interrupt enable */
#define MSR_PR (1<<14) /* Supervisor/User privilege */
#define MSR_FP (1<<13) /* Floating Point enable */
#define MSR_ME (1<<12) /* Machine Check enable */
#define MSR_FE0 (1<<11) /* Floating Exception mode 0 */
#define MSR_SE (1<<10) /* Single Step */
#define MSR_BE (1<<9) /* Branch Trace */
#define MSR_FE1 (1<<8) /* Floating Exception mode 1 */
#define MSR_IP (1<<6) /* Exception prefix 0x000/0xFFF */
#define MSR_IR (1<<5) /* Instruction MMU enable */
#define MSR_DR (1<<4) /* Data MMU enable */
#define MSR_RI (1<<1) /* Recoverable Exception */
#define MSR_LE (1<<0) /* Little-Endian enable */
#define MSR_ MSR_ME|MSR_RI
#define MSR_KERNEL MSR_|MSR_IR|MSR_DR
#define MSR_USER MSR_KERNEL|MSR_PR|MSR_EE
/* Bit encodings for Hardware Implementation Register (HID0)
on PowerPC 603, 604, etc. processors (not 601). */
#define HID0_EMCP (1<<31) /* Enable Machine Check pin */
#define HID0_EBA (1<<29) /* Enable Bus Address Parity */
#define HID0_EBD (1<<28) /* Enable Bus Data Parity */
#define HID0_SBCLK (1<<27)
#define HID0_EICE (1<<26)
#define HID0_ECLK (1<<25)
#define HID0_PAR (1<<24)
#define HID0_DOZE (1<<23)
#define HID0_NAP (1<<22)
#define HID0_SLEEP (1<<21)
#define HID0_DPM (1<<20)
#define HID0_ICE (1<<15) /* Instruction Cache Enable */
#define HID0_DCE (1<<14) /* Data Cache Enable */
#define HID0_ILOCK (1<<13) /* Instruction Cache Lock */
#define HID0_DLOCK (1<<12) /* Data Cache Lock */
#define HID0_ICFI (1<<11) /* Instruction Cache Flash Invalidate */
#define HID0_DCI (1<<10) /* Data Cache Invalidate */
#define HID0_SIED (1<<7) /* Serial Instruction Execution [Disable] */
#define HID0_BHTE (1<<2) /* Branch History Table Enable */
#define HID0_BTCD (1<<1) /* Branch target cache disable */
/* fpscr settings */
#define FPSCR_FX (1<<31)
#define FPSCR_FEX (1<<30)
#define _MACH_prep 1
#define _MACH_Pmac 2 /* pmac or pmac clone (non-chrp) */
#define _MACH_chrp 4 /* chrp machine */
#define _MACH_mbx 8 /* Motorola MBX board */
#define _MACH_apus 16 /* amiga with phase5 powerup */
#define _MACH_fads 32 /* Motorola FADS board */
/* see residual.h for these */
#define _PREP_Motorola 0x01 /* motorola prep */
#define _PREP_Firm 0x02 /* firmworks prep */
#define _PREP_IBM 0x00 /* ibm prep */
#define _PREP_Bull 0x03 /* bull prep */
/* these are arbitrary */
#define _CHRP_Motorola 0x04 /* motorola chrp, the cobra */
#define _CHRP_IBM 0x05 /* IBM chrp, the longtrail and longtrail 2 */
#define _GLOBAL(n)\
.globl n;\
n:
#define TBRU 269 /* Time base Upper/Lower (Reading) */
#define TBRL 268
#define TBWU 284 /* Time base Upper/Lower (Writing) */
#define TBWL 285
#define XER 1
#define LR 8
#define CTR 9
#define HID0 1008 /* Hardware Implementation */
#define PVR 287 /* Processor Version */
#define IBAT0U 528 /* Instruction BAT #0 Upper/Lower */
#define IBAT0L 529
#define IBAT1U 530 /* Instruction BAT #1 Upper/Lower */
#define IBAT1L 531
#define IBAT2U 532 /* Instruction BAT #2 Upper/Lower */
#define IBAT2L 533
#define IBAT3U 534 /* Instruction BAT #3 Upper/Lower */
#define IBAT3L 535
#define DBAT0U 536 /* Data BAT #0 Upper/Lower */
#define DBAT0L 537
#define DBAT1U 538 /* Data BAT #1 Upper/Lower */
#define DBAT1L 539
#define DBAT2U 540 /* Data BAT #2 Upper/Lower */
#define DBAT2L 541
#define DBAT3U 542 /* Data BAT #3 Upper/Lower */
#define DBAT3L 543
#define DMISS 976 /* TLB Lookup/Refresh registers */
#define DCMP 977
#define HASH1 978
#define HASH2 979
#define IMISS 980
#define ICMP 981
#define RPA 982
#define SDR1 25 /* MMU hash base register */
#define DAR 19 /* Data Address Register */
#define SPR0 272 /* Supervisor Private Registers */
#define SPRG0 272
#define SPR1 273
#define SPRG1 273
#define SPR2 274
#define SPRG2 274
#define SPR3 275
#define SPRG3 275
#define DSISR 18
#define SRR0 26 /* Saved Registers (exception) */
#define SRR1 27
#define IABR 1010 /* Instruction Address Breakpoint */
#define DEC 22 /* Decrementer */
#define EAR 282 /* External Address Register */
#define L2CR 1017 /* PPC 750 L2 control register */
#define THRM1 1020
#define THRM2 1021
#define THRM3 1022
#define THRM1_TIN 0x1
#define THRM1_TIV 0x2
#define THRM1_THRES (0x7f<<2)
#define THRM1_TID (1<<29)
#define THRM1_TIE (1<<30)
#define THRM1_V (1<<31)
#define THRM3_E (1<<31)
/* Segment Registers */
#define SR0 0
#define SR1 1
#define SR2 2
#define SR3 3
#define SR4 4
#define SR5 5
#define SR6 6
#define SR7 7
#define SR8 8
#define SR9 9
#define SR10 10
#define SR11 11
#define SR12 12
#define SR13 13
#define SR14 14
#define SR15 15
#endif /* __ASM_PPC_PROCESSOR_H */

16
c/src/lib/libcpu/powerpc/shared/spr.h
View File

@@ -1,11 +1,19 @@
/*
* include/asm-ppc/spr.h -- Access to special purpose registers.
* spr.h -- Access to special purpose registers.
*
* Copyright (C) 1998 Gabriel Paubert, paubert@iram.es
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file COPYING in the main directory of this archive
* for more details.
* Modified to compile in RTEMS development environment
* by Eric Valette
*
* Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
*
* The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*
*/