forked from Imagelibrary/rtems
bsps: Move start files to bsps
This patch is a part of the BSP source reorganization. Update #3285.
This commit is contained in:
43
bsps/nios2/nios2_iss/start/crtnn.S
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43
bsps/nios2/nios2_iss/start/crtnn.S
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/* NIOS2 crtn.asm fix
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*
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* COPYRIGHT (c) 2005-2006 Kolja Waschk rtemsdev/ixo.de
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rtems.org/license/LICENSE.
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*/
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/* Can't use the original crtn.asm from Altera because it doesn't
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restore the stack pointer correctly (in 5.1b73, the stack pointer
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is further decreased by 48 instead of increased). This is named
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differently (crtnn instead crtn) to make sure it can be picked up
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using custom gcc specs instead of gcc's crtn. - kawk */
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.section .init
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ldw ra, 44(sp)
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ldw r23, 40(sp)
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ldw r22, 36(sp)
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ldw r21, 32(sp)
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ldw r20, 28(sp)
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ldw r19, 24(sp)
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ldw r18, 20(sp)
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ldw r17, 16(sp)
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ldw r16, 12(sp)
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ldw fp, 8(sp)
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addi sp, sp, 48
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ret
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.section .fini
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ldw ra, 44(sp)
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ldw r23, 40(sp)
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ldw r22, 36(sp)
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ldw r21, 32(sp)
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ldw r20, 28(sp)
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ldw r19, 24(sp)
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ldw r18, 20(sp)
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ldw r17, 16(sp)
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ldw r16, 12(sp)
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ldw fp, 8(sp)
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addi sp, sp, 48
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ret
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122
bsps/nios2/nios2_iss/start/start.S
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122
bsps/nios2/nios2_iss/start/start.S
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@@ -0,0 +1,122 @@
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/* NIOS2 startup code
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*
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* This is the entry point on reset and when loading the
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* executive from a bootloader.
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*
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* COPYRIGHT (c) 2005-2006 Kolja Waschk rtemsdev/ixo.de
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rtems.org/license/LICENSE.
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*/
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.section .entry
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.align 3
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movhi et, %hiadj(start)
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addi et, et, %lo(start)
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jmp et
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.section .irq
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.align 3
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movhi et, %hiadj(_exception_vector)
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addi et, et, %lo(_exception_vector)
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jmp et
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.section .text
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.align 3
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.globl start
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.type start,@function
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.extern _exception_vector
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start:
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#------------------------------------------------------
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# disable interrupts
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wrctl status, zero
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wrctl ienable, zero
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#------------------------------------------------------
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# invalidate instruction cache
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mov r2, r0
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movhi r3, %hi(__nios2_icache_size)
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ori r3, r3, %lo(__nios2_icache_size)
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icache_init_loop:
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initi r2
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addi r2, r2, __nios2_icache_line_size
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bltu r2, r3, icache_init_loop
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#------------------------------------------------------
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# invalidate data cache
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mov r2, r0
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movhi r3, %hi(__nios2_dcache_size)
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ori r3, r3, %lo(__nios2_dcache_size)
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dcache_init_loop:
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initd 0(r2)
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addi r2, r2, __nios2_dcache_line_size
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bltu r2, r3, dcache_init_loop
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#------------------------------------------------------
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# initialize stack pointer
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movhi sp, %hiadj(__alt_stack_pointer - 4)
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addi sp, sp, %lo(__alt_stack_pointer - 4)
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# initialize global pointer
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movhi gp, %hiadj(_gp)
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addi gp, gp, %lo(_gp)
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# initialize exception tmp register
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movhi et, %hiadj(_end)
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addi et, et, %lo(_end)
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#------------------------------------------------------
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# TODO: copy data from flash to RAM, if not there already
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# For now its save to assume it is there already when we're
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# loading code though JTAG into RAM-only system
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# at least copy exception code to right place
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movhi r2, %hiadj(__ram_exceptions_start)
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addi r2, r2, %lo(__ram_exceptions_start)
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movhi r3, %hiadj(brto_ev)
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addi r3, r3, %lo(brto_ev)
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ldw r4, 0(r3)
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stw r4, 0(r2)
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ldw r4, 4(r3)
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stw r4, 4(r2)
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ldw r4, 8(r3)
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stw r4, 8(r2)
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ldw r4, 12(r3)
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stw r4, 12(r2)
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#------------------------------------------------------
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# clear bss
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movhi r2, %hiadj(__bss_start)
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addi r2, r2, %lo(__bss_start)
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movhi r3, %hiadj(__bss_end)
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addi r3, r3, %lo(__bss_end)
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beq r2, r3, 1f
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0:
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stw zero, (r2)
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addi r2, r2, 4
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bltu r2, r3, 0b
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1:
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#------------------------------------------------------
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# jump to (shared) boot_card (never comes back)
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mov r4, zero
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mov r5, zero
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mov r6, zero
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call boot_card
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# but just in case it does come back, stick here.
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_stuck_in_start:
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br _stuck_in_start
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#------------------------------------------------------
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# code to be placed at exception address
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brto_ev:
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movhi et, %hiadj(_exception_vector)
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addi et, et, %lo(_exception_vector)
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jmp et
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