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2007-09-12 Joel Sherrill <joel.sherrill@OARcorp.com>

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PR 1257/bsps
	* mpc5xx/exceptions/raw_exception.c, mpc5xx/irq/irq.c,
	mpc6xx/exceptions/raw_exception.c,
	mpc8260/exceptions/raw_exception.c,
	mpc8xx/exceptions/raw_exception.c, new-exceptions/raw_exception.c,
	ppc403/ictrl/ictrl.c, ppc403/irq/ictrl.c: Code outside of cpukit
	should use the public API for
	rtems_interrupt_disable/rtems_interrupt_enable. By bypassing the
	public API and directly accessing _CPU_ISR_Disable and
	_CPU_ISR_Enable, they were bypassing the compiler memory barrier
	directive which could lead to problems. This patch also changes the
	type of the variable passed into these routines and addresses minor
	style issues.
This commit is contained in:
Joel Sherrill
2007-09-12 15:23:44 +00:00
parent 23f19746d4
commit f93630db63
9 changed files with 94 additions and 75 deletions
Download Patch File Download Diff File Expand all files Collapse all files

20
c/src/lib/libcpu/powerpc/mpc8260/exceptions/raw_exception.c
View File

@@ -80,7 +80,7 @@ int mpc8xx_vector_is_valid(rtems_vector vector)
int mpc8xx_set_exception (const rtems_raw_except_connect_data* except)
{
unsigned int level;
rtems_interrupt_level level;
if (!mpc8xx_vector_is_valid(except->exceptIndex)) {
return 0;
@@ -96,7 +96,7 @@ int mpc8xx_set_exception (const rtems_raw_except_connect_data* except)
return 0;
}
_CPU_ISR_Disable(level);
rtems_interrupt_disable(level);
raw_except_table [except->exceptIndex] = *except;
/*
@@ -112,7 +112,7 @@ int mpc8xx_set_exception (const rtems_raw_except_connect_data* except)
except->on(except);
_CPU_ISR_Enable(level);
rtems_interrupt_enable(level);
return 1;
}
@@ -129,7 +129,7 @@ int mpc8xx_get_current_exception (rtems_raw_except_connect_data* except)
int mpc8xx_delete_exception (const rtems_raw_except_connect_data* except)
{
unsigned int level;
rtems_interrupt_level level;
if (!mpc8xx_vector_is_valid(except->exceptIndex)){
return 0;
@@ -146,7 +146,7 @@ int mpc8xx_delete_exception (const rtems_raw_except_connect_data* except)
except->hdl.raw_hdl_size)) {
return 0;
}
_CPU_ISR_Disable(level);
rtems_interrupt_disable(level);
except->off(except);
codemove((void*)mpc8xx_get_vector_addr(except->exceptIndex),
@@ -158,7 +158,7 @@ int mpc8xx_delete_exception (const rtems_raw_except_connect_data* except)
raw_except_table[except->exceptIndex] = default_raw_except_entry;
raw_except_table[except->exceptIndex].exceptIndex = except->exceptIndex;
_CPU_ISR_Enable(level);
rtems_interrupt_enable(level);
return 1;
}
@@ -168,8 +168,8 @@ int mpc8xx_delete_exception (const rtems_raw_except_connect_data* except)
*/
int mpc8xx_init_exceptions (rtems_raw_except_global_settings* config)
{
unsigned i;
unsigned int level;
int i;
rtems_interrupt_level level;
/*
* store various accelerators
@@ -178,7 +178,7 @@ int mpc8xx_init_exceptions (rtems_raw_except_global_settings* config)
local_settings = config;
default_raw_except_entry = config->defaultRawEntry;
_CPU_ISR_Disable(level);
rtems_interrupt_disable(level);
for (i=0; i <= LAST_VALID_EXC; i++) {
if (!mpc8xx_vector_is_valid(i)){
@@ -195,7 +195,7 @@ int mpc8xx_init_exceptions (rtems_raw_except_global_settings* config)
raw_except_table[i].off(&raw_except_table[i]);
}
}
_CPU_ISR_Enable(level);
rtems_interrupt_enable(level);
return 1;
}