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2007-09-12 Joel Sherrill <joel.sherrill@OARcorp.com>

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PR 1257/bsps
	* mpc5xx/exceptions/raw_exception.c, mpc5xx/irq/irq.c,
	mpc6xx/exceptions/raw_exception.c,
	mpc8260/exceptions/raw_exception.c,
	mpc8xx/exceptions/raw_exception.c, new-exceptions/raw_exception.c,
	ppc403/ictrl/ictrl.c, ppc403/irq/ictrl.c: Code outside of cpukit
	should use the public API for
	rtems_interrupt_disable/rtems_interrupt_enable. By bypassing the
	public API and directly accessing _CPU_ISR_Disable and
	_CPU_ISR_Enable, they were bypassing the compiler memory barrier
	directive which could lead to problems. This patch also changes the
	type of the variable passed into these routines and addresses minor
	style issues.
This commit is contained in:
Joel Sherrill
2007-09-12 15:23:44 +00:00
parent 23f19746d4
commit f93630db63
9 changed files with 94 additions and 75 deletions
Download Patch File Download Diff File Expand all files Collapse all files

16
c/src/lib/libcpu/powerpc/ChangeLog
View File

@@ -1,3 +1,19 @@
2007-09-12 Joel Sherrill <joel.sherrill@OARcorp.com>
PR 1257/bsps
* mpc5xx/exceptions/raw_exception.c, mpc5xx/irq/irq.c,
mpc6xx/exceptions/raw_exception.c,
mpc8260/exceptions/raw_exception.c,
mpc8xx/exceptions/raw_exception.c, new-exceptions/raw_exception.c,
ppc403/ictrl/ictrl.c, ppc403/irq/ictrl.c: Code outside of cpukit
should use the public API for
rtems_interrupt_disable/rtems_interrupt_enable. By bypassing the
public API and directly accessing _CPU_ISR_Disable and
_CPU_ISR_Enable, they were bypassing the compiler memory barrier
directive which could lead to problems. This patch also changes the
type of the variable passed into these routines and addresses minor
style issues.
2007-09-11 Joel Sherrill <joel.sherrill@OARcorp.com>
* Makefile.am, configure.ac: Do not build networking drivers if

24
c/src/lib/libcpu/powerpc/mpc5xx/exceptions/raw_exception.c
View File

@@ -20,11 +20,9 @@
* found in found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*
* $Id$
*/
#include <rtems/system.h>
#include <rtems/score/cpu.h>
#include <rtems.h>
#include <rtems/score/powerpc.h>
#include <libcpu/raw_exception.h>
#include <libcpu/cpuIdent.h>
@@ -75,7 +73,7 @@ int mpc5xx_vector_is_valid(rtems_vector vector)
int mpc5xx_set_exception (const rtems_raw_except_connect_data* except)
{
unsigned int level;
rtems_interrupt_level level;
if (!mpc5xx_vector_is_valid(except->exceptIndex)) {
return 0;
@@ -92,14 +90,14 @@ int mpc5xx_set_exception (const rtems_raw_except_connect_data* except)
return 0;
}
_CPU_ISR_Disable(level);
rtems_interrupt_disable(level);
raw_except_table[except->exceptIndex] = *except;
exception_handler_table[except->exceptIndex] = except->hdl.raw_hdl;
except->on(except);
_CPU_ISR_Enable(level);
rtems_interrupt_enable(level);
return 1;
}
@@ -116,7 +114,7 @@ int mpc5xx_get_current_exception (rtems_raw_except_connect_data* except)
int mpc5xx_delete_exception (const rtems_raw_except_connect_data* except)
{
unsigned int level;
rtems_interrupt_level level;
if (!mpc5xx_vector_is_valid(except->exceptIndex)){
return 0;
@@ -132,7 +130,7 @@ int mpc5xx_delete_exception (const rtems_raw_except_connect_data* except)
return 0;
}
_CPU_ISR_Disable(level);
rtems_interrupt_disable(level);
except->off(except);
exception_handler_table[except->exceptIndex] =
@@ -141,7 +139,7 @@ int mpc5xx_delete_exception (const rtems_raw_except_connect_data* except)
raw_except_table[except->exceptIndex] = default_raw_except_entry;
raw_except_table[except->exceptIndex].exceptIndex = except->exceptIndex;
_CPU_ISR_Enable(level);
rtems_interrupt_enable(level);
return 1;
}
@@ -154,8 +152,8 @@ int mpc5xx_delete_exception (const rtems_raw_except_connect_data* except)
*/
int mpc5xx_init_exceptions (rtems_raw_except_global_settings* config)
{
unsigned i;
unsigned int level;
unsigned i;
rtems_interrupt_level level;
/*
* store various accelerators
@@ -164,7 +162,7 @@ int mpc5xx_init_exceptions (rtems_raw_except_global_settings* config)
local_settings = config;
default_raw_except_entry = config->defaultRawEntry;
_CPU_ISR_Disable(level);
rtems_interrupt_disable(level);
for (i = 0; i < NUM_EXCEPTIONS; i++) {
exception_handler_table[i] = raw_except_table[i].hdl.raw_hdl;
@@ -176,7 +174,7 @@ int mpc5xx_init_exceptions (rtems_raw_except_global_settings* config)
raw_except_table[i].off(&raw_except_table[i]);
}
}
_CPU_ISR_Enable(level);
rtems_interrupt_enable(level);
return 1;
}

20
c/src/lib/libcpu/powerpc/mpc5xx/irq/irq.c
View File

@@ -206,7 +206,7 @@ int CPU_irq_enabled_at_usiu(const rtems_irq_number irqLine)
int CPU_install_rtems_irq_handler (const rtems_irq_connect_data* irq)
{
unsigned int level;
rtems_interrupt_level level;
if (!isValidInterrupt(irq->name)) {
return 0;
@@ -222,7 +222,7 @@ int CPU_install_rtems_irq_handler (const rtems_irq_connect_data* irq)
return 0;
}
_CPU_ISR_Disable(level);
rtems_interrupt_disable(level);
/*
* store the data provided by user
@@ -254,7 +254,7 @@ int CPU_install_rtems_irq_handler (const rtems_irq_connect_data* irq)
*/
irq->on(irq);
_CPU_ISR_Enable(level);
rtems_interrupt_enable(level);
return 1;
}
@@ -271,7 +271,7 @@ int CPU_get_current_rtems_irq_handler (rtems_irq_connect_data* irq)
int CPU_remove_rtems_irq_handler (const rtems_irq_connect_data* irq)
{
unsigned int level;
rtems_interrupt_level level;
if (!isValidInterrupt(irq->name)) {
return 0;
@@ -286,7 +286,7 @@ int CPU_remove_rtems_irq_handler (const rtems_irq_connect_data* irq)
if (rtems_hdl_tbl[irq->name].hdl != irq->hdl) {
return 0;
}
_CPU_ISR_Disable(level);
rtems_interrupt_disable(level);
/*
* Disable interrupt on device
@@ -316,7 +316,7 @@ int CPU_remove_rtems_irq_handler (const rtems_irq_connect_data* irq)
*/
rtems_hdl_tbl[irq->name] = default_rtems_entry;
_CPU_ISR_Enable(level);
rtems_interrupt_enable(level);
return 1;
}
@@ -327,8 +327,8 @@ int CPU_remove_rtems_irq_handler (const rtems_irq_connect_data* irq)
int CPU_rtems_irq_mngt_set (rtems_irq_global_settings* config)
{
int i;
unsigned int level;
int i;
rtems_interrupt_level level;
/*
* Store various code accelerators
@@ -337,7 +337,7 @@ int CPU_rtems_irq_mngt_set (rtems_irq_global_settings* config)
default_rtems_entry = config->defaultEntry;
rtems_hdl_tbl = config->irqHdlTbl;
_CPU_ISR_Disable(level);
rtems_interrupt_disable(level);
/*
* Start with UIMB IRQ
@@ -387,7 +387,7 @@ int CPU_rtems_irq_mngt_set (rtems_irq_global_settings* config)
rtems_hdl_tbl[i].off(&rtems_hdl_tbl[i]);
}
}
_CPU_ISR_Enable(level);
rtems_interrupt_enable(level);
return 1;
}

20
c/src/lib/libcpu/powerpc/mpc6xx/exceptions/raw_exception.c
View File

@@ -224,7 +224,7 @@ int mpc60x_vector_is_valid(rtems_vector vector)
int mpc60x_set_exception (const rtems_raw_except_connect_data* except)
{
unsigned int level;
rtems_interrupt_level level;
if (!mpc60x_vector_is_valid(except->exceptIndex)) {
printk("mpc60x_set_exception: vector %d is not valid\n",
@@ -246,7 +246,7 @@ int mpc60x_set_exception (const rtems_raw_except_connect_data* except)
return 0;
}
_CPU_ISR_Disable(level);
rtems_interrupt_disable(level);
raw_except_table [except->exceptIndex] = *except;
codemove((void*)mpc60x_get_vector_addr(except->exceptIndex),
@@ -255,7 +255,7 @@ int mpc60x_set_exception (const rtems_raw_except_connect_data* except)
PPC_CACHE_ALIGNMENT);
except->on(except);
_CPU_ISR_Enable(level);
rtems_interrupt_enable(level);
return 1;
}
@@ -272,7 +272,7 @@ int mpc60x_get_current_exception (rtems_raw_except_connect_data* except)
int mpc60x_delete_exception (const rtems_raw_except_connect_data* except)
{
unsigned int level;
rtems_interrupt_level level;
if (!mpc60x_vector_is_valid(except->exceptIndex)){
return 0;
@@ -289,7 +289,7 @@ int mpc60x_delete_exception (const rtems_raw_except_connect_data* except)
except->hdl.raw_hdl_size)) {
return 0;
}
_CPU_ISR_Disable(level);
rtems_interrupt_disable(level);
except->off(except);
codemove((void*)mpc60x_get_vector_addr(except->exceptIndex),
@@ -301,7 +301,7 @@ int mpc60x_delete_exception (const rtems_raw_except_connect_data* except)
raw_except_table[except->exceptIndex] = default_raw_except_entry;
raw_except_table[except->exceptIndex].exceptIndex = except->exceptIndex;
_CPU_ISR_Enable(level);
rtems_interrupt_enable(level);
return 1;
}
@@ -311,8 +311,8 @@ int mpc60x_delete_exception (const rtems_raw_except_connect_data* except)
*/
int mpc60x_init_exceptions (rtems_raw_except_global_settings* config)
{
unsigned i;
unsigned int level;
int i;
rtems_interrupt_level level;
/*
* store various accelerators
@@ -321,7 +321,7 @@ int mpc60x_init_exceptions (rtems_raw_except_global_settings* config)
local_settings = config;
default_raw_except_entry = config->defaultRawEntry;
_CPU_ISR_Disable(level);
rtems_interrupt_disable(level);
for (i=0; i <= LAST_VALID_EXC; i++) {
if (!mpc60x_vector_is_valid(i)){
@@ -338,7 +338,7 @@ int mpc60x_init_exceptions (rtems_raw_except_global_settings* config)
raw_except_table[i].off(&raw_except_table[i]);
}
}
_CPU_ISR_Enable(level);
rtems_interrupt_enable(level);
return 1;
}

20
c/src/lib/libcpu/powerpc/mpc8260/exceptions/raw_exception.c
View File

@@ -80,7 +80,7 @@ int mpc8xx_vector_is_valid(rtems_vector vector)
int mpc8xx_set_exception (const rtems_raw_except_connect_data* except)
{
unsigned int level;
rtems_interrupt_level level;
if (!mpc8xx_vector_is_valid(except->exceptIndex)) {
return 0;
@@ -96,7 +96,7 @@ int mpc8xx_set_exception (const rtems_raw_except_connect_data* except)
return 0;
}
_CPU_ISR_Disable(level);
rtems_interrupt_disable(level);
raw_except_table [except->exceptIndex] = *except;
/*
@@ -112,7 +112,7 @@ int mpc8xx_set_exception (const rtems_raw_except_connect_data* except)
except->on(except);
_CPU_ISR_Enable(level);
rtems_interrupt_enable(level);
return 1;
}
@@ -129,7 +129,7 @@ int mpc8xx_get_current_exception (rtems_raw_except_connect_data* except)
int mpc8xx_delete_exception (const rtems_raw_except_connect_data* except)
{
unsigned int level;
rtems_interrupt_level level;
if (!mpc8xx_vector_is_valid(except->exceptIndex)){
return 0;
@@ -146,7 +146,7 @@ int mpc8xx_delete_exception (const rtems_raw_except_connect_data* except)
except->hdl.raw_hdl_size)) {
return 0;
}
_CPU_ISR_Disable(level);
rtems_interrupt_disable(level);
except->off(except);
codemove((void*)mpc8xx_get_vector_addr(except->exceptIndex),
@@ -158,7 +158,7 @@ int mpc8xx_delete_exception (const rtems_raw_except_connect_data* except)
raw_except_table[except->exceptIndex] = default_raw_except_entry;
raw_except_table[except->exceptIndex].exceptIndex = except->exceptIndex;
_CPU_ISR_Enable(level);
rtems_interrupt_enable(level);
return 1;
}
@@ -168,8 +168,8 @@ int mpc8xx_delete_exception (const rtems_raw_except_connect_data* except)
*/
int mpc8xx_init_exceptions (rtems_raw_except_global_settings* config)
{
unsigned i;
unsigned int level;
int i;
rtems_interrupt_level level;
/*
* store various accelerators
@@ -178,7 +178,7 @@ int mpc8xx_init_exceptions (rtems_raw_except_global_settings* config)
local_settings = config;
default_raw_except_entry = config->defaultRawEntry;
_CPU_ISR_Disable(level);
rtems_interrupt_disable(level);
for (i=0; i <= LAST_VALID_EXC; i++) {
if (!mpc8xx_vector_is_valid(i)){
@@ -195,7 +195,7 @@ int mpc8xx_init_exceptions (rtems_raw_except_global_settings* config)
raw_except_table[i].off(&raw_except_table[i]);
}
}
_CPU_ISR_Enable(level);
rtems_interrupt_enable(level);
return 1;
}

20
c/src/lib/libcpu/powerpc/mpc8xx/exceptions/raw_exception.c
View File

@@ -82,7 +82,7 @@ int mpc8xx_vector_is_valid(rtems_vector vector)
int mpc8xx_set_exception (const rtems_raw_except_connect_data* except)
{
unsigned int level;
rtems_interrupt_level level;
if (!mpc8xx_vector_is_valid(except->exceptIndex)) {
return 0;
@@ -98,7 +98,7 @@ int mpc8xx_set_exception (const rtems_raw_except_connect_data* except)
return 0;
}
_CPU_ISR_Disable(level);
rtems_interrupt_disable(level);
raw_except_table [except->exceptIndex] = *except;
codemove((void*)mpc8xx_get_vector_addr(except->exceptIndex),
@@ -107,7 +107,7 @@ int mpc8xx_set_exception (const rtems_raw_except_connect_data* except)
PPC_CACHE_ALIGNMENT);
except->on(except);
_CPU_ISR_Enable(level);
rtems_interrupt_enable(level);
return 1;
}
@@ -124,7 +124,7 @@ int mpc8xx_get_current_exception (rtems_raw_except_connect_data* except)
int mpc8xx_delete_exception (const rtems_raw_except_connect_data* except)
{
unsigned int level;
rtems_interrupt_level level;
if (!mpc8xx_vector_is_valid(except->exceptIndex)){
return 0;
@@ -141,7 +141,7 @@ int mpc8xx_delete_exception (const rtems_raw_except_connect_data* except)
except->hdl.raw_hdl_size)) {
return 0;
}
_CPU_ISR_Disable(level);
rtems_interrupt_disable(level);
except->off(except);
codemove((void*)mpc8xx_get_vector_addr(except->exceptIndex),
@@ -153,7 +153,7 @@ int mpc8xx_delete_exception (const rtems_raw_except_connect_data* except)
raw_except_table[except->exceptIndex] = default_raw_except_entry;
raw_except_table[except->exceptIndex].exceptIndex = except->exceptIndex;
_CPU_ISR_Enable(level);
rtems_interrupt_enable(level);
return 1;
}
@@ -163,8 +163,8 @@ int mpc8xx_delete_exception (const rtems_raw_except_connect_data* except)
*/
int mpc8xx_init_exceptions (rtems_raw_except_global_settings* config)
{
unsigned i;
unsigned int level;
int i;
rtems_interrupt_level level;
/*
* store various accelerators
@@ -173,7 +173,7 @@ int mpc8xx_init_exceptions (rtems_raw_except_global_settings* config)
local_settings = config;
default_raw_except_entry = config->defaultRawEntry;
_CPU_ISR_Disable(level);
rtems_interrupt_disable(level);
for (i=0; i <= LAST_VALID_EXC; i++) {
if (!mpc8xx_vector_is_valid(i)){
@@ -190,7 +190,7 @@ int mpc8xx_init_exceptions (rtems_raw_except_global_settings* config)
raw_except_table[i].off(&raw_except_table[i]);
}
}
_CPU_ISR_Enable(level);
rtems_interrupt_enable(level);
return 1;
}

21
c/src/lib/libcpu/powerpc/new-exceptions/raw_exception.c
View File

@@ -26,6 +26,7 @@
*/
#include <rtems/system.h>
#include <rtems/score/powerpc.h>
#include <rtems/score/isr.h>
#include <rtems/bspIo.h>
#include <libcpu/raw_exception.h>
#include <libcpu/cpuIdent.h>
@@ -385,7 +386,7 @@ int ppc_vector_is_valid(rtems_vector vector)
int ppc_set_exception (const rtems_raw_except_connect_data* except)
{
unsigned int level;
ISR_Level level;
if (!ppc_vector_is_valid(except->exceptIndex)) {
printk("ppc_set_exception: vector %d is not valid\n",
@@ -407,7 +408,7 @@ int ppc_set_exception (const rtems_raw_except_connect_data* except)
return 0;
}
_CPU_ISR_Disable(level);
_ISR_Disable(level);
raw_except_table [except->exceptIndex] = *except;
codemove((void*)ppc_get_vector_addr(except->exceptIndex),
@@ -416,7 +417,7 @@ int ppc_set_exception (const rtems_raw_except_connect_data* except)
PPC_CACHE_ALIGNMENT);
except->on(except);
_CPU_ISR_Enable(level);
_ISR_Enable(level);
return 1;
}
@@ -433,7 +434,7 @@ int ppc_get_current_exception (rtems_raw_except_connect_data* except)
int ppc_delete_exception (const rtems_raw_except_connect_data* except)
{
unsigned int level;
ISR_Level level;
if (!ppc_vector_is_valid(except->exceptIndex)){
return 0;
@@ -450,7 +451,7 @@ int ppc_delete_exception (const rtems_raw_except_connect_data* except)
except->hdl.raw_hdl_size)) {
return 0;
}
_CPU_ISR_Disable(level);
_ISR_Disable(level);
except->off(except);
codemove((void*)ppc_get_vector_addr(except->exceptIndex),
@@ -462,7 +463,7 @@ int ppc_delete_exception (const rtems_raw_except_connect_data* except)
raw_except_table[except->exceptIndex] = default_raw_except_entry;
raw_except_table[except->exceptIndex].exceptIndex = except->exceptIndex;
_CPU_ISR_Enable(level);
_ISR_Enable(level);
return 1;
}
@@ -472,8 +473,8 @@ int ppc_delete_exception (const rtems_raw_except_connect_data* except)
*/
int ppc_init_exceptions (rtems_raw_except_global_settings* config)
{
unsigned i;
unsigned int level;
int i;
ISR_Level level;
/*
* store various accelerators
@@ -482,7 +483,7 @@ int ppc_init_exceptions (rtems_raw_except_global_settings* config)
local_settings = config;
default_raw_except_entry = config->defaultRawEntry;
_CPU_ISR_Disable(level);
_ISR_Disable(level);
for (i=0; i <= LAST_VALID_EXC; i++) {
if (!ppc_vector_is_valid(i)){
@@ -499,7 +500,7 @@ int ppc_init_exceptions (rtems_raw_except_global_settings* config)
raw_except_table[i].off(&raw_except_table[i]);
}
}
_CPU_ISR_Enable(level);
_ISR_Enable(level);
return 1;
}

14
c/src/lib/libcpu/powerpc/ppc403/ictrl/ictrl.c
View File

@@ -128,10 +128,11 @@ set_exier(uint32_t val)
RTEMS_INLINE_ROUTINE void
enable_ext_irq( uint32_t mask)
{
uint32_t isrlvl;
_CPU_ISR_Disable(isrlvl);
rtems_interrupt_level level;
rtems_interrupt_disable(level);
set_exier(get_exier() | ((mask)&PPC_EXI_MASK));
_CPU_ISR_Enable(isrlvl);
rtems_interrupt_enable(level);
}
/*
@@ -140,10 +141,11 @@ enable_ext_irq( uint32_t mask)
RTEMS_INLINE_ROUTINE void
disable_ext_irq( uint32_t mask)
{
uint32_t isrlvl;
_CPU_ISR_Disable(isrlvl);
rtems_interrupt_level level;
rtems_interrupt_disable(level);
set_exier(get_exier() & ~(mask) & PPC_EXI_MASK);
_CPU_ISR_Enable(isrlvl);
rtems_interrupt_enable(level);
}
/*

14
c/src/lib/libcpu/powerpc/ppc403/irq/ictrl.c
View File

@@ -128,10 +128,11 @@ set_exier(uint32_t val)
RTEMS_INLINE_ROUTINE void
enable_ext_irq( uint32_t mask)
{
uint32_t isrlvl;
_CPU_ISR_Disable(isrlvl);
rtems_interrupt_level level;
rtems_interrupt_disable(level);
set_exier(get_exier() | ((mask)&PPC_EXI_MASK));
_CPU_ISR_Enable(isrlvl);
rtems_interrupt_enable(level);
}
/*
@@ -140,10 +141,11 @@ enable_ext_irq( uint32_t mask)
RTEMS_INLINE_ROUTINE void
disable_ext_irq( uint32_t mask)
{
uint32_t isrlvl;
_CPU_ISR_Disable(isrlvl);
rtems_interrupt_level level;
rtems_interrupt_disable(level);
set_exier(get_exier() & ~(mask) & PPC_EXI_MASK);
_CPU_ISR_Enable(isrlvl);
rtems_interrupt_enable(level);
}
/*