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powerpc/mpc5xx: Rename CPU_Interrupt_frame

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The MPC5XX support uses a legacy interrupt/exception infrastructure.

Close #2819.
This commit is contained in:
Sebastian Huber
2016-11-21 10:37:18 +01:00
parent ccc92b81c9
commit f730c25b70
2 changed files with 4 additions and 4 deletions
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2
c/src/lib/libcpu/powerpc/mpc5xx/irq/irq.c
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@@ -388,7 +388,7 @@ int CPU_rtems_irq_mngt_get(rtems_irq_global_settings** config)
/* /*
* High level IRQ handler called from shared_raw_irq_code_entry * High level IRQ handler called from shared_raw_irq_code_entry
*/ */
void C_dispatch_irq_handler (CPU_Interrupt_frame *frame, unsigned int excNum) void C_dispatch_irq_handler (MPC5XX_Interrupt_frame *frame, unsigned int excNum)
{ {
register unsigned int irq; register unsigned int irq;
register unsigned uimbIntr; /* boolean */ register unsigned uimbIntr; /* boolean */

6
c/src/lib/libcpu/powerpc/mpc5xx/irq/irq.h
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@@ -161,7 +161,7 @@ int CPU_irq_level_from_symbolic_name(const rtems_irq_number name);
extern void CPU_rtems_irq_mng_init(unsigned cpuId); extern void CPU_rtems_irq_mng_init(unsigned cpuId);
typedef struct CPU_Interrupt_frame { typedef struct MPC5XX_Interrupt_frame {
uint32_t stacklink; /* Ensure this is a real frame (also reg1 save) */ uint32_t stacklink; /* Ensure this is a real frame (also reg1 save) */
uint32_t calleeLr; /* link register used by callees: SVR4/EABI */ uint32_t calleeLr; /* link register used by callees: SVR4/EABI */
@@ -190,9 +190,9 @@ typedef struct CPU_Interrupt_frame {
uint32_t pc; uint32_t pc;
uint32_t msr; uint32_t msr;
uint32_t pad[3]; uint32_t pad[3];
} CPU_Interrupt_frame; } MPC5XX_Interrupt_frame;
void C_dispatch_irq_handler(CPU_Interrupt_frame *frame, unsigned int excNum); void C_dispatch_irq_handler(MPC5XX_Interrupt_frame *frame, unsigned int excNum);
#endif #endif