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bsp/lpc24xx: Fix PCLK clock divider calculation

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This commit is contained in:
Sebastian Huber
2012-10-12 10:06:15 +02:00
parent 34d12d97f9
commit f72b2de10a
1 changed files with 1 additions and 1 deletions
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c/src/lib/libbsp/arm/lpc24xx/startup/bspstarthooks.c
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@@ -313,7 +313,7 @@ static BSP_START_TEXT_SECTION void lpc17xx_set_pll(
/* Set the CCLK, PCLK and EMCCLK divider */
scb->cclksel = cclksel_cclkdiv;
scb->pclksel = LPC17XX_SCB_PCLKSEL_PCLKDIV(LPC24XX_PCLKDIV);
scb->pclksel = LPC17XX_SCB_PCLKSEL_PCLKDIV(cclkdiv * LPC24XX_PCLKDIV);
scb->emcclksel = LPC24XX_EMCCLKDIV == 1 ? 0 : LPC17XX_SCB_EMCCLKSEL_EMCDIV;
/* Enable PLL */