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bsps/powerpc: Add PPC_EXC_CONFIG_BOOKE_ONLY

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In combination with the PPC_EXC_CONFIG_USE_FIXED_HANDLER option this
removes all dependencies on valid read-write data.  The exception
handling must be statically configured and all components reside in
read-only sections.
This commit is contained in:
Sebastian Huber
2012-11-19 08:37:04 +01:00
parent 4bd4c9e1f9
commit f665f13ddd
6 changed files with 53 additions and 1 deletions
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6
c/src/lib/libbsp/powerpc/shared/src/ppc-exc-handler-table.c
View File

@@ -16,12 +16,14 @@
#ifdef PPC_EXC_CONFIG_USE_FIXED_HANDLER
#ifndef PPC_EXC_CONFIG_BOOKE_ONLY
static int ppc_exc_interrupt_dispatch(BSP_Exception_frame *f, unsigned vector)
{
bsp_interrupt_dispatch();
return 0;
}
#endif /* PPC_EXC_CONFIG_BOOKE_ONLY */
const ppc_exc_handler_t ppc_exc_handler_table [LAST_VALID_EXC + 1] = {
ppc_exc_handler_default,
@@ -29,7 +31,11 @@ const ppc_exc_handler_t ppc_exc_handler_table [LAST_VALID_EXC + 1] = {
ppc_exc_handler_default,
ppc_exc_handler_default,
ppc_exc_handler_default,
#ifndef PPC_EXC_CONFIG_BOOKE_ONLY
ppc_exc_interrupt_dispatch,
#else /* PPC_EXC_CONFIG_BOOKE_ONLY */
ppc_exc_handler_default,
#endif /* PPC_EXC_CONFIG_BOOKE_ONLY */
ppc_exc_handler_default,
ppc_exc_handler_default,
ppc_exc_handler_default,

20
c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_asm_macros.h
View File

@@ -279,6 +279,8 @@ TEST_LOCK_crit_done_\_FLVR:
/* Standard*/
.macro RECOVER_CHECK_std _FLVR
#ifndef PPC_EXC_CONFIG_BOOKE_ONLY
/* Check if exception is recoverable */
lwz SCRATCH_REGISTER_0, SRR1_FRAME_OFFSET(FRAME_REGISTER)
lwz SCRATCH_REGISTER_1, ppc_exc_msr_bits@sdarel(r13)
@@ -290,6 +292,8 @@ recover_check_twiddle_std_\_FLVR:
/* Not recoverable? */
bne recover_check_twiddle_std_\_FLVR
#endif /* PPC_EXC_CONFIG_BOOKE_ONLY */
.endm
/* Critical */
@@ -302,6 +306,8 @@ recover_check_twiddle_std_\_FLVR:
/* Machine check */
.macro RECOVER_CHECK_mchk _FLVR
#ifndef PPC_EXC_CONFIG_BOOKE_ONLY
/* Check if exception is recoverable */
lwz SCRATCH_REGISTER_0, SRR1_FRAME_OFFSET(FRAME_REGISTER)
lwz SCRATCH_REGISTER_1, ppc_exc_msr_bits@sdarel(r13)
@@ -313,6 +319,8 @@ recover_check_twiddle_mchk_\_FLVR:
/* Not recoverable? */
bne recover_check_twiddle_mchk_\_FLVR
#endif /* PPC_EXC_CONFIG_BOOKE_ONLY */
.endm
/*
@@ -520,6 +528,8 @@ wrap_disable_thread_dispatching_done_\_FLVR:
/* Save vector number and exception type */
stw VECTOR_REGISTER, EXCEPTION_NUMBER_OFFSET(FRAME_REGISTER)
#ifndef PPC_EXC_CONFIG_BOOKE_ONLY
/* Load MSR bit mask */
lwz SCRATCH_REGISTER_0, ppc_exc_msr_bits@sdarel(r13)
@@ -532,6 +542,8 @@ wrap_disable_thread_dispatching_done_\_FLVR:
wrap_change_msr_done_\_FLVR:
#endif /* PPC_EXC_CONFIG_BOOKE_ONLY */
#ifdef __ALTIVEC__
LA SCRATCH_REGISTER_0, _CPU_save_altivec_volatile
mtctr SCRATCH_REGISTER_0
@@ -660,11 +672,15 @@ wrap_thread_dispatching_done_\_FLVR:
bctrl
#endif
#ifndef PPC_EXC_CONFIG_BOOKE_ONLY
/* Restore MSR? */
bne CR_MSR, wrap_restore_msr_\_FLVR
wrap_restore_msr_done_\_FLVR:
#endif /* PPC_EXC_CONFIG_BOOKE_ONLY */
/*
* At this point r1 is a valid exception frame pointer and
* FRAME_REGISTER is no longer needed.
@@ -725,6 +741,8 @@ wrap_restore_msr_done_\_FLVR:
/* Return */
\_RFI
#ifndef PPC_EXC_CONFIG_BOOKE_ONLY
wrap_change_msr_\_FLVR:
mfmsr SCRATCH_REGISTER_1
@@ -744,6 +762,8 @@ wrap_restore_msr_\_FLVR:
isync
b wrap_restore_msr_done_\_FLVR
#endif /* PPC_EXC_CONFIG_BOOKE_ONLY */
wrap_save_non_volatile_regs_\_FLVR:
/* Load pristine stack pointer */

4
c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_hdl.c
View File

@@ -31,6 +31,8 @@ uint32_t ppc_exc_vector_register_std = 0;
uint32_t ppc_exc_vector_register_crit = 0;
uint32_t ppc_exc_vector_register_mchk = 0;
#ifndef PPC_EXC_CONFIG_BOOKE_ONLY
/* MSR bits to enable once critical status info is saved and the stack
* is switched; must be set depending on CPU type
*
@@ -39,6 +41,8 @@ uint32_t ppc_exc_vector_register_mchk = 0;
*/
uint32_t ppc_exc_msr_bits = MSR_IR | MSR_DR | MSR_RI;
#endif /* PPC_EXC_CONFIG_BOOKE_ONLY */
int ppc_exc_handler_default(BSP_Exception_frame *f, unsigned int vector)
{
return -1;

8
c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_initialize.c
View File

@@ -192,6 +192,8 @@ void ppc_exc_initialize(
ppc_interrupt_set_disable_mask(interrupt_disable_mask);
#ifndef PPC_EXC_CONFIG_BOOKE_ONLY
/* Use current MMU / RI settings when running C exception handlers */
ppc_exc_msr_bits = ppc_machine_state_register() & (MSR_DR | MSR_IR | MSR_RI);
@@ -199,7 +201,9 @@ void ppc_exc_initialize(
/* Need vector unit enabled to save/restore altivec context */
ppc_exc_msr_bits |= MSR_VE;
#endif
#endif /* PPC_EXC_CONFIG_BOOKE_ONLY */
if (ppc_cpu_is_bookE() == PPC_BOOKE_STD || ppc_cpu_is_bookE() == PPC_BOOKE_E500) {
ppc_exc_initialize_booke();
}
@@ -221,6 +225,7 @@ void ppc_exc_initialize(
}
}
#ifndef PPC_EXC_CONFIG_BOOKE_ONLY
/* If we are on a classic PPC with MSR_DR enabled then
* assert that the mapping for at least this task's
* stack is write-back-caching enabled (see README/CAVEATS)
@@ -252,4 +257,5 @@ void ppc_exc_initialize(
__asm__ volatile ("dcbz 0, %0"::"b" (p));
/* If we make it thru here then things seem to be OK */
}
#endif /* PPC_EXC_CONFIG_BOOKE_ONLY */
}

12
c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_naked.S
View File

@@ -76,6 +76,8 @@ ppc_exc_wrap_naked:
mflr SCRATCH_REGISTER_0
stw SCRATCH_REGISTER_0, EXC_LR_OFFSET(r1)
#ifndef PPC_EXC_CONFIG_BOOKE_ONLY
/* Load MSR bit mask */
lwz SCRATCH_REGISTER_0, ppc_exc_msr_bits@sdarel(r13)
@@ -88,6 +90,8 @@ ppc_exc_wrap_naked:
wrap_change_msr_done_naked:
#endif /* PPC_EXC_CONFIG_BOOKE_ONLY */
/*
* Call high level exception handler
*/
@@ -127,11 +131,15 @@ wrap_change_msr_done_naked:
mtctr SCRATCH_REGISTER_0
bctrl
#ifndef PPC_EXC_CONFIG_BOOKE_ONLY
/* Restore MSR? */
bne CR_MSR, wrap_restore_msr_naked
wrap_restore_msr_done_naked:
#endif /* PPC_EXC_CONFIG_BOOKE_ONLY */
/* Restore XER and CTR */
lwz SCRATCH_REGISTER_0, EXC_XER_OFFSET(r1)
lwz SCRATCH_REGISTER_1, EXC_CTR_OFFSET(r1)
@@ -175,6 +183,8 @@ wrap_restore_msr_done_naked:
/* Return */
rfi
#ifndef PPC_EXC_CONFIG_BOOKE_ONLY
wrap_change_msr_naked:
mfmsr SCRATCH_REGISTER_1
@@ -193,3 +203,5 @@ wrap_restore_msr_naked:
sync
isync
b wrap_restore_msr_done_naked
#endif /* PPC_EXC_CONFIG_BOOKE_ONLY */

4
c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/vectors.h
View File

@@ -410,6 +410,8 @@ typedef int (*ppc_exc_handler_t)(BSP_Exception_frame *f, unsigned vector);
*/
int ppc_exc_handler_default(BSP_Exception_frame *f, unsigned int vector);
#ifndef PPC_EXC_CONFIG_BOOKE_ONLY
/**
* @brief Bits for MSR update.
*
@@ -422,6 +424,8 @@ int ppc_exc_handler_default(BSP_Exception_frame *f, unsigned int vector);
*/
extern uint32_t ppc_exc_msr_bits;
#endif /* PPC_EXC_CONFIG_BOOKE_ONLY */
/**
* @brief Cache write back check flag.
*