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Remove M32R architecture

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updates #2446.
This commit is contained in:
Joel Sherrill
2015-12-15 11:25:01 -06:00
committed by Joel Sherrill
parent ebcf458d03
commit f5201df0dc
30 changed files with 7 additions and 2335 deletions
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1
c/src/aclocal/rtems-cpu-subdirs.m4
View File

@@ -18,7 +18,6 @@ _RTEMS_CPU_SUBDIR([h8300],[$1]);;
_RTEMS_CPU_SUBDIR([i386],[$1]);;
_RTEMS_CPU_SUBDIR([lm32],[$1]);;
_RTEMS_CPU_SUBDIR([m32c],[$1]);;
_RTEMS_CPU_SUBDIR([m32r],[$1]);;
_RTEMS_CPU_SUBDIR([m68k],[$1]);;
_RTEMS_CPU_SUBDIR([mips],[$1]);;
_RTEMS_CPU_SUBDIR([moxie],[$1]);;

9
c/src/lib/libbsp/m32r/Makefile.am
View File

@@ -1,9 +0,0 @@
ACLOCAL_AMFLAGS = -I ../../../aclocal
## Descend into the @RTEMS_BSP_FAMILY@ directory
SUBDIRS = @RTEMS_BSP_FAMILY@
EXTRA_DIST =
include $(top_srcdir)/../../../automake/subdirs.am
include $(top_srcdir)/../../../automake/local.am

8
c/src/lib/libbsp/m32r/acinclude.m4
View File

@@ -1,8 +0,0 @@
# RTEMS_CHECK_BSPDIR(RTEMS_BSP_FAMILY)
AC_DEFUN([RTEMS_CHECK_BSPDIR],
[
case "$1" in
*)
AC_MSG_ERROR([Invalid BSP]);;
esac
])

20
c/src/lib/libbsp/m32r/configure.ac
View File

@@ -1,20 +0,0 @@
## Process this file with autoconf to produce a configure script.
AC_PREREQ([2.69])
AC_INIT([rtems-c-src-lib-libbsp-m32r],[_RTEMS_VERSION],[https://devel.rtems.org/newticket])
AC_CONFIG_SRCDIR([Makefile.am])
RTEMS_TOP(../../../../..)
RTEMS_CANONICAL_TARGET_CPU
AM_INIT_AUTOMAKE([no-define foreign 1.12.2])
AM_MAINTAINER_MODE
RTEMS_ENV_RTEMSBSP
RTEMS_PROJECT_ROOT
RTEMS_CHECK_BSPDIR([$RTEMS_BSP_FAMILY])
# Explicitly list all Makefiles here
AC_CONFIG_FILES([Makefile])
AC_OUTPUT

4
cpukit/configure.ac
View File

@@ -388,8 +388,7 @@ AM_CONDITIONAL([RPCTOOLS],[test "$RPCGEN" = rpcgen \
# reloc backends
AC_MSG_CHECKING([whether CPU supports libdl])
case $RTEMS_CPU in
arm | i386 | m32r | m68k | mips | \
moxie | powerpc | sparc)
arm | i386 | m68k | mips | moxie | powerpc | sparc)
HAVE_LIBDL=yes ;;
# bfin has an issue to resolve with libdl. See ticket #2252
bfin)
@@ -463,7 +462,6 @@ score/cpu/i386/Makefile
score/cpu/lm32/Makefile
score/cpu/m68k/Makefile
score/cpu/m32c/Makefile
score/cpu/m32r/Makefile
score/cpu/mips/Makefile
score/cpu/moxie/Makefile
score/cpu/nios2/Makefile

4
cpukit/libcsupport/src/newlibc_exit.c
View File

@@ -22,9 +22,7 @@
/* FIXME: These defines are a blatant hack */
#if defined(__USE_INIT_FINI__)
#if defined(__m32r__)
#define FINI_SYMBOL __fini
#elif defined(__ARM_EABI__)
#if defined(__ARM_EABI__)
#define FINI_SYMBOL __libc_fini_array
#else
#define FINI_SYMBOL _fini

39
cpukit/libdl/include/arch/m32r/machine/elf_machdep.h
View File

@@ -1,39 +0,0 @@
#define ELF32_MACHDEP_ENDIANNESS ELFDATA2MSB
#define ELF32_MACHDEP_ID_CASES \
case EM_M32R: \
break;
#define ELF32_MACHDEP_ID EM_M32R
#define ARCH_ELFSIZE 32
#define R_M32R_NONE 0
/*-----------OLD TYPE-------------*/
#define R_M32R_16 1
#define R_M32R_32 2
#define R_M32R_24 3
#define R_M32R_10_PCREL 4
#define R_M32R_18_PCREL 5
#define R_M32R_26_PCREL 6
#define R_M32R_HI16_ULO 7
#define R_M32R_HI16_SLO 8
#define R_M32R_LO16 9
#define R_M32R_SDA16 10
#define R_M32R_GNU_VTINHERIT 11
#define R_M32R_GNU_VTENTRY 12
/*--------------------------------*/
#define R_M32R_16_RELA 33
#define R_M32R_32_RELA 34
#define R_M32R_24_RELA 35
#define R_M32R_18_PCREL_RELA 37
#define R_M32R_26_PCREL_RELA 38
#define R_M32R_HI16_ULO_RELA 39
#define R_M32R_HI16_SLO_RELA 40
#define R_M32R_LO16_RELA 41
#define R_M32R_SDA16_RELA 42
#define R_M32R_RELA_GNU_VTINHERIT 43
#define R_M32R_RELA_GNU_VTENTRY 44
#define R_TYPE(name) __CONCAT(R_M32R_,name)

156
cpukit/libdl/rtl-mdreloc-m32r.c
View File

@@ -1,156 +0,0 @@
#include <sys/cdefs.h>
#include <errno.h>
#include <stdio.h>
#include <sys/types.h>
#include <sys/stat.h>
#include <rtems/rtl/rtl.h>
#include "rtl-elf.h"
#include "rtl-error.h"
#include "rtl-trace.h"
static inline Elf_Addr
load_ptr(void *where)
{
Elf_Addr res;
memcpy(&res, where, sizeof(res));
return (res);
}
static inline void
store_ptr(void *where, Elf_Addr val)
{
memcpy(where, &val, sizeof(val));
}
bool
rtems_rtl_elf_rel_resolve_sym (Elf_Word type)
{
return true;
}
bool
rtems_rtl_elf_relocate_rela (const rtems_rtl_obj_t* obj,
const Elf_Rela* rela,
const rtems_rtl_obj_sect_t* sect,
const char* symname,
const Elf_Byte syminfo,
const Elf_Word symvalue)
{
Elf_Addr *where;
Elf_Word tmp;
where = (Elf_Addr *)(sect->base + rela->r_offset);
if (rtems_rtl_trace (RTEMS_RTL_TRACE_RELOC)) {
printf("relocated address 0x%08lx\n", (Elf_Addr)where);
}
switch (ELF_R_TYPE(rela->r_info)) {
case R_TYPE(NONE):
break;
case R_TYPE(16_RELA):
/*
* half16: S + A
*/
*(uint16_t *)where = (symvalue + rela->r_addend) & 0xffff;
break;
case R_TYPE(24_RELA):
/*
* imm24: (S + A) & 0xFFFFFF
*/
tmp = symvalue + rela->r_addend;
if (((Elf_Sword)tmp > 0x7fffff) || ((Elf_Sword)tmp < -0x800000)) {
printf("24_RELA Overflow\n");
return false;
}
*where = (*where & 0xff000000) | (tmp & 0xffffff);
break;
case R_TYPE(32_RELA):
/*
* word32: S + A
*/
*where += symvalue + rela->r_addend;
break;
case R_TYPE(26_PCREL_RELA):
/*
* disp24: ((S + A - P) >> 2) & 0xFFFFFF
*/
tmp = symvalue + rela->r_addend - (Elf_Addr)where;
tmp = (Elf_Sword)tmp >> 2;
if (((Elf_Sword)tmp > 0x7fffff) || ((Elf_Sword)tmp < -0x800000)) {
printf("26_PCREL_RELA Overflow\n");
return false;
}
*where = (*where & 0xff000000) | (tmp & 0xffffff);
break;
case R_TYPE(18_PCREL_RELA):
/*
* disp16: ((S + A - P) >> 2) & 0xFFFFFF
*/
tmp = symvalue + rela->r_addend - (Elf_Addr)where;
tmp = (Elf_Sword)tmp >> 2;
if (((Elf_Sword)tmp > 0x7fff) || ((Elf_Sword)tmp < -0x8000)) {
printf("18_PCREL_RELA Overflow\n");
return false;
}
*where = (*where & 0xffff0000) | (tmp & 0xffff);
break;
case R_TYPE(HI16_ULO_RELA):
/*
* imm16: ((S + A) >> 16)
*/
tmp = *where;
tmp += ((symvalue + rela->r_addend) >> 16) & 0xffff;
*where = tmp;
break;
case R_TYPE(HI16_SLO_RELA):
/*
* imm16: ((S + A) >> 16) or ((S + A + 0x10000) >> 16)
*/
tmp = symvalue + rela->r_addend;
if (tmp & 0x8000) tmp += 0x10000;
tmp = (tmp >> 16) & 0xffff;
*where += tmp;
break;
case R_TYPE(LO16_RELA):
/*
* imm16: (S + A) & 0xFFFF
*/
tmp = symvalue + rela->r_addend;
*where = (*where & 0xffff0000) | (tmp & 0xffff);
break;
default:
rtems_rtl_set_error (EINVAL, "rela type record not supported");
printf("Unsupported rela reloc types\n");
return false;
}
return true;
}
bool
rtems_rtl_elf_relocate_rel (const rtems_rtl_obj_t* obj,
const Elf_Rel* rel,
const rtems_rtl_obj_sect_t* sect,
const char* symname,
const Elf_Byte syminfo,
const Elf_Word symvalue)
{
rtems_rtl_set_error (EINVAL, "rel type record not supported");
return true;
}

2
cpukit/libdl/rtl-shell.c
View File

@@ -25,7 +25,7 @@
* Flag the targets where off_t is 32 bits. This is not a compiler type
* so we can't rely on prerdefines.
*/
#if defined(__m32r__) || defined(__moxie__)
#if defined(__moxie__)
#define PRIdoff_t PRIo32
#else
#define PRIdoff_t PRIo64

1
cpukit/librpc/src/xdr/xdr_float.c
View File

@@ -77,7 +77,6 @@ static char *rcsid = "$FreeBSD: src/lib/libc/xdr/xdr_float.c,v 1.7 1999/08/28 00
defined(__AVR__) || \
defined(__BFIN__) || \
defined(__m32c__) || \
defined(__M32R__) || \
defined(__v850)
#include <rtems/endian.h>

1
cpukit/score/cpu/Makefile.am
View File

@@ -9,7 +9,6 @@ DIST_SUBDIRS += h8300
DIST_SUBDIRS += i386
DIST_SUBDIRS += lm32
DIST_SUBDIRS += m32c
DIST_SUBDIRS += m32r
DIST_SUBDIRS += m68k
DIST_SUBDIRS += mips
DIST_SUBDIRS += moxie

22
cpukit/score/cpu/m32r/Makefile.am
View File

@@ -1,22 +0,0 @@
include $(top_srcdir)/automake/compile.am
include_HEADERS =
include_rtemsdir = $(includedir)/rtems
include_rtems_HEADERS = rtems/asm.h
include_rtems_scoredir = $(includedir)/rtems/score
include_rtems_score_HEADERS = rtems/score/cpu.h
include_rtems_score_HEADERS += rtems/score/m32r.h
include_rtems_score_HEADERS += rtems/score/cpu_asm.h
include_rtems_score_HEADERS += rtems/score/types.h
include_rtems_score_HEADERS += rtems/score/cpuatomic.h
noinst_LIBRARIES = libscorecpu.a
libscorecpu_a_SOURCES = cpu.c cpu_asm.c context_switch.S context_init.c
libscorecpu_a_SOURCES += ../no_cpu/cpucounterread.c
libscorecpu_a_SOURCES += m32r-exception-frame-print.c
libscorecpu_a_CPPFLAGS = $(AM_CPPFLAGS)
include $(srcdir)/preinstall.am
include $(top_srcdir)/automake/local.am

61
cpukit/score/cpu/m32r/context_init.c
View File

@@ -1,61 +0,0 @@
/**
* @file
*
* @brief M32R CPU Context Initialize
*/
/*
* COPYRIGHT (c) 1989-2008.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
#include <stdint.h>
#include <rtems/system.h>
typedef struct {
uint32_t marker;
} Starting_Frame;
#define _get_r12( _r12 ) \
__asm__ volatile( "mv r12, %0" : "=r" (_r12))
void _CPU_Context_Initialize(
Context_Control *the_context,
uint32_t *stack_base,
uint32_t size,
uint32_t new_level,
void *entry_point,
bool is_fp,
void *tls_area
)
{
void *stackEnd = stack_base;
Starting_Frame *frame;
uint32_t r12;
stackEnd += size;
frame = (Starting_Frame *)stackEnd;
frame--;
frame->marker = 0xa5a5a5a5;
_get_r12( r12 );
the_context->r8 = 0x88888888;
the_context->r9 = 0x99999999;
the_context->r10 = 0xaaaaaaaa;
the_context->r11 = 0xbbbbbbbb;
the_context->r12 = r12;
the_context->r13_fp = 0;
the_context->r14_lr = (uintptr_t) entry_point;
the_context->r15_sp = (uintptr_t) frame;
}

67
cpukit/score/cpu/m32r/context_switch.S
View File

@@ -1,67 +0,0 @@
/*
* Context switch for the Reneas M32C
*
* COPYRIGHT (c) 1989-2008.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
#define ARG_EXECUTING 8
#define ARG_HEIR 12
#define CONTEXT_R8 0x00
#define CONTEXT_R9 0x04
#define CONTEXT_R10 0x08
#define CONTEXT_R11 0x0C
#define CONTEXT_R12 0x10
#define CONTEXT_R13_FP 0x14
#define CONTEXT_R14_LR 0x18
#define CONTEXT_R15_SP 0x1C
#define CONTEXT_ACC_LOW 0x20
#define CONTEXT_ACC_HIGH 0x24
.file "context_switch.S"
.text
.global _CPU_Context_switch
.type _CPU_Context_switch, @function
_CPU_Context_switch:
st r8, @(CONTEXT_R8,r0)
st r9, @(CONTEXT_R9,r0)
st r10, @(CONTEXT_R10,r0)
st r11, @(CONTEXT_R11,r0)
st r12, @(CONTEXT_R12,r0)
st r13, @(CONTEXT_R13_FP,r0)
st r14, @(CONTEXT_R14_LR,r0)
st r15, @(CONTEXT_R15_SP,r0)
mvfaclo r2
st r2, @(CONTEXT_ACC_LOW,r0)
mvfachi r2
st r2, @(CONTEXT_ACC_HIGH,r0)
restore:
ld r8, @(CONTEXT_R8,r1)
ld r9, @(CONTEXT_R9,r1)
ld r10, @(CONTEXT_R10,r1)
ld r11, @(CONTEXT_R11,r1)
ld r12, @(CONTEXT_R12,r1)
ld r13, @(CONTEXT_R13_FP,r1)
ld r14, @(CONTEXT_R14_LR,r1)
ld r15, @(CONTEXT_R15_SP,r1)
ld r2, @(CONTEXT_ACC_LOW,r1)
mvtaclo r2
ld r2, @(CONTEXT_ACC_HIGH,r1)
mvtachi r2
jmp lr
.global _CPU_Context_Restart_self
.type _CPU_Context_Restart_self, @function
_CPU_Context_Restart_self:
mv r1, r0
bra restore

125
cpukit/score/cpu/m32r/cpu.c
View File

@@ -1,125 +0,0 @@
/**
* @file
*
* @brief M32R CPU Support
*/
/*
* COPYRIGHT (c) 1989-2008.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
#include <rtems/system.h>
#include <rtems/score/isr.h>
/* _CPU_Initialize
*
* This routine performs processor dependent initialization.
*
* INPUT PARAMETERS: NONE
*
* NO_CPU Specific Information:
*
* XXX document implementation including references if appropriate
*/
void _CPU_Initialize(void)
{
}
/*
* This routine returns the current interrupt level.
*
* NO_CPU Specific Information:
*
* XXX document implementation including references if appropriate
*/
uint32_t _CPU_ISR_Get_level( void )
{
return 0;
}
/*
* _CPU_ISR_install_raw_handler
*
* NO_CPU Specific Information:
*
* XXX document implementation including references if appropriate
*/
void _CPU_ISR_install_raw_handler(
uint32_t vector,
proc_ptr new_handler,
proc_ptr *old_handler
)
{
/*
* This is where we install the interrupt handler into the "raw" interrupt
* table used by the CPU to dispatch interrupt handlers.
*/
/* _set_var_vect(new_handler,vector); */
}
/*
* _CPU_ISR_install_vector
*
* This kernel routine installs the RTEMS handler for the
* specified vector.
*
* Input parameters:
* vector - interrupt vector number
* old_handler - former ISR for this vector number
* new_handler - replacement ISR for this vector number
*
* Output parameters: NONE
*
*
* NO_CPU Specific Information:
*
* XXX document implementation including references if appropriate
*/
void _CPU_ISR_install_vector(
uint32_t vector,
proc_ptr new_handler,
proc_ptr *old_handler
)
{
*old_handler = _ISR_Vector_table[ vector ];
/*
* If the interrupt vector table is a table of pointer to isr entry
* points, then we need to install the appropriate RTEMS interrupt
* handler for this vector number.
*/
_CPU_ISR_install_raw_handler( vector, new_handler, old_handler );
/*
* We put the actual user ISR address in '_ISR_vector_table'. This will
* be used by the _ISR_Handler so the user gets control.
*/
_ISR_Vector_table[ vector ] = new_handler;
}
/*
* _CPU_Install_interrupt_stack
*
* NO_CPU Specific Information:
*
* XXX document implementation including references if appropriate
*/
void _CPU_Install_interrupt_stack( void )
{
}

106
cpukit/score/cpu/m32r/cpu_asm.c
View File

@@ -1,106 +0,0 @@
/**
* @file
*
* @brief M32R ISR Handler
*
* cpu_asm.c ===> cpu_asm.S or cpu_asm.s
*
* @note This is supposed to be a .S or .s file NOT a C file.
*
* M32R does not yet have interrupt support. When this functionality
* is written, this file should become obsolete.
*
*/
/*
* COPYRIGHT (c) 1989-2008.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
#include <rtems/system.h>
#include <rtems/score/cpu.h>
/*
* Prototypes
*/
void _ISR_Handler(void);
/* void __ISR_Handler()
*
* This routine provides the RTEMS interrupt management.
*
* NO_CPU Specific Information:
*
* XXX document implementation including references if appropriate
*/
void _ISR_Handler(void)
{
/*
* This discussion ignores a lot of the ugly details in a real
* implementation such as saving enough registers/state to be
* able to do something real. Keep in mind that the goal is
* to invoke a user's ISR handler which is written in C and
* uses a certain set of registers.
*
* Also note that the exact order is to a large extent flexible.
* Hardware will dictate a sequence for a certain subset of
* _ISR_Handler while requirements for setting
*/
/*
* At entry to "common" _ISR_Handler, the vector number must be
* available. On some CPUs the hardware puts either the vector
* number or the offset into the vector table for this ISR in a
* known place. If the hardware does not give us this information,
* then the assembly portion of RTEMS for this port will contain
* a set of distinct interrupt entry points which somehow place
* the vector number in a known place (which is safe if another
* interrupt nests this one) and branches to _ISR_Handler.
*
* save some or all context on stack
* may need to save some special interrupt information for exit
*
* #if ( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE )
* if ( _ISR_Nest_level == 0 )
* switch to software interrupt stack
* #endif
*
* _ISR_Nest_level++;
*
* _Thread_Dispatch_disable_level++;
*
* (*_ISR_Vector_table[ vector ])( vector );
*
* _Thread_Dispatch_disable_level--;
*
* --_ISR_Nest_level;
*
* if ( _ISR_Nest_level )
* goto the label "exit interrupt (simple case)"
*
* if ( _Thread_Dispatch_disable_level )
* goto the label "exit interrupt (simple case)"
*
* if ( _Thread_Dispatch_necessary ) {
* call _Thread_Dispatch() or prepare to return to _ISR_Dispatch
* prepare to get out of interrupt
* return from interrupt (maybe to _ISR_Dispatch)
*
* LABEL "exit interrupt (simple case):
* #if ( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE )
* if outermost interrupt
* restore stack
* #endif
* prepare to get out of interrupt
* return from interrupt
*/
}

24
cpukit/score/cpu/m32r/m32r-exception-frame-print.c
View File

@@ -1,24 +0,0 @@
/*
* Copyright (c) 2012 embedded brains GmbH. All rights reserved.
*
* embedded brains GmbH
* Obere Lagerstr. 30
* 82178 Puchheim
* Germany
* <rtems@embedded-brains.de>
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
#include <rtems/score/cpu.h>
void _CPU_Exception_frame_print( const CPU_Exception_frame *frame )
{
/* TODO */
}

54
cpukit/score/cpu/m32r/preinstall.am
View File

@@ -1,54 +0,0 @@
## Automatically generated by ampolish3 - Do not edit
if AMPOLISH3
$(srcdir)/preinstall.am: Makefile.am
$(AMPOLISH3) $(srcdir)/Makefile.am > $(srcdir)/preinstall.am
endif
PREINSTALL_DIRS =
DISTCLEANFILES = $(PREINSTALL_DIRS)
all-am: $(PREINSTALL_FILES)
PREINSTALL_FILES =
CLEANFILES = $(PREINSTALL_FILES)
$(PROJECT_INCLUDE)/$(dirstamp):
@$(MKDIR_P) $(PROJECT_INCLUDE)
@: > $(PROJECT_INCLUDE)/$(dirstamp)
PREINSTALL_DIRS += $(PROJECT_INCLUDE)/$(dirstamp)
$(PROJECT_INCLUDE)/rtems/$(dirstamp):
@$(MKDIR_P) $(PROJECT_INCLUDE)/rtems
@: > $(PROJECT_INCLUDE)/rtems/$(dirstamp)
PREINSTALL_DIRS += $(PROJECT_INCLUDE)/rtems/$(dirstamp)
$(PROJECT_INCLUDE)/rtems/asm.h: rtems/asm.h $(PROJECT_INCLUDE)/rtems/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/rtems/asm.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/rtems/asm.h
$(PROJECT_INCLUDE)/rtems/score/$(dirstamp):
@$(MKDIR_P) $(PROJECT_INCLUDE)/rtems/score
@: > $(PROJECT_INCLUDE)/rtems/score/$(dirstamp)
PREINSTALL_DIRS += $(PROJECT_INCLUDE)/rtems/score/$(dirstamp)
$(PROJECT_INCLUDE)/rtems/score/cpu.h: rtems/score/cpu.h $(PROJECT_INCLUDE)/rtems/score/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/rtems/score/cpu.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/rtems/score/cpu.h
$(PROJECT_INCLUDE)/rtems/score/m32r.h: rtems/score/m32r.h $(PROJECT_INCLUDE)/rtems/score/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/rtems/score/m32r.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/rtems/score/m32r.h
$(PROJECT_INCLUDE)/rtems/score/cpu_asm.h: rtems/score/cpu_asm.h $(PROJECT_INCLUDE)/rtems/score/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/rtems/score/cpu_asm.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/rtems/score/cpu_asm.h
$(PROJECT_INCLUDE)/rtems/score/types.h: rtems/score/types.h $(PROJECT_INCLUDE)/rtems/score/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/rtems/score/types.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/rtems/score/types.h
$(PROJECT_INCLUDE)/rtems/score/cpuatomic.h: rtems/score/cpuatomic.h $(PROJECT_INCLUDE)/rtems/score/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/rtems/score/cpuatomic.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/rtems/score/cpuatomic.h

127
cpukit/score/cpu/m32r/rtems/asm.h
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@@ -1,127 +0,0 @@
/**
* @file
*
* @brief Address the Problems Caused by Incompatible Flavor of
* Assemblers and Toolsets
*
* This include file attempts to address the problems
* caused by incompatible flavors of assemblers and
* toolsets. It primarily addresses variations in the
* use of leading underscores on symbols and the requirement
* that register names be preceded by a %.
*
* NOTE: The spacing in the use of these macros
* is critical to them working as advertised.
*/
/*
* COPYRIGHT:
*
* This file is based on similar code found in newlib available
* from ftp.cygnus.com. The file which was used had no copyright
* notice. This file is freely distributable as long as the source
* of the file is noted. This file is:
*
* COPYRIGHT (c) 1994-2006.
* On-Line Applications Research Corporation (OAR).
*/
#ifndef _RTEMS_ASM_H
#define _RTEMS_ASM_H
/*
* Indicate we are in an assembly file and get the basic CPU definitions.
*/
#ifndef ASM
#define ASM
#endif
#include <rtems/score/cpuopts.h>
#include <rtems/score/m32r.h>
#ifndef __USER_LABEL_PREFIX__
/**
* Recent versions of GNU cpp define variables which indicate the
* need for underscores and percents. If not using GNU cpp or
* the version does not support this, then you will obviously
* have to define these as appropriate.
*
* This symbol is prefixed to all C program symbols.
*/
#define __USER_LABEL_PREFIX__ _
#endif
#ifndef __REGISTER_PREFIX__
/**
* Recent versions of GNU cpp define variables which indicate the
* need for underscores and percents. If not using GNU cpp or
* the version does not support this, then you will obviously
* have to define these as appropriate.
*
* This symbol is prefixed to all register names.
*/
#define __REGISTER_PREFIX__
#endif
#include <rtems/concat.h>
/** Use the right prefix for global labels. */
#define SYM(x) CONCAT1 (__USER_LABEL_PREFIX__, x)
/** Use the right prefix for registers. */
#define REG(x) CONCAT1 (__REGISTER_PREFIX__, x)
/*
* define macros for all of the registers on this CPU
*
* EXAMPLE: #define d0 REG (d0)
*/
/*
* Define macros to handle section beginning and ends.
*/
/** This macro is used to denote the beginning of a code declaration. */
#define BEGIN_CODE_DCL .text
/** This macro is used to denote the end of a code declaration. */
#define END_CODE_DCL
/** This macro is used to denote the beginning of a data declaration section. */
#define BEGIN_DATA_DCL .data
/** This macro is used to denote the end of a data declaration section. */
#define END_DATA_DCL
/** This macro is used to denote the beginning of a code section. */
#define BEGIN_CODE .text
/** This macro is used to denote the end of a code section. */
#define END_CODE
/** This macro is used to denote the beginning of a data section. */
#define BEGIN_DATA
/** This macro is used to denote the end of a data section. */
#define END_DATA
/**
* This macro is used to denote the beginning of the
* unitialized data section.
*/
#define BEGIN_BSS
/** This macro is used to denote the end of the unitialized data section. */
#define END_BSS
/** This macro is used to denote the end of the assembly file. */
#define END
/**
* This macro is used to declare a public global symbol.
*
* NOTE: This must be tailored for a particular flavor of the C compiler.
* They may need to put underscores in front of the symbols.
*/
#define PUBLIC(sym) .globl SYM (sym)
/**
* This macro is used to prototype a public global symbol.
*
* NOTE: This must be tailored for a particular flavor of the C compiler.
* They may need to put underscores in front of the symbols.
*/
#define EXTERN(sym) .globl SYM (sym)
#endif

1272
cpukit/score/cpu/m32r/rtems/score/cpu.h
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File diff suppressed because it is too large Load Diff

72
cpukit/score/cpu/m32r/rtems/score/cpu_asm.h
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@@ -1,72 +0,0 @@
/**
* @file
*
* @brief Intel M32R Assembly File
*
* Very loose template for an include file for the cpu_asm.? file
* if it is implemented as a ".S" file (preprocessed by cpp) instead
* of a ".s" file (preprocessed by gm4 or gasp).
*/
/*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*
*/
#ifndef _RTEMS_SCORE_CPU_ASM_H
#define _RTEMS_SCORE_CPU_ASM_H
/* pull in the generated offsets */
#include <rtems/score/offsets.h>
/*
* Hardware General Registers
*/
/* put something here */
/*
* Hardware Floating Point Registers
*/
/* put something here */
/*
* Hardware Control Registers
*/
/* put something here */
/*
* Calling Convention
*/
/* put something here */
/*
* Temporary registers
*/
/* put something here */
/*
* Floating Point Registers - SW Conventions
*/
/* put something here */
/*
* Temporary floating point registers
*/
/* put something here */
#endif
/* end of file */

14
cpukit/score/cpu/m32r/rtems/score/cpuatomic.h
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@@ -1,14 +0,0 @@
/*
* COPYRIGHT (c) 2012-2013 Deng Hengyi.
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
#ifndef _RTEMS_SCORE_ATOMIC_CPU_H
#define _RTEMS_SCORE_ATOMIC_CPU_H
#include <rtems/score/cpustdatomic.h>
#endif /* _RTEMS_SCORE_ATOMIC_CPU_H */

70
cpukit/score/cpu/m32r/rtems/score/m32r.h
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@@ -1,70 +0,0 @@
/**
* @file
*
* @brief Set up Basic CPU Dependency Settings Based on Compiler Settings
*
* This file sets up basic CPU dependency settings based on
* compiler settings. For example, it can determine if
* floating point is available. This particular implementation
* is specified to the NO CPU port.
*/
/*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
#ifndef _RTEMS_SCORE_NO_CPU_H
#define _RTEMS_SCORE_NO_CPU_H
#ifdef __cplusplus
extern "C" {
#endif
/*
* This file contains the information required to build
* RTEMS for a particular member of the NO CPU family.
* It does this by setting variables to indicate which
* implementation dependent features are present in a particular
* member of the family.
*
* This is a good place to list all the known CPU models
* that this port supports and which RTEMS CPU model they correspond
* to.
*/
#if defined(rtems_multilib)
/*
* Figure out all CPU Model Feature Flags based upon compiler
* predefines.
*/
#define CPU_MODEL_NAME "rtems_multilib"
#define NOCPU_HAS_FPU 1
#elif defined(__m32r__)
#define CPU_MODEL_NAME "m32r"
#define NOCPU_HAS_FPU 1
#else
#error "Unsupported CPU Model"
#endif
/*
* Define the name of the CPU family.
*/
#define CPU_NAME "NO CPU"
#ifdef __cplusplus
}
#endif
#endif /* _RTEMS_SCORE_NO_CPU_H */

52
cpukit/score/cpu/m32r/rtems/score/types.h
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@@ -1,52 +0,0 @@
/**
* @file
*
* @brief Intel M32R CPU Type Definitions
*
* This include file contains type definitions pertaining to the Intel
* m32r processor family.
*/
/*
* COPYRIGHT (c) 1989-2006.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
#ifndef _RTEMS_SCORE_TYPES_H
#define _RTEMS_SCORE_TYPES_H
#include <rtems/score/basedefs.h>
#ifndef ASM
#ifdef __cplusplus
extern "C" {
#endif
/*
* This section defines the basic types for this processor.
*/
/** Type that can store a 32-bit integer or a pointer. */
typedef uintptr_t CPU_Uint32ptr;
/** This defines the type for a priority bit map entry. */
typedef uint16_t Priority_bit_map_Word;
/** This defines the return type for an ISR entry point. */
typedef void m32r_isr;
/** This defines the prototype for an ISR entry point. */
typedef m32r_isr ( *m32r_isr_entry )( void );
#ifdef __cplusplus
}
#endif
#endif /* !ASM */
#endif

4
cpukit/score/src/threadglobalconstruction.c
View File

@@ -28,9 +28,7 @@
* initialization this target and compiler version uses.
*/
#if defined(__USE_INIT_FINI__)
#if defined(__M32R__)
#define INIT_NAME __init
#elif defined(__ARM_EABI__)
#if defined(__ARM_EABI__)
#define INIT_NAME __libc_init_array
#else
#define INIT_NAME _init

8
doc/cpu_supplement/Makefile.am
View File

@@ -1,5 +1,5 @@
#
# COPYRIGHT (c) 1988-2012.
# COPYRIGHT (c) 1988-2015.
# On-Line Applications Research Corporation (OAR).
# All rights reserved.
@@ -20,7 +20,6 @@ GENERATED_FILES += h8300.texi
GENERATED_FILES += i386.texi
GENERATED_FILES += lm32.texi
GENERATED_FILES += m32c.texi
GENERATED_FILES += m32r.texi
GENERATED_FILES += m68k.texi
GENERATED_FILES += microblaze.texi
GENERATED_FILES += mips.texi
@@ -83,11 +82,6 @@ m32c.texi: m32c.t
-u "Top" \
-n "" < $< > $@
m32r.texi: m32r.t
$(BMENU2) -p "" \
-u "Top" \
-n "" < $< > $@
lm32.texi: lm32.t
$(BMENU2) -p "" \
-u "Top" \

2
doc/cpu_supplement/cpu_supplement.texi
View File

@@ -70,7 +70,6 @@
* Intel/AMD x86 Specific Information::
* Lattice Mico32 Specific Information::
* Renesas M32C Specific Information::
* Renesas M32R Specific Information::
* M68xxx and Coldfire Specific Information::
* Xilinx MicroBlaze Specific Information::
* MIPS Specific Information::
@@ -95,7 +94,6 @@
@include i386.texi
@include lm32.texi
@include m32c.texi
@include m32r.texi
@include m68k.texi
@include microblaze.texi
@include mips.texi

11
doc/cpu_supplement/m32r.t
View File

@@ -1,11 +0,0 @@
@c Copyright (c) 2014 embedded brains GmbH. All rights reserved.
@chapter Renesas M32R Specific Information
@section Symmetric Multiprocessing
SMP is not supported.
@section Thread-Local Storage
Thread-local storage is not implemented.

3
doc/user/preface.texi
View File

@@ -1,5 +1,5 @@
@c
@c COPYRIGHT (c) 1989-2011.
@c COPYRIGHT (c) 1989-2015.
@c On-Line Applications Research Corporation (OAR).
@c All rights reserved.
@@ -161,7 +161,6 @@ It has been ported to the following processor families:
@item Renesas (formerly Hitachi) SuperH
@item Renesas (formerly Hitachi) H8/300
@item Renesas M32C
@item Renesas M32R
@item SPARC v7, v8, and V9
@end itemize

3
testsuites/libtests/configure.ac
View File

@@ -48,8 +48,7 @@ AM_CONDITIONAL(HAS_POSIX,test x"${rtems_cv_RTEMS_POSIX_API}" = x"yes")
# Must match the list in cpukit.
AC_MSG_CHECKING([whether CPU supports libdl])
case $RTEMS_CPU in
arm | i386 | m32r | m68k | mips | \
moxie | powerpc | sparc)
arm | i386 | m68k | mips | moxie | powerpc | sparc)
TEST_LIBDL=yes ;;
# bfin has an issue to resolve with libdl. See ticket #2252
bfin)