forked from Imagelibrary/rtems
2005-04-28 Jennifer Averett <jennifer.averett@oarcorp.com>
* Add/remove files for the Update to new exception model. * pci/no_host_bridge.c, vme/vmeconfig.c: New files. * clock/clock.c: Removed.
This commit is contained in:
@@ -1,3 +1,9 @@
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2005-04-28 Jennifer Averett <jennifer.averett@oarcorp.com>
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* Add/remove files for the Update to new exception model.
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* pci/no_host_bridge.c, vme/vmeconfig.c: New files.
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* clock/clock.c: Removed.
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2005-04-28 Jennifer Averett <jennifer.averett@oarcorp.com>
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* Add/move files for the Update to new exception model.
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@@ -1,224 +0,0 @@
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/*
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* Clock Tick Device Driver
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*
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* This routine utilizes the Decrementer Register common to the PPC family.
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*
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* The tick frequency is directly programmed to the configured number of
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* microseconds per tick.
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*
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* COPYRIGHT (c) 1989-1997.
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* On-Line Applications Research Corporation (OAR).
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*
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* The license and distribution terms for this file may in
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* the file LICENSE in this distribution or at
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* http://www.rtems.com/license/LICENSE.
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*
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* $Id$
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*/
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#include <stdlib.h>
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#include <bsp.h>
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#include <rtems/libio.h>
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#include <assert.h>
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/*
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* The Real Time Clock Counter Timer uses this trap type.
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*/
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#define CLOCK_VECTOR PPC_IRQ_DECREMENTER
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/*
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* Clock ticks since initialization
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*/
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volatile uint32_t Clock_driver_ticks;
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/*
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* This is the value programmed into the count down timer.
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*/
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uint32_t Clock_Decrementer_value;
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rtems_isr_entry Old_ticker;
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void Clock_exit( void );
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/*
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* These are set by clock driver during its init
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*/
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rtems_device_major_number rtems_clock_major = ~0;
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rtems_device_minor_number rtems_clock_minor;
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/*
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* Clock_isr
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*
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* This is the clock tick interrupt handler.
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*
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* Input parameters:
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* vector - vector number
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*
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* Output parameters: NONE
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*
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* Return values: NONE
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*
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*/
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rtems_isr Clock_isr(
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rtems_vector_number vector,
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CPU_Interrupt_frame *frame
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)
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{
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/*
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* Set the decrementer.
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*/
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PPC_Set_decrementer( Clock_Decrementer_value );
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/*
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* The driver has seen another tick.
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*/
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Clock_driver_ticks += 1;
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/*
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* Real Time Clock counter/timer is set to automatically reload.
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*/
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rtems_clock_tick();
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}
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/*
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* Install_clock
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*
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* This routine actually performs the hardware initialization for the clock.
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*
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* Input parameters:
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* clock_isr - clock interrupt service routine entry point
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*
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* Output parameters: NONE
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*
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* Return values: NONE
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*
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*/
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extern int CLOCK_SPEED;
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void Install_clock(
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rtems_isr_entry clock_isr
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)
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{
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Clock_driver_ticks = 0;
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Old_ticker = (rtems_isr_entry) set_vector( clock_isr, CLOCK_VECTOR, 1 );
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PPC_Set_decrementer( Clock_Decrementer_value );
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atexit( Clock_exit );
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}
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/*
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* Clock_exit
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*
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* This routine allows the clock driver to exit by masking the interrupt and
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* disabling the clock's counter.
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*
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* Input parameters: NONE
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*
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* Output parameters: NONE
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*
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* Return values: NONE
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*
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*/
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void Clock_exit( void )
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{
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/* nothing to do */;
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/* do not restore old vector */
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}
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/*
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* Clock_initialize
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*
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* This routine initializes the clock driver.
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*
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* Input parameters:
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* major - clock device major number
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* minor - clock device minor number
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* parg - pointer to optional device driver arguments
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*
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* Output parameters: NONE
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*
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* Return values:
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* rtems_device_driver status code
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*/
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rtems_device_driver Clock_initialize(
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rtems_device_major_number major,
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rtems_device_minor_number minor,
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void *pargp
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)
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{
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Clock_Decrementer_value = (int) &CPU_PPC_CLICKS_PER_MS *
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(BSP_Configuration.microseconds_per_tick / 1000);
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Install_clock( (rtems_isr_entry) Clock_isr );
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/*
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* make major/minor avail to others such as shared memory driver
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*/
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rtems_clock_major = major;
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rtems_clock_minor = minor;
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return RTEMS_SUCCESSFUL;
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}
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/*
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* Clock_control
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*
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* This routine is the clock device driver control entry point.
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*
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* Input parameters:
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* major - clock device major number
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* minor - clock device minor number
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* parg - pointer to optional device driver arguments
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*
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* Output parameters: NONE
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*
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* Return values:
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* rtems_device_driver status code
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*/
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rtems_device_driver Clock_control(
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rtems_device_major_number major,
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rtems_device_minor_number minor,
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void *pargp
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)
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{
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uint32_t isrlevel;
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rtems_libio_ioctl_args_t *args = pargp;
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if (args == 0)
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goto done;
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/*
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* This is hokey, but until we get a defined interface
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* to do this, it will just be this simple...
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*/
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if (args->command == rtems_build_name('I', 'S', 'R', ' '))
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{
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Clock_isr( CLOCK_VECTOR, pargp );
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}
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else if (args->command == rtems_build_name('N', 'E', 'W', ' '))
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{
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rtems_interrupt_disable( isrlevel );
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(void) set_vector( args->buffer, CLOCK_VECTOR, 1 );
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rtems_interrupt_enable( isrlevel );
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}
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done:
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return RTEMS_SUCCESSFUL;
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}
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23
c/src/lib/libbsp/powerpc/score603e/pci/no_host_bridge.c
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23
c/src/lib/libbsp/powerpc/score603e/pci/no_host_bridge.c
Normal file
@@ -0,0 +1,23 @@
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/*
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* detect_host_bridge.c
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*/
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#include <libcpu/io.h>
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#include <libcpu/spr.h>
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#include <bsp.h>
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#include <bsp/pci.h>
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#include <bsp/consoleIo.h>
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#include <bsp/residual.h>
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#include <bsp/openpic.h>
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#include <rtems/bspIo.h>
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/*
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* For the 8240 and the 8245 there is no host bridge the
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* Open PIC device is built into the processor chip.
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*/
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void detect_host_bridge()
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{
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}
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133
c/src/lib/libbsp/powerpc/score603e/vme/vmeconfig.c
Normal file
133
c/src/lib/libbsp/powerpc/score603e/vme/vmeconfig.c
Normal file
@@ -0,0 +1,133 @@
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/* vmeconfig.c,v 1.1.2.2 2003/03/25 16:46:01 joel Exp */
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/* Standard VME bridge configuration for VGM type boards */
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/* Author: Till Straumann <strauman@slac.stanford.edu>, 3/2002 */
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#include <bsp.h>
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#include <bsp/VME.h>
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#include <bsp/irq.h>
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#include <libcpu/bat.h>
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#include <libcpu/spr.h>
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#include <bsp/motorola.h>
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/* Use a weak alias for the VME configuration.
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* This permits individual applications to override
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* this routine.
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* They may even create an 'empty'
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*
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* void BSP_vme_config(void) {}
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*
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* which will avoid linking in the Universe driver
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* at all :-).
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*/
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void BSP_vme_config(void) __attribute__ (( weak, alias("__BSP_default_vme_config") ));
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SPR_RO(DBAT0U)
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extern unsigned32 VME_Slot1;
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void
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__BSP_default_vme_config(void)
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{
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union {
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struct _BATU bat;
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unsigned long batbits;
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} dbat0u;
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vmeUniverseInit();
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vmeUniverseReset();
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/* setup a PCI area to map the VME bus */
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dbat0u.batbits = _read_DBAT0U();
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/* map VME address ranges */
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vmeUniverseMasterPortCfg(
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0,
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VME_AM_EXT_SUP_DATA,
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_VME_A32_WIN0_ON_VME,
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_VME_A32_WIN0_ON_PCI,
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0x0F000000);
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vmeUniverseMasterPortCfg(
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1,
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VME_AM_STD_SUP_DATA,
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0x00000000,
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_VME_A24_ON_PCI,
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0x00ff0000);
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vmeUniverseMasterPortCfg(
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2,
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VME_AM_SUP_SHORT_IO,
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0x00000000,
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_VME_A16_ON_PCI,
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0x00010000);
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#ifdef _VME_DRAM_OFFSET
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#if 0
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if (VME_Slot1){
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/* map our memory to VME */
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printk("vmeUniverseSlavePortCfg length of 0x%x\n", BSP_mem_size);
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vmeUniverseSlavePortCfg(
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0,
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VME_AM_EXT_SUP_DATA,
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_VME_DRAM_32_OFFSET1,
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PCI_DRAM_OFFSET,
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BSP_mem_size);
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printk("vmeUniverseSlavePortCfg length of 0x%x\n", _VME_A24_SIZE);
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vmeUniverseSlavePortCfg(
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1,
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VME_AM_STD_SUP_DATA,
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_VME_DRAM_24_OFFSET1,
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PCI_DRAM_OFFSET,
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_VME_A24_SIZE);
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printk("vmeUniverseSlavePortCfg length of 0x%x\n", _VME_A16_SIZE);
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vmeUniverseSlavePortCfg(
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2,
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VME_AM_SUP_SHORT_IO,
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_VME_DRAM_16_OFFSET1,
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PCI_DRAM_OFFSET,
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_VME_A16_SIZE);
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}
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else {
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printk("vmeUniverseSlavePortCfg length of 0x%x\n", BSP_mem_size);
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vmeUniverseSlavePortCfg(
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0,
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VME_AM_EXT_SUP_DATA,
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_VME_DRAM_32_OFFSET2,
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PCI_DRAM_OFFSET,
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BSP_mem_size);
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printk("vmeUniverseSlavePortCfg length of 0x%x\n", _VME_A24_SIZE);
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vmeUniverseSlavePortCfg(
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1,
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VME_AM_STD_SUP_DATA,
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_VME_DRAM_24_OFFSET2,
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PCI_DRAM_OFFSET,
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_VME_A24_SIZE);
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printk("vmeUniverseSlavePortCfg length of 0x%x\n", _VME_A16_SIZE);
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vmeUniverseSlavePortCfg(
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2,
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VME_AM_SUP_SHORT_IO,
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_VME_DRAM_16_OFFSET2,
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PCI_DRAM_OFFSET,
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_VME_A16_SIZE);
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}
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#endif
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/* make sure the host bridge PCI master is enabled */
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vmeUniverseWriteReg(
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vmeUniverseReadReg(UNIV_REGOFF_PCI_CSR) | UNIV_PCI_CSR_BM,
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UNIV_REGOFF_PCI_CSR);
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#endif
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/* stdio is not yet initialized; the driver will revert to printk */
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vmeUniverseMasterPortsShow(0);
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vmeUniverseSlavePortsShow(0);
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/* install the VME insterrupt manager */
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vmeUniverseInstallIrqMgr(0,5,1,6);
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if (vmeUniverse0PciIrqLine<0)
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BSP_panic("Unable to get interrupt line info from PCI config");
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_BSP_vme_bridge_irq=BSP_PCI_IRQ_LOWEST_OFFSET+vmeUniverse0PciIrqLine;
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}
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