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2002-11-01 Joel Sherrill <joel@OARcorp.com>

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* score/cpu_asm.c, score/ispsh7750.c: Removed warnings.
This commit is contained in:
Joel Sherrill
2002-11-01 21:59:54 +00:00
parent fa5a45102c
commit f4807abbd0
3 changed files with 113 additions and 109 deletions
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4
c/src/lib/libcpu/sh/sh7750/ChangeLog
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@@ -1,3 +1,7 @@
2002-11-01 Joel Sherrill <joel@OARcorp.com>
* score/cpu_asm.c, score/ispsh7750.c: Removed warnings.
2002-10-21 Ralf Corsepius <corsepiu@faw.uni-ulm.de> 2002-10-21 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* .cvsignore: Reformat. * .cvsignore: Reformat.

202
c/src/lib/libcpu/sh/sh7750/score/cpu_asm.c
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@@ -74,35 +74,35 @@ void _CPU_Context_save_fp(
{ {
#if SH_HAS_FPU #if SH_HAS_FPU
asm volatile(" asm volatile("\n\
mov.l @%0,r4 mov.l @%0,r4 \n\
add %1,r4 add %1,r4\n\
sts.l fpscr,@-r4 sts.l fpscr,@-r4\n\
sts.l fpul,@-r4 sts.l fpul,@-r4\n\
lds %2,fpscr lds %2,fpscr\n\
fmov dr14,@-r4 fmov dr14,@-r4\n\
fmov dr12,@-r4 fmov dr12,@-r4\n\
fmov dr10,@-r4 fmov dr10,@-r4\n\
fmov dr8,@-r4 fmov dr8,@-r4\n\
fmov dr6,@-r4 fmov dr6,@-r4\n\
fmov dr4,@-r4 fmov dr4,@-r4\n\
fmov dr2,@-r4 fmov dr2,@-r4\n\
fmov dr0,@-r4 fmov dr0,@-r4\n\
" "
#ifdef SH4_USE_X_REGISTERS #ifdef SH4_USE_X_REGISTERS
" "\
lds %3,fpscr lds %3,fpscr\n\
fmov xd14,@-r4 fmov xd14,@-r4\n\
fmov xd12,@-r4 fmov xd12,@-r4\n\
fmov xd10,@-r4 fmov xd10,@-r4\n\
fmov xd8,@-r4 fmov xd8,@-r4\n\
fmov xd6,@-r4 fmov xd6,@-r4\n\
fmov xd4,@-r4 fmov xd4,@-r4\n\
fmov xd2,@-r4 fmov xd2,@-r4\n\
fmov xd0,@-r4 fmov xd0,@-r4\n\
" "
#endif #endif
"lds %4,fpscr "lds %4,fpscr\n\
" "
: :
: "r"(fp_context_ptr), "r"(sizeof(Context_Control_fp)), : "r"(fp_context_ptr), "r"(sizeof(Context_Control_fp)),
@@ -131,34 +131,34 @@ void _CPU_Context_restore_fp(
{ {
#if SH_HAS_FPU #if SH_HAS_FPU
asm volatile(" asm volatile("\n\
mov.l @%0,r4 mov.l @%0,r4 \n\
" "
#ifdef SH4_USE_X_REGISTERS #ifdef SH4_USE_X_REGISTERS
" "\n\
lds %1,fpscr lds %1,fpscr\n\
fmov @r4+,xd0 fmov @r4+,xd0\n\
fmov @r4+,xd2 fmov @r4+,xd2\n\
fmov @r4+,xd4 fmov @r4+,xd4\n\
fmov @r4+,xd6 fmov @r4+,xd6\n\
fmov @r4+,xd8 fmov @r4+,xd8\n\
fmov @r4+,xd10 fmov @r4+,xd10\n\
fmov @r4+,xd12 fmov @r4+,xd12\n\
fmov @r4+,xd14 fmov @r4+,xd14\n\
" "
#endif #endif
" "\n\
lds %2,fpscr lds %2,fpscr\n\
fmov @r4+,dr0 fmov @r4+,dr0\n\
fmov @r4+,dr2 fmov @r4+,dr2\n\
fmov @r4+,dr4 fmov @r4+,dr4\n\
fmov @r4+,dr6 fmov @r4+,dr6\n\
fmov @r4+,dr8 fmov @r4+,dr8\n\
fmov @r4+,dr10 fmov @r4+,dr10\n\
fmov @r4+,dr12 fmov @r4+,dr12\n\
fmov @r4+,dr14 fmov @r4+,dr14\n\
lds.l @r4+,fpul lds.l @r4+,fpul\n\
lds.l @r4+,fpscr lds.l @r4+,fpscr\n\
" : " :
: "r"(fp_context_ptr), "r"(SH4_FPSCR_PR | SH4_FPSCR_SZ), "r"(SH4_FPSCR_SZ) : "r"(fp_context_ptr), "r"(SH4_FPSCR_PR | SH4_FPSCR_SZ), "r"(SH4_FPSCR_SZ)
: "r4", "r0"); : "r4", "r0");
@@ -196,62 +196,62 @@ void __CPU_Context_switch(
) )
{ {
asm volatile(" asm volatile("\n\
.global __CPU_Context_switch .global __CPU_Context_switch\n\
__CPU_Context_switch: __CPU_Context_switch:\n\
\n\
add %0,r4 add %0,r4\n\
\n\
stc.l sr,@-r4 stc.l sr,@-r4\n\
stc.l gbr,@-r4 stc.l gbr,@-r4\n\
mov.l r0,@-r4 mov.l r0,@-r4\n\
mov.l r1,@-r4 mov.l r1,@-r4\n\
mov.l r2,@-r4 mov.l r2,@-r4\n\
mov.l r3,@-r4 mov.l r3,@-r4\n\
\n\
mov.l r6,@-r4 mov.l r6,@-r4\n\
mov.l r7,@-r4 mov.l r7,@-r4\n\
mov.l r8,@-r4 mov.l r8,@-r4\n\
mov.l r9,@-r4 mov.l r9,@-r4\n\
mov.l r10,@-r4 mov.l r10,@-r4\n\
mov.l r11,@-r4 mov.l r11,@-r4\n\
mov.l r12,@-r4 mov.l r12,@-r4\n\
mov.l r13,@-r4 mov.l r13,@-r4\n\
mov.l r14,@-r4 mov.l r14,@-r4\n\
sts.l pr,@-r4 sts.l pr,@-r4\n\
sts.l mach,@-r4 sts.l mach,@-r4\n\
sts.l macl,@-r4 sts.l macl,@-r4\n\
mov.l r15,@-r4 mov.l r15,@-r4\n\
\n\
mov r5, r4" mov r5, r4"
:: "I" (sizeof(Context_Control)) :: "I" (sizeof(Context_Control))
); );
asm volatile(" asm volatile("\n\
.global __CPU_Context_restore .global __CPU_Context_restore\n\
__CPU_Context_restore: __CPU_Context_restore:\n\
mov.l @r4+,r15 mov.l @r4+,r15\n\
lds.l @r4+,macl lds.l @r4+,macl\n\
lds.l @r4+,mach lds.l @r4+,mach\n\
lds.l @r4+,pr lds.l @r4+,pr\n\
mov.l @r4+,r14 mov.l @r4+,r14\n\
mov.l @r4+,r13 mov.l @r4+,r13\n\
mov.l @r4+,r12 mov.l @r4+,r12\n\
mov.l @r4+,r11 mov.l @r4+,r11\n\
mov.l @r4+,r10 mov.l @r4+,r10\n\
mov.l @r4+,r9 mov.l @r4+,r9\n\
mov.l @r4+,r8 mov.l @r4+,r8\n\
mov.l @r4+,r7 mov.l @r4+,r7\n\
mov.l @r4+,r6 mov.l @r4+,r6\n\
\n\
mov.l @r4+,r3 mov.l @r4+,r3\n\
mov.l @r4+,r2 mov.l @r4+,r2\n\
mov.l @r4+,r1 mov.l @r4+,r1\n\
mov.l @r4+,r0 mov.l @r4+,r0\n\
ldc.l @r4+,gbr ldc.l @r4+,gbr\n\
ldc.l @r4+,sr ldc.l @r4+,sr\n\
\n\
rts rts\n\
nop" ); nop" );
} }

16
c/src/lib/libcpu/sh/sh7750/score/ispsh7750.c
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@@ -335,13 +335,13 @@ asm (" .text\n"
* Dummy interrupt service procedure for * Dummy interrupt service procedure for
* interrupts being not allowed --> Trap 2 * interrupts being not allowed --> Trap 2
************************************************/ ************************************************/
asm(" .section .text asm(" .section .text\n\
.global __dummy_isp .global __dummy_isp\n\
__dummy_isp: __dummy_isp:\n\
mov.l r14,@-r15 mov.l r14,@-r15\n\
mov r15, r14 mov r15, r14\n\
trapa #2 trapa #2\n\
mov.l @r15+,r14 mov.l @r15+,r14\n\
rte rte\n\
nop"); nop");