forked from Imagelibrary/rtems
leon, grpci2: latency timer user configurable (default 64)
This commit is contained in:
committed by
Daniel Hellstrom
parent
0c23dd5046
commit
f46f5f845d
@@ -36,6 +36,10 @@ extern void grpci2_register_drv(void);
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* ============================
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* ============================
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* Name="byteTwisting", Type=INT, Enable/Disable Bytetwisting by hardware
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* Name="byteTwisting", Type=INT, Enable/Disable Bytetwisting by hardware
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*
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*
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* PCI Latency timer
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* ============================
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* Name="latencyTimer", Type=INT, Set the latency timer
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*
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* PCI Host's Target BARs setup
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* PCI Host's Target BARs setup
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* ============================
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* ============================
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* The Host's BARs are not configured by the configuration routines, by default
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* The Host's BARs are not configured by the configuration routines, by default
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@@ -57,6 +57,9 @@
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/* If defined to 1 - byte twisting is enabled by default */
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/* If defined to 1 - byte twisting is enabled by default */
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#define DEFAULT_BT_ENABLED 0
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#define DEFAULT_BT_ENABLED 0
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/* If defined to 64 - Latency timer is 64 by default */
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#define DEFAULT_LATENCY_TIMER 64
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/* Interrupt assignment. Set to other value than 0xff in order to
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/* Interrupt assignment. Set to other value than 0xff in order to
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* override defaults and plug&play information
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* override defaults and plug&play information
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*/
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*/
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@@ -237,6 +240,7 @@ struct grpci2_priv {
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char irq_mode; /* IRQ Mode from CAPSTS REG */
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char irq_mode; /* IRQ Mode from CAPSTS REG */
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char bt_enabled;
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char bt_enabled;
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unsigned int irq_mask;
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unsigned int irq_mask;
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unsigned int latency_timer;
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struct grpci2_pcibar_cfg *barcfg;
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struct grpci2_pcibar_cfg *barcfg;
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@@ -696,6 +700,12 @@ static int grpci2_hw_init(struct grpci2_priv *priv)
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data |= (PCIM_CMD_MEMEN | PCIM_CMD_BUSMASTEREN);
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data |= (PCIM_CMD_MEMEN | PCIM_CMD_BUSMASTEREN);
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grpci2_cfg_w32(host, PCIR_COMMAND, data);
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grpci2_cfg_w32(host, PCIR_COMMAND, data);
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/* set latency timer */
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grpci2_cfg_r32(host, PCIR_CACHELNSZ, &data);
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data &= ~0xff00;
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data |= ((priv->latency_timer & 0xff) << 8);
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grpci2_cfg_w32(host, PCIR_CACHELNSZ, data);
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/* Enable Error respone (CPU-TRAP) on illegal memory access */
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/* Enable Error respone (CPU-TRAP) on illegal memory access */
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regs->ctrl = CTRL_ER | CTRL_PE;
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regs->ctrl = CTRL_ER | CTRL_PE;
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@@ -733,6 +743,7 @@ static int grpci2_init(struct grpci2_priv *priv)
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priv->regs = (struct grpci2_regs *)apb->start;
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priv->regs = (struct grpci2_regs *)apb->start;
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priv->bt_enabled = DEFAULT_BT_ENABLED;
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priv->bt_enabled = DEFAULT_BT_ENABLED;
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priv->irq_mode = (priv->regs->sts_cap & STS_IRQMODE) >> STS_IRQMODE_BIT;
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priv->irq_mode = (priv->regs->sts_cap & STS_IRQMODE) >> STS_IRQMODE_BIT;
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priv->latency_timer = DEFAULT_LATENCY_TIMER;
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/* Calculate the PCI windows
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/* Calculate the PCI windows
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* AMBA->PCI Window: AHB SLAVE AREA0
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* AMBA->PCI Window: AHB SLAVE AREA0
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@@ -791,6 +802,11 @@ static int grpci2_init(struct grpci2_priv *priv)
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else
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else
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priv->barcfg = grpci2_default_bar_mapping;
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priv->barcfg = grpci2_default_bar_mapping;
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/* User may override DEFAULT_LATENCY_TIMER */
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value = drvmgr_dev_key_get(priv->dev, "latencyTimer", DRVMGR_KT_INT);
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if (value)
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priv->latency_timer = value->i;
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/* This driver only support HOST systems, we check that it can act as a
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/* This driver only support HOST systems, we check that it can act as a
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* PCI Master and that it is in the Host slot. */
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* PCI Master and that it is in the Host slot. */
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if ((priv->regs->sts_cap&STS_HOST) || !(priv->regs->sts_cap&STS_MST))
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if ((priv->regs->sts_cap&STS_HOST) || !(priv->regs->sts_cap&STS_MST))
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