forked from Imagelibrary/rtems
@@ -88,14 +88,11 @@ void *bsp_idle_thread( uintptr_t ignored );
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/* Internal data and functions */
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typedef struct {
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uint32_t addr_upper;
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uint32_t addr_lower;
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uint32_t r3_upper;
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uint32_t r3_lower;
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uint64_t addr;
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uint64_t r3;
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uint32_t reserved_0;
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uint32_t pir;
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uint32_t r6_upper;
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uint32_t r6_lower;
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uint64_t r6;
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uint32_t reserved_1[8];
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} qoriq_start_spin_table;
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@@ -79,7 +79,7 @@ static void start_thread_if_necessary(uint32_t cpu_index_self)
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&& _SMP_Should_start_processor(cpu_index_next)
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) {
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/* Thread Initial Next Instruction Address (INIA) */
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PPC_SET_THREAD_MGMT_REGISTER(321, (uint32_t) _start_thread);
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PPC_SET_THREAD_MGMT_REGISTER(321, (uintptr_t) _start_thread);
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/* Thread Initial Machine State (IMSR) */
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PPC_SET_THREAD_MGMT_REGISTER(289, QORIQ_INITIAL_MSR);
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@@ -158,11 +158,10 @@ static bool release_processor(
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const Per_CPU_Control *cpu = _Per_CPU_Get_by_index(cpu_index);
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spin_table->pir = cpu_index;
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spin_table->r3_lower = (uint32_t) cpu->interrupt_stack_high;
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spin_table->addr_upper = 0;
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spin_table->r3 = (uintptr_t) cpu->interrupt_stack_high;
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rtems_cache_flush_multiple_data_lines(spin_table, sizeof(*spin_table));
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ppc_synchronize_data();
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spin_table->addr_lower = (uint32_t) _start_secondary_processor;
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spin_table->addr = (uintptr_t) _start_secondary_processor;
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rtems_cache_flush_multiple_data_lines(spin_table, sizeof(*spin_table));
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}
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