forked from Imagelibrary/rtems
@@ -35,6 +35,10 @@
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#include <bsp/utility.h>
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#include <bsp/qoriq.h>
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#ifdef RTEMS_SMP
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#include <rtems/score/smpimpl.h>
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#endif
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RTEMS_INTERRUPT_LOCK_DEFINE(static, lock, "QorIQ IRQ")
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#define SPURIOUS 0xffff
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@@ -94,6 +98,13 @@ void bsp_interrupt_dispatch(uintptr_t exception_number)
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return;
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}
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#ifdef RTEMS_SMP
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if (exception_number == 36) {
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_SMP_Inter_processor_interrupt_handler();
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return;
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}
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#endif
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ev_int_iack(0, &vector);
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if (vector != SPURIOUS) {
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@@ -489,10 +489,18 @@ bsp_exc_vector_base:
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START_NOP_FOR_LINKER_TOC_POINTER_RESTORE
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#ifdef __PPC_CPU_E6500__
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/* Processor doorbell interrupt */
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#if defined(QORIQ_IS_HYPERVISOR_GUEST) && defined(RTEMS_SMP)
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PPC_REG_STORE_UPDATE r1, -PPC_EXC_INTERRUPT_FRAME_SIZE(r1)
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#else
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PPC_REG_STORE_UPDATE r1, -EXC_GENERIC_SIZE(r1)
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#endif
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PPC_REG_STORE r3, GPR3_OFFSET(r1)
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li r3, 36
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#if defined(QORIQ_IS_HYPERVISOR_GUEST) && defined(RTEMS_SMP)
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b ppc_exc_interrupt
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#else
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b ppc_exc_fatal_normal
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#endif
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START_NOP_FOR_LINKER_TOC_POINTER_RESTORE
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/* Processor doorbell critical interrupt */
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PPC_REG_STORE_UPDATE r1, -EXC_GENERIC_SIZE(r1)
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@@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2013, 2016 embedded brains GmbH. All rights reserved.
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* Copyright (c) 2013, 2017 embedded brains GmbH. All rights reserved.
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*
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* embedded brains GmbH
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* Dornierstr. 4
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@@ -38,12 +38,6 @@ void _start_secondary_processor(void);
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#define IPI_INDEX 0
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#define TLB_BEGIN (3 * QORIQ_TLB1_ENTRY_COUNT / 4)
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#define TLB_END QORIQ_TLB1_ENTRY_COUNT
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#define TLB_COUNT (TLB_END - TLB_BEGIN)
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#if QORIQ_THREAD_COUNT > 1
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static bool is_started_by_u_boot(uint32_t cpu_index)
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{
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@@ -104,10 +98,32 @@ void bsp_start_on_secondary_processor(void)
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_SMP_Start_multitasking_on_secondary_processor();
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}
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#ifndef QORIQ_IS_HYPERVISOR_GUEST
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static void bsp_inter_processor_interrupt(void *arg)
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{
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_SMP_Inter_processor_interrupt_handler();
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}
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#endif
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static void setup_boot_page(void)
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{
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#ifdef QORIQ_IS_HYPERVISOR_GUEST
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qoriq_mmu_context mmu_context;
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qoriq_mmu_context_init(&mmu_context);
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qoriq_mmu_add(
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&mmu_context,
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0xfffff000,
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0xffffffff,
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0,
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0,
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FSL_EIS_MAS3_SR | FSL_EIS_MAS3_SW,
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0
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);
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qoriq_mmu_partition(&mmu_context, 1);
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qoriq_mmu_write_to_tlb1(&mmu_context, QORIQ_TLB1_ENTRY_COUNT - 1);
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#endif
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}
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static uint32_t discover_processors(void)
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{
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@@ -139,6 +155,7 @@ uint32_t _CPU_SMP_Initialize(void)
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uint32_t cpu_count = 1;
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if (rtems_configuration_get_maximum_processors() > 0) {
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setup_boot_page();
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cpu_count = discover_processors();
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}
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@@ -196,6 +213,9 @@ bool _CPU_SMP_Start_processor(uint32_t cpu_index)
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void _CPU_SMP_Finalize_initialization(uint32_t cpu_count)
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{
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#ifdef QORIQ_IS_HYPERVISOR_GUEST
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(void) cpu_count;
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#else
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if (cpu_count > 1) {
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rtems_status_code sc;
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@@ -210,6 +230,7 @@ void _CPU_SMP_Finalize_initialization(uint32_t cpu_count)
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bsp_fatal(QORIQ_FATAL_SMP_IPI_HANDLER_INSTALL);
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}
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}
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#endif
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}
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void _CPU_SMP_Prepare_start_multitasking(void)
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@@ -219,5 +240,13 @@ void _CPU_SMP_Prepare_start_multitasking(void)
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void _CPU_SMP_Send_interrupt(uint32_t target_processor_index)
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||||
{
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#ifdef QORIQ_IS_HYPERVISOR_GUEST
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||||
uint32_t msg;
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/* DBELL message type */
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msg = (0U << (63 - 36)) | target_processor_index;
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__asm__ volatile ("msgsnd %0" : : "r" (msg));
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#else
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qoriq.pic.ipidr [IPI_INDEX].reg = 1U << target_processor_index;
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#endif
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||||
}
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||||
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||||
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